ML20082B929

Rev 1 to VVP9000520/1, Verification & Validation Plan for Class 1E Qualified Safeguard Load Sequencer

ML20082B929
Person / Time
Site:	Prairie Island
Issue date:	06/01/1991
From:	SPECTRUM TECHNOLOGIES, INC.
To:
Shared Package
ML20082B924	List: ML20082B921 ML20082B929
References
VVP9000520-1, NUDOCS 9107170172
Download: ML20082B929 (19)

Text

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ATTACitMENT 3 SPECTRUM TECHNOLOGIES O

VERIFICATION AND VALIDATION PLAN OTT)

1. VVP9000520/1 FOR CLASS 1E QUALIFIED SAFEGUARD LOAD SEQUENCER FLUOR DANIEL ORDER #PA9383 for Northern States Power Company (NSP)

Prairie Island Nuclear Generating Plant SPECTRUM TECHNOLOGIES USA, INC.

JOB # JN9000520 REV 1 DATED 1 JUNE,1991 SPECTRUM TECHNOLOGIES 9000520! procedure /wp90520avp-06/18 9107170172 10710 F;Dp (hDOCK 0500i{,:- g SPECTRUM TECHNOLOGIES USA INCORPORATED 133 WALL STREET, SCHENECTADY, NY 12305

• TEL 518-382@56

• FAX 518-382 0283

Spectrum Technologies USA, Inc. Software Verification and Validation 133 Wall Street #VVP9000520/1 Schenectady, NY 12305 REV1 Tel: (518)382 0056 Fax: (518)332-0283 4

Prepared by:

• 96 'D Approved by: b Project Manager President \1" Approved by: [/M e, '

fQA Manager REVISIONS 1

- REV # DATE PAGES EFFECT BY APPVD DESCRIPYION OF CHANGES 1- 6/161 - 6,11,12,13,15,18,19 SX [ Docurnentation The contents of this Procedure are exclusive property of Spectrum Technologies USA, Inc. and are not to te used by or divulged tr anyone without Spectrum Technologies USA. Inc. prior written consent, SPECTR'UM TECHNOLOGIES USA 2

-TAILLE OF CONTENTS I j

- 1. INTRODUCTION . . . . . . . . . ... .. .... .. .... .............. ....., 5 1.1 - PURPOSE . . . . . . . ............ .... ................ ......... 5 1.2 . SCOPE ..... ... .............................. .......... . 5

2. REFERENCE MATERIAL . . . . . . ....... ..... .................... .... 5 l

3. ACRONYMS AND DEFINITIONS ... ..................................... 6

4. VERIFICATION /.ND VALIDATION OVERVIEW .................. ........... 7 4.10i4GANIZATION . . ................. . .. . . ................. 7 4.2 ' MASTER SCHEDULE . . . . . . . . .............. ....... .. ... ... 7 4.~3 TOOLS TECHNIQUES AND METHODOLOOY .......... ,........... 8 4.4 LIFE CYCLE DEFINITION . . . . .. ......... .. . . .. ,, . . . . 9 4.5 COMPUTER SYSTEM ' REQUIREMENTS . . . . . ........... ...... .,.. . 9 4.5.1_ Hardware Requirernents . . . . . . . . . . . . . . . . ..... ................ 9 4.5.2 Software Requirements . . . . . . . . . . . . . . . . . . . . . . . . . ............ 10

5. LIFE. CYCLE VERIFICATION AND VALIDATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.1 VERIFICATION OF REQUIREMENTS PHASE . . . . .. .................. 11 5.1.1 Task ~ . . . . . . . . . . . . ....................... .......... .. 11 15.1.2 Methods and Criteria .................................. .... 11 5.13 Inputs and Outputs . . . . . ...... ... . ............... ...... 11 5.2 VERIFICATION OF DESIGN PHAJE ................................. 12

- 5.2.1 Tas k . . . . . . . . . . . . . . ....... ...... ......... ....... ... 12 5.2.2 Methods and Criteria ............................... ....... 12 5.23 In pu t and Out put . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .......... 12 53 VERIFICATION OF IMPLEMENTATION PHASE . . . . . . . . . . . . . . ..... ,,, 12 53.1 Tasks ...... ... . .. .................................. 12 -

5.3.2 Methods and Criteria ............ ......... . ... ....... 13-5.3.2.1 Module T: sting , .... ......... ................ . 13 5.3.2.2 Ladder Logic *Walkthrough" . . . . . . . . . . . . . . . . . . . ... .. . 13

. 5.33 Inputs and Outputs . . . . . . . . . . . . . . . . . . . . . . . . ................ 13-

- 5.4 SOFTWARE VALIDATION / SOFTWARE ACCEPTANCE TEST . . . . . . . . . . . , . . 13 5.4.1 Tasks . . . . . . . . . ... .. .......... ...... ... ........... 13

5.4.2 Methods and Criteria ...................... ................ 13 5.43 Input and Output .. . . ........ ............... ......... 13 5.5 - SYSTEM VALIDATION /SYS'IEM (SW/HW) ACCEPTANCE TEST . . . . . . . . . . . . . - 13 5.5.1 Tasks . . . . . . . . . ...... ............. .... ............. 13 5.5.2 Methods and Criteria .......................... .. . ...... 14 513 Input and Output ....................................... .. 14 5.6 SPECIAL VALIDATION REQUIREMENTS . ............ ....... ..... 14 5.6.1 Tasks ... ............ . ........ . .......... .... .... 14 5.6.2 Methods and Criteria ... .......... . ............... .. . 14 5.63 Inputs and Outputs '. ... . ............................. ... 15 6, VERIFICATION AND VALIDATION ADMINISTRATION ,..... .... .. . .. . . 1 SPECTRUM TECIINOLOGIES USA 3

I 15 6.1 ANOMALY REPORTING AND RESOLUTION . ... .. .. .... ...

15 6.2 TASK ITERATION POLICY ,...... ..... .... .. ... . .

15 6.3 DEVIATION POLICY . . .... ........ .. ...... ..... .. .... ...

15 6.4 CONTROL PROCEDURES . .. . . . .. . .. . . ... ......

, ...... .... ... 15

7. SOFTWARE VERIFICATION AND VALIDATION REPORTING .

4 SPECTRIJM TECliNOLOGIES USA

1. INTRODUCTION 1.1 - PURPOSE The purpose of the Verification and Validation Plan (VVP) is to define the procedures and requirements

] for a cemprehensive evaluation of the software being developed for the Emergency load Sequencer for Prairie Island Units 1 and 2, through each phase of the project. This document is provided for resiew and acceptance by the customer, and acceptance will finalize the Verification and Validation concept.

The intended audience for the VVP are technical personnel from Spectrum Technologies, USA Inc. (ST) that specify and design the logic of the system, and for the independent group that will actually implement and perform the Verification and Validation Plan.

The VVP is intended to be a means of assunng that the developed computer application meets the established functional, performance, and iterface requirements; and tnat the development process is performed in such a :nanner as to ensure predictable results and interface between each phase of the development cycle, The specific areas to be addressed by this VVP are:

a. Ensuring that the sptem requirements are understood by the computer system developers.

b. Ensuring that the development process is devised to minimize design errors.

c. Ensuring that testing requirements address software, hardware, and software / hardware integration.

d. Ensuring that the system complies with all applicable specifications,

e. Ensuring verification is performed independently from the system design group.

Design, fabrication, and testing of the Sequencer is performed and/or administered by ST, based upon requirements delineated by Nortnern States Power (NSP) and Fluor Daniel. The specific responsibilities for each of the interfacing organizations has been defined in each applicable section of this Verification and Validation Plan.

1.2 - SCOPE This document outlines the method to be used to for Verification and Validation (V&V) of the Safeguard Load Sequencer (SLS) logic as implemented in the Programmable Logic Controller (PLC). That logic with the hardware in the SLS, performs the function of emergency 4160V bus voltage restoration, load shedding, and emergency diesel generator loading. The VVP is carried out in parallel with software desigr.

specification, design development, integration with related hardware, and implementation.

2. REFERENCE MATERIAL Binding documents for this project are:

1. Fluor Daniel's letter of award - 1212860.

2. Spectrum's bid proposals dated July 27, 1990.

3. Fluor Daniel's RFP #02713 dated June 21.1990, including Addendum No.1 and Addendum No. 2-

6. Customer Order Processing (#CP9000520/1) - List of applicable standards.

8. IEEE 1012-1986 - IEEE Standard for Software Venfication and Validation Plan.

9. NUREGiCR 4640, 8/87 - Handbook of Software Quality Assurance Techniques Applicable to the Nuclear Industry.

10. IEEE Standard 323-1983 . Qualifying Class 1E Equipment for Nuclear Power Generating Stations.

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11, IEEE Standard 3441975.' Recommended Practices for Seismic Qualification of Class IE Equipment for Nucicar Power Generating Stations.

12. __ IEEE Standard 384-1981. Standard Criteria for independence of Class IE Equipment and Circuits.

- 13. IEEE Standard 603 1980 - Standard Criteria for Safety Systems for Nuclear Power Ocnerating Stations,

- 14. ANS!/IEEE-ANS 7.4.3.21982 Application Criteria for Programmable Digital Computer Systems in Safety Systems of Nuc! car Power Generating Stations.

15. Spectrum Software Quality Assurance Plan (#SQAP9000520).

3. ACRONYMS AND DEFINITIONS NSP Northern States Power Company.

FDI - Fluor Daniel.

PMP - Project Management Plan.

V&V Verification and Validation. ,

SRD- - System Requirements Document. l SRS iSoftware Requirements Specification.

SDD- Software Design Document (contains design requirements)

SLS - Safeguard I. cad Sequencer, SVVP - Software Verification and Validation Plan.

SVVR Software Verification and Validation Report.

SQA Software Quality Assurance.

Computer Program: A schedule or plan that specifles actions that rnay or may not be taken, expressed in a form suitable for execution by a p ogrammable digital computer.

Data: A representation of facts, concepts, or instructions in a formalized manner suitable for communication, interpretation, or processing by a programmable digital computer.

-Integration Tests: . Tests performed during the hardware / software integration process prior to computer system validation to veri.'y compatibility of the sc'tware and the computer system hardware. -

1 Software: Computer programs and data.

Software Modularity: The software attribute that provides a structure of highly independent computer program units that are discrete and identifiabic with respect to compiling, combining with other units, and loading.

Software Quality - Assurance Plan: A plan for the development, implementation, and maintenance of software products necessary _to provide adequate confidence that the software conforms to established requirements.

^

Validation: ' De process of evaluating software at the end of the software development process to ensure l compliance with software requirements.

Verification: The process of determining whe:her or. not the product of a given phase of the software development cycle fulfills the requirements established during the previous phase, j SPECTRUM TEC11NOLOGIES USA 6

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4. VERIFICATION AND VALIDATION OVERVIEW 4.1 ORGANIZATION This section describes the organization for design / development and venfication and validation of the subject software.

The project will include two independent groups:

1. Project Development Group - responsible for the design, development and integration of the product.

2. Software Quality Assurance Group responsible for the requirements of development of the software that supports the Class IE system, including integration with associated hardware.

PRESIDENT Project Manager: Shlomo Koch QA Manager: Bill Willis-Project- Development Software Quality Assurance (SQA) .

GrouptJ- . .

Group:

Charles,Develin. Ed Huott-(V&V engineer)

Kevin Andol.ina Mark Voorhis (Consultant)

Implementation of this Software Verification and Validation Plan is the responsibility of SQA group, which is independent of the project development group, and reports directly to the President.

All documents affecting verification and validation must be approved by Quality Assurance Manager, Project Manager and the President.

4.2 MASTER SCHEDULE Design of Software Verification and Validation Plan (VPP) 4/ ISI SVVP approval by FDI 4/1561 System Requirements Document (SRD) 4/161 Design of Software Requirement Specifications (SRS) 4/ ISI SRS approval by FDI 4/15S1 Compilation of Software Design Document (SDD) 5/ 161 Venfication of SDD vs SRS 5/1561 Module level acceptance test procedure 5/1561 Implementation 6/ ISI SPECTRUM TECllNOLOGIES USA 7

Module testing ; 6/ 181 Software acceptance test procedure 6/1B1 Testing software implementation 6/7S1 System (software / hardware) test procedure 6/7S1 Testing sptem for acceptance test 6/15 S 1

' Verificatio'n and Validation Report 6/30 S 1 Qualification Test Report At completion of All Testing Confirmation of Compliance At completion of Order 43 TOOLS. TECHN1013ES AND METHODOLOGY The tools used in this project are divided into two groups:

1) CASE tools for representing the SRD and SRS.

2) Decision tab;es or simulation results to help testing the modules and final systems.

These tocis will be part of the software verification and validation process, since they help to verify the software requirements, and to test for correctness and completeness.

Software that has been procured for use in PLC design and/or testing shall be verified and controlled during all phases of sequencer development. Procedures shall address configuration control, such as verification that the software used during testing is the same as that used for the final system. In addition, the software shall be sufficiently described so as to establish the user interface with the software; use of the software in development of the ladder logic and description of how the software will interface with the sequencer after _ installation. A determination shall be required to validate the software, such as by testing using specific case situations to assure that it functions property to perform its intended functions.

Test results shall be documented in appropriate data sheets.

The methodology is to test each phase of the software life cyc!c against the requirements from that phase.

Since the product is a Class IE equipment, licensing considerations _ must be involved. Spectrum's responsibility is to prove that.the software program conforms with the requirements imposed by the

customer, and described in the SRS. Additionally, it must be shown that the hardware supplied in the SLS comolics with hardware requirements imposed by the customer, and described in the SRD. The specifics of the software design will be provided in the Software Design Document (SDD).

The obligation to show that the requirements as imposed on Spectrum by the customer result in a system that complies with licensing regulations is outside the scope of Spectrum's responsibility.

To assure adequacy of the verification and validation process the fo!!owing steps must be taken:

a. Detailed, well defined and testable requirements must be established.

b. Software design tnust take into consideration advanced techniques of software engineeting as object oriented design, and structured design,

c. Testing must be well defined and derived from the established requirements,

d. Testing techniques must include black / glass box testing, code walkthroughs, module testing, and over all integrated testing.

e. Testing results must be well documented.

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f. Software configuration management must be enforced.

g. Changes in requirements, design or coding must go through a process of approval, documentation and venfication and validation commensurate with the criticality of the changes.

4 4 LIFE CYCLE DEFINITION ne software life cyc!c used in this project will follow the "watttfall" model that includes the following stages:

1) Specifications.

2) Design.

3) Implementation.

4) Software Integration.

5) Test.

6) Software / Hardware Integration.

7) Acceptance Test.

• 8) IrrtMlation and Checkout.

' 9) operation and Maintenance.

Items 8 and 9 are not within the scope of Spectrum Technologies responsibilities for this purchase order, ne VVP is performed in parallel to these stages, and a stage is completed only after a report is compiled indicating that the output of that stage complies with the requirements defined at the beginning of that stage.

4.5 COMPUTER SYSTEM REOUIREMENTS The computer system requirements encompass the requirements for hardware, software, and hardware / software integration. Functional and preliminary hardware requirements have been defined by Northern States Power (NSP) and Fluor Daniel in the Technical Specification for the Class IE Safeguard Load Sequencer, general logic diagrams and input / output tabulations, and written descriptions of input / output logic. To ensure that Spectrum Technologies understar.ds the requirements delineated in these documents, the System Requirements Document (SRD9000520/1) and Software Requirements Specification (SP.S9000520/1) will be developed to reiterate the NSP requirements.

4.51 Hardware Requirements The hardware documentation requirements necessary to meet IEEE Std. 603-1980 shall be supplemented by documentation of all hardware requirements that impact software. Hardware specifications are described in System Requirements Document #SRD9000520/1, and includes as a minimum:

a. Input / output, including ranges, accuracies, and data rate capability,

b. Design features (e.g., key locks) that provide administrative control of all devices capable of changing the content of the stored programs for data,

c. Initialization requirements such as power.up and power.down.

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d. Design features for the detection of system failure (e.g., computer system self. tests).

c. Manually initiated in-service test or diagnostic capabilities,

f. Human factors engineenng design features encompassing operator interfaces associated with operation, maintenance, and testing.

g. Margins for timing and memory / buffer size, including minimum margins for design.

h. Interrupt features.

The hardware shall be fabricated and qualified in accordance with STs Quality Assurance Program, which is in compliance with 10 CFR 50 Appendix B and 10 CFR Part 2L The hardware will be tested in accordance with Acceptance Test Procedure (AP9000520/1) and Seismically tested in accordance with Seismic Test Procedure (SP9000520/1). This V&V Plan shall apply to the integration of hardware with the applicable software to meet all purchase order specifications.

45.2 Software Reouirements The understanding of the software requirements shall be documented in the Software Requirements Specification (SRS). The SRS shall address, as a minimum:

a. Process inputs, including voltage and sampling frequency.

b. System software, utility routines and other auxiliary programs required for operation of the Sequencer.

c. Algorithms to be programmed with consideration being given to and handling of postulated abnormal events.

d. Data files and data required for the algorithm, including symbolic names and requirements for flexibility,

c. Process outputs, including ranges, accuracies, update interval, and human factors considerations of the operator interface.

f. Initialization requirements such as initial values and start-up sequence.

g. Program logic for response to detected failures.

h. Operator interfaces such as keyboard inputs, control panels, and displays.

i. In-service test or diagnostic capabilities.

J. Timing requirements for all time dependent events, including overall system requirements.

k. Limitations on proccuor time and ctemory capabilities, I. Security requirements such as passwords.

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5. LIFE. CYCLE VERIFICAT10N AND VALIDATION

- The following subparagraphs provide a detailed plan for the V&V tasks throughout the life cycle. For each phase, the following topics will be addressed:

a. Tasks Describes what should be accomplished.

b. Methods and Criteria Describes how to perform each task and provides acceptance criteria,

c. Inputs / Outputs Inputs required (what has to be done to accamplish the task) and outputs (what is the product that task produces),

l 51 - VERIFICATION OF REOUIREMENTS PHASE 5.1.1 Task Verification of this phase involves verifying that the Customer specified requirement, are adequately understood and documented before proceeding into the next phase of development.

5 L2 Methods and Criteria A _ Software Requirements Specification (SRS) shall be prepared by the Software Development i I

Group. The SRS will be reviewed for technical adequacy and compliance with contract requirements by the Verification and Validation Software Engineer (V&V Engineer), and by the customer. In ,

this process the V&V Engineer will: )

1. Trace the requirements of the SRS to the concept and system requirements imposed by the customer.

2. Review identified relationships for correctness, consistency, completeness, and accuracy.

- 3. Assess how we!! the SRS satisfies software system objectives and identifies key performance and critical areas of the software.

The SRS will then be approved by the Project Manager, the Quality Assurance . tanager, and the President. The SRS will then be submitted and approved by the customer.

5.L3 inputs and Outputs The inputs for Verification of the requirement phase, au the SRS and the technical requirements specified in the customer purchase order. The output. comments on the SRS document of any mistake or inconsistency with the requirements. The SRS document. once approved by the customer and the V&V engineer, wil.1 form the basis for proceeding through the design phase of developtnent SPECTRUM TECIIN0fAGIES USA 11

_ L2 VERIFICATION OF DESIGN PHASj 5.2.1 Task Verification of this-phase involves verifying that the detailed technical design is understood by

- Spectrum and_ approved b/ the customer prior to proceeding to the implementatfort phase.

5.2.2 Methods and Criteria _

A Software Design Document (SDD) shall be prepared by the Software Development Group which provides the details of the software designs necessary to sar.isfy the customer spectfications.

The V&V Engineer shall review the SDD, including logic blocks and data structures, to assure that it adequately addresses all of the SRS requirements. This review shall -150 include review of the SDD to assure that:

a. The design is technically correct.

b. The design is complete, r c. The design is consistent.-

l d. The design is implementable.

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e. De design is logically structured.

f. The design is testable.

l The SDD will then be approved by the Project Manager, the Quality Assurance Manager and the President. De SDD will then be submitied to the customer for approval.

5.2.3 Inout and Output De inputs for Verification of the design phase, are the SRS and the SDD. The output, comments on the SDD' document of any mistake or inconsistency with the requirements of the SRS. The SDD

- document, once approved by the customer and the V&V engir.cer, will form the basis for proceeding through the design phase of development.

5.3 VEniFTCATION OF iMPLEMENTATTON PHAS_R 5.3.1 Tasks -

I- Verification shall be performed on the software during design and implementation phases to ensure h

that the SDD has been correctly translated into the PLC logic. Procedures shall be developed tnat address methods employed for independently verifying the design implementation such as module testing and ladder logic walkthroughs. In addition to the specific act:vities desenbed below,

. verification of the software design implementation shall address the following concerns:

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! a. Is the ladder logic sufficiently commented to provide an adequate description of the logic?.

b. Is the implemented logic consistent with the design intent?

c. Is the source media (e.g. floppy disks) under configuration control?

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5 32 Methods and Criterm 5.3 2.1 Module Testing The Module Acceptance Test Procedure shall be prepared by the V&V Engineer and reviewed / approved by the Quality Assurance Manager and the President. This test procedure shall test each module of the software to demonstrate, using test cases, that each module adequately satisfies its design function and supports the SDD. The Module Acceptance Tests shall be performed by the V&V Engineer and results reviewed by the Quality Assurance Manager.

5.3.2.2 Ladder Locic *Walkthrouch' The V&V Engineer shall perform a walkthrough, that is, a line by line review of all ladder logic and logic blocks to verify that the ladder diagram design, adequately supports the design function of each software module, and the requirements as delineated in the SDD.

5 3.3 inruts and Outnuts The design criteria established in the SDD shall form tha basis for these tests. The results of these tests shall be reported in the V&V report, which shall be an integral part of the Qualification Test Report.

5.4 SOFTWARE VALIDATION / SOFTWARE ACCEPTANCE TEST 5,4.1 Tasks The Software Acceptance Test Procedure shall be prepared by ihe V&V Engineer, and reviewed / approved by the Quality Assurance Manager and the PresiMnt.

5.4.2 Methods and Criteria his test procedure shall test the integration of the complete software package, including integration of all modules to perform the overall design function, De test shall be performed and/or witnessed by the V&V Engineer using sufficient test cases to address all aspects of the SRS and SDD.

The ladder diagrams with relevant documentation derived from the PLC 5/10 prograat, will be sent to the customer for formal approvel.

The integration test can be part of the general system validation test.

5 4 3 input and Output The basis for this testing shall be the requirement set forth in the SRS and the SDD. De test results shall be reviewed and approved by the Quality Assurance Manager and become a part of the Qualification Test Report.

5.5 SYSTEM VALIDATION / SYSTEM (SW/HWi ACCEPTANCE TEST 5.5.1 Tasks The hardware / software integr'ation testing shall be performed to ensure the adequacy of the interface between PLC software and the Sequencer hardware.

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5.5.2 Methods and Criteria Dis testing shall be performed in accordance with the System Acceptance Test Procedure, which shall be prepared by the V&V Engineer, and reviewed / approved by the Quality Assurance Manager and the President. - This test shall include a plan for loading the software and checks to assure that the software is properly loaded and shall test the integration of the complete software package with the associated hardware to assure the final system configuration functions in accordance with intended design to satisfy the SRS, the SRD and the SDD. It shall demonstrate correct response to operator keyboard, switch, push-button input, and correct ootput to CRT displays, lights LEDs, j etc. Tiie test procedure shall specifically address the following:

a. Identification and description of test cases.

b. Relationship of the test cases with the requirements and testing of all logical branches.

c. Expected results of the test cases.

d. Special requirements or conditions for the. tests, such as hardware configuration, monitoring hardware or software, sequencing of tess,

e. The means of simulating plant systems and conditions shall be documented,

f. ' Description of how test results will be evaluated. For example, results may be compared with results obtained without computcr assistance.

g. Procedures to' report errors found during testing, and- means of retesting these errors subsequent to correction.

The testing shall be performed by the V&V Engince using sufficient test cases to address all aspects of the SRS.

15.3 Inout and Output The customer specifications form the basis for this test as reflected in the applicable SRS, SRD and SDD. The test results shall be reviewed and approved by the Quality Assurance Manager and shall form the ultimate basis for the Certificate of Compliance and be included in the Qualification Test e

Report.

5.6 SPECIAL VALIDATION REOUTREMENTS l5.6.1 Tasks

. Validation of Sequencer response during design basis conditions resulting from safety related seismic and environmental conditions shall be demonstrated. His will require the Serpencer to be running software exercising the system hardware to ensure correct function before, dunng and after a design

' basis event.

5.6.2 Methods and Criteria A Seismic Test Procedure (SP9000520/1) shall be prepared by the V&V Engineet and approved by the Project Manager, Quality Assurance Manager and the President. De testing shall be performed by a qualified test laboratory that maintains a quality assurance system in accordance with 10 CFR SPECTRUM TECIINOLOGIES USA 14

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! 50 Appendix B in accordance wah the requirements of IEEE standards 3441975 and 3231983.

I 5.6 3 Inputs and Outputs The testing shall be performed as indicated in section 5.6.2, above, and the results sha, be documented in c Seismic Test Report, which will be included in the Qualification Test Report.

6 VERIFICATION AND VALIDATION ADMINISTTIATION 61 ANOMALY REPORTING AND RESOLUTION All anomalies encountered during the development phase of the life cycle shall be immediately documentc0 on a nonconformance report (see copy in appendix A). If resolution of such anomalies requires change to the software, the task iteration policy shall be applied as specified in secuon 6,2 below.

6 2 TASK ITERATION POLICY Any software changes shall be reviewed by the project manager. A test procedure, commensurate with the magnitude of the change and the criticality of the function involved, shall be prepared by the project development group and approved by the V&V Engineer, the Quality Assuratice Manager, and the President. Any software changes that cause the softy are to deviate from the approved SRS shall De dispositioned as specified in section 6.3 below.

63 DEVTATION POLICY Any deviation from approved procedures or specifications shall be cicarly identified in wTiting ard approved by the Project Manage , the Quality Assurance Manager and the President. Any deviations from the requirements specified in the SRS shall also be approved by the customer before implementation. l 6,4 CONTROL PROCEDURES All procedures and reports shall be reviewed and signed by the Project Manager, the Manager of Quality Assurance, and the President. All records (procedures / reports / test results) shall be maintained and stored l in accordance with established Spectrum Technologies Quality Assurance Program requirements.

7. SOFTWARE VERIFICATION AND VALIDATION REPORTING System validation tests will be independently verified in accordance with methodology previously discussed.

The results of the validation testing and the independent verification shall be documented in the Verification and Validation Report (VVR). This report shall summarize the results of the computer system validation testing and shall show how the system is in compliance with the requirements. The report shall recifically include a completed copy of the test procedure containing the fo!!owing typical information:

a. Hardware used.

b. Test equipment and Calibration Dates

c. Date of the tests and the individuals performing the tests. i

d. Identification of test cases. j

e. Results,

f. Resolution of anomalies.

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- This VVR shall be submitted to the Customer for approval; and, upon approval shall form an integral part of the Qualification Test Report (QTR). Based on the VVR, th: Contirmation of Conformance (COC) shall be prepared, signed by the Quality Assurance Manager and the President, which shall certify that both the software and hardware have been successfully tested and meet contract requirements. This COC shall also be included in the Qualification Test Report.

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APPENDIX A - NONCONFORMANCE REPORT SPECTRUM TECIINOLOGIES USA 17

.l ~ 5 NCR No. _

Date:

SPECTRUM TECHNOLOGIES USA, INC.

NONCONFORMANCE REPORT Sp sctrum Technologies Purchase Order No.

C.ustomer/ Customer Order No.

Supplier of Part/ Components / Material Nonconforminct IteJ:.

Description of Part Descriplion of Nonconformance: l Reported By:

Date-

. Recommended Disocsition:

Accept.As-Is Repair or Rework

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l. NCR No.

Date:

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l. Justification For Accept As-Is/Renair/ Rework Disposition:

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-' Customer's Comments / Concurrence on " Accent As-Is" And Repair / Rework l

Items When Reauired:

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Annrovals:

i Project Engineer Cate Quality Assurance Manager Date l

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