ML20099C258

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Nonproprietary Rev 2 to Core Protection Calculator/Control Element Assembly Calculator Sys Phase II Software Verification Test Rept
ML20099C258
Person / Time
Site: San Onofre Southern California Edison icon.png
Issue date: 11/30/1984
From:
ABB COMBUSTION ENGINEERING NUCLEAR FUEL (FORMERLY
To:
Shared Package
ML13309B474 List:
References
CEN-269(S)-NP, CEN-269(S)-NP-R02, CEN-269(S)-NP-R2, NUDOCS 8411190449
Download: ML20099C258 (26)


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SOUTHERN CALIFORNIA EDISON, SAN ONOFRE NUCLEAR GENERATING STATION 2 (SONGS 2)

DOCKET 50-361 CEN-269(S)-NP

  • REVISION 02-NP
  • O CPC/CEAC SYSTEM l

PHASE II SOFTWARE VERIFICATION TEST REPORT NOVEMBER 1984 COMBUSTION ENGINEERING, INC.

Nuclear Power Systems Power Systems Group l Windsor, Connecticut 8411190449 841115 PDR ADOCK 05000361 P PDR

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LEGAL NOTICE j THIS RESPONSE WAS PREPARED AS AN ACCOUNT OF WORK SPONSORED BY COMBUSTION ENGINEERING, INC. NEITHER COMBUSTION ENGINEERING NOR ANY PERSON ACTING ON ITS l BEHALF:

a. MAKES ANY WARRANTY OR REPRESENTATION, EXPRESS OR IMPLIED INCLUDING THE WARRANTIES OF FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY, WITH RESPECT TO THE ACCURACY, COMPLETENESS, OR USEFULNESS OF THE INFORMATION CONTAINED IN THIS RESPONSE, OR THAT THE USE OF THE INFORMATION CONTAINED IN THIS RESPONSE, OR THAT THE USE OF ANY INFORMATION, APPARATUS, METHOD, OR PROCESS DISCLOSED IN THIS RESPONSE, OR THAT THE USE OF ANY INFORMATION, APPARATUS, METHOD, OR PROCESS DISCLOSED IN THIS RESPONSE MAY

.i NOT INFRINGE PRIVATELY OWNED RIGHTS; OR

b. ASSUMES ANY LIABILITIES WITH RESPECT TO THE USE OF, OR FOR DAMAGES RESULTING FROM THE USE OF, ANY INFORMATION, APPARATUS, METHOD OR PROCESS DISCLOSED IN THIS RESPONSE.

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ABSTRACT Phase II Testing is performed on the CPC/CEAC System to (1) verify that the CPC and CEAC software modifications have been properly integrated with the CPC and CEAC software and system hardware and (2) provide confirmation that the static and dynamic operation of the integrated system as modified is consis-tent with that predicted by design analyses, which provide design inputs to CPC/CEAC Functional Design Specifications.

This report presents the Phase II test results for the San Onofre Nuclear Generating Station Unit 2 Plant CPC/CEAC Revision 03 software. This revision is applicable to SONGS-2 Cycle 2.

The Phase II Software Verification Tests have been performed as required in Reference 1. In all cases, the test results fell within the acceptance criteria, or are explained. The test results are that both the CPC and CEAC software have no indication of software error and that the operation of the integrated system is consistent with the performance predicted by design analyses.

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TABLE OF CONTENTS Section Title Page No.

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1.0 INTRODUCTION

5 1.1 Objectives 5 1.2 Description of Phase II Testing 6 1.3 Applicability 6 2.0 CPC/CEAC INPUT SWEEP TESTS 7 2.1 CPC Input Sweep 7 2.1.1 CPC Input Sweep Test Case Selection 7 2.1.2 CPC Processor Uncertainty Results 7 2.1.3 Analysis of CPC Input Sweep Test Results 8 2.2 CEAC Input Sweep Test 10 2.2.1 CEAC Input Sweep Test Case Selection 10 2.2.2 CEAC Input Sweep Test Results 10 2.2.3 Analysis of CEAC Input Sweep Test Results 10 1

3.0 DYNAMIC SOFTWARE VERIFICATION TEST 12 3.1 DSVT Case Selection 12 3.2 Generation of DSVT Acceptance Criteria 13 3.3 Analysis of DSVT Results 19 4.0 LIVE INPUT SINGLE PARAMETER TEST 22

, 4.1 LISP Test Case Selection 22 4.2 Generation of LISP Acceptance Criteria 22 4.3 LISP Test Results 23 5.0 PHASE II TEST RESULTS

SUMMARY

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6.0 REFERENCES

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1.0 INTRODUCTION

The verification of software modificatans of the CPC/CEAC System consists of several steps which address two major areas of the modification process:

(1) Definition of software modifications (2) Implementation of software modifications The definition of software modifications is documented in the Software Change Procedure (Reference 1), CPC and CEAC Functional Design Specifications (References 2 & 3), and the Data Base Listing, (Reference 4), and is verified by design analyses contained in recorded calculacions. The implemantation of software modifications is documented in Software Design Specifications and program listings.

The verification process for the modified software implementation is two-phase: Phase I testing (Reference 5), must be performed before Phase II. Successful Completion of Phase I Testing verifies the correct implementation of the modified software. Phase II testing completes the software modification process by validating that the integrated CPC System responds as expected.

This document contains the test results and conclusions for the Phase II software verification test.

1.1 Objectives The pr' mary objective of Phase II Testing is to validate that the CPC and CEAC software modifications have been properly integrated with the CPC and CEAC software and system hardware. In addition, Phase II testing provides confirmation that the static and dynamic operation of the integrated system as modified is consistent with j that predicted by design analyses. These objectives are achieved by I

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comparing the response of the integrated system to the response predicted by the CPC/CEAC FORTRAN Simulation Code. This comparison is performed for a selected set of simulated static and dynamic input conditions.

1.2 Description of Phase II Testing Phase II testing consists of the following tests:

(1) Input Sweep Tests for the CPC and the CEAC, (2) Dynamic Software Verification Test, and (3) Live Input Single Parameter Test.

These tests are performed on a Single Channel Test Facility (SCTF) of the CPC/CEAC System with integrated software that has undergone successful Phase I. testing. (Reference 5) 1.3 Applicability This report applies to the Phase II Testing performed on the Southern California Edison (SCE), San Onofre Nuclear Generating Station 2 (SONGS-2) CPC/CEAC System Software. The software revisions documented in this report are designated as Revision 03 to j the SONGS-2 CPC/CEAC System Software. This revision is applicable

! to SONGS-2 Cycle 2.

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2.0 CPC/CEAC INPUT SWEEP TESTS The Input Sweep Test is a real-time exer-ise of the CEAC and CPC application software and executive software with steady-state CPC and CEAC input values read from a storage device. These tests have the following objectives:

(1) To determine the processing uncertainties that are inherent in the CPC and CEAC designs; (2) To verify the ability of the CPC and CEAC algorithms used in the system hardware to initialize to a steady state after an auto-restart for each of a large number of input combinations within the CPC/CEAC operating space; and (3) To complement Phase I module testing by identifying any abnormalities in the CPC and CEAC algorithms used in the system hardware which were not previously ur. covered.

2.1 CPC Input Sweep 2.1.1 CPC Input Sweep Test Case Selection test cases, each involving different combinations of process inputs and addressable constants, were used for CPC design qualification testing of the Revision 03 software.

2.1.2 CPC Processor Uncertainty Results For each test case, differences in the results of the FORTRAN Simulation Code and Single Channel Test Facility (SCTF) were calculated. A statistical analysis of these differences produced the processing uncertainties.

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The DNBR statistics did not include those cases for which the DNBR as calculated on either system was at the limits This is because a difference of zero (or close to zero) would be compuh, and would incorrectly weight the distribution of differences.. A

, total of( ) cases remained after these cases were eliminated. The LPD statistics did not include those cases for which the LPDDC as calculated on either system was equal to or greater than the upper

] core average kW/ft (=( ]kW/ft). A total o ( ]

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limit of {

cases remained after these cases were eliminated.

Although cases were not included in the computation of DNBR and LPD statistics, respectively, they were still included as Input Sweep Test cases for the purpose of identifying potential software errors.

The processor uncertainties for DNBR and LPD are defined as the one-sided tolerance limits which encompass 95% of the distribution of DNBR and LPD differences for all test cases with a 95% confidence level. The processor uncertainties thus determined from Input Sweep for DNBR and LPD, respectively, are(

]DNBRunits,and{

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] core average kW/ft.

However, since the distribution of differences is so restrictive, the maximum error may be used (that is, the limits which encompass 100% of the difference)., This is more conservative and yet still results in small processor uncertainties. Thus, defined the DNBR and LPD processing uncertainties Fr Fevision 03 of the CPC are

NP unfts and core average kW/ft, respc,1 W 2.1.3 Analysis of CPC Input Sweep Test Results

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w The results of the test cases exceeding the 95/95 tolerance limit were analyzed for evidences of software errors. For DNBR there were cases below the lower tolerance limit of (DNBRunits)and

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testcasesabovetheuppertolerancelimitof{

](DNBR un "its). For these() test cases the difference between the SCTF and the CPC Fortran Simulation Code is within the accuracy of the two systems. The largest percent error among the( ) cases was '.

These differences do not show a significant commonality sinEe the" differences are absolute (not relative) and it should be expected that the largest differences should occur at high DNBR's. It is therefore concluded that no errors are indicated in the CPC Single Channel DNBR program.

ForLPDthecasesexaminedtherewere(caseswithdifferences belowthelower95/95tolerancelimitoI[ ](%ofcoreaverage kW/ft)and(]caseswithdifferencesgreaterthantheupper tolerance limit of , .}

The largest percent error among the The 3caseswas ,

connon input to these test cases was found in other test4cases with less maximum difference and less perccnt error. Examination of the inputs to all ( LPD cases outside the tolerance limits showed that i

the inputs covered a wide spectrum. No common area was found.

Therefore it is concluded that the Input Sweep test results do not indicate software errors either in the DNBR or in the LPD

! calculations.

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2.2 CEAC Input Sweep Test 1

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test cases, each involving different combinations of CEAC process inputs were used for CEAC design qualification testing of the Revision 03 software. Then te;t cases covered all CEAC operating space.

2.2.2 CEAC Input Sweep Test Results For each test case, differeni.es between the CEAC FORTRAN Simulation Code and CEAC single channel system results were calculated. The processor uncertainties for DNBR and LPD are defined as the one sided tolerance limits which encom;, ass 95% of the distribution of DNBR and LPD penalty factor differences for all test cases with a 95%

confidence level.

The processor uncertainties for the DNBR and the LPD penalty factor differences are less than and less than respectively.

2.2.3 Analysis of CEAC Input Sweep Test Results l

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l The SONGS-2 cycle 2 CEAC Input Sweep Test results were reviewed for evidence of computational differences between the CPC/CEAC FORTRAN Simul,ation Codt and the SCTF. In all cases the deviation was less than This is acceptable as an indication of the absence of software errors.

It is therefore concluded that the CEAC Input Sweep Test results do not indicate software errors either in the DNBR or in the LPD penalty factor calculations.

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l l 3.0 DYNAMIC SOFTWARE VERIFICATION TEST l

The Dynamic Software Verification Test (DSVT) is a real time exer-  ;

cise of the CPC application software and executive software with transient CPC input values read from a storage device. This test i has two objectives:

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(1) To verify that the dynamic response of the integrated CPC software is consistent with that predicted by design analyses, and (2) To supplement design documentation quality assurance, Phase I module tests, and Input Sweep Tests in assuring correct imple-mentation of software modifications.

Further information concerning DSVT may be found in Reference 1.

3.1 DSVT Case Selection Test cases for DSVT are selected to exercise dynamic portions of the CPC software with emphasis on those portions of the software that have been modified.

DSVT requires that, as a minimum, cases be selected for testing Reference 1. These cases are from the Phase II test series (identified in Reference 1) and consist of a I, -

However, because of extensive software modifications the entire

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series of applicable DSVT Test cases was executed using the CPC/CEAC FORTRAN Simulation Code and the Single Channel Test Facility (SCTF) with the Rev. 03 CPC Software.

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3.2 Generation of DSVT Acceptance Criteria Acceptance criteria for DSVT are defined in Reference 1 as the trip times and initial values of DNBR and LPD for each test case. These Acceptance Criteria are generated using the certified CPC/CEAC FORTRAN Simulation Code and the Data Base Listing for SONGS-2.

Processing uncertainties obtained during Input Sweep testing are factored into the acceptance criteria for initial values of DNBR and LPD where necessary. Trip times are affected by program execution lergths as well as by the processing uncertainties. The minimum, average, and maximum execution lengths (in milliseconds) calculated for the Revision 03 software are listed below.

CPC Application Program Execution Lengths Program Minimum Average Maximum (msec) (msec) (msec)

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- POWER STATIC Each DSVT case is initially executed on the CPC/CEAC FORTRAN

! Simulation Code once with the nominal program execution lengths (values between the minimum and maximum) and the data base values of Page 13 of 26 l _ . _ . . _ ._ - _ .

l trip setpoints. During this phase, it is verified that the test data l executed for each test case produces the intended initialization and transient output. Once the test cases have been adjusted appropriately for the given plant and CPC/CEAC configuration, they geexecutedontheSingleChannelTestFacility(SCTF).{

, The test case is executed with the CPC/CEAC FORTRAN Simulation Code once with minimum execution lengths and the most conservative trip setpoints and once with maximum execution lengths and/or least conservative trip setpoints. This process, produces a band of trip times for the test cases which contains the effects of processing uncertainties. The largest band of acceptable trip times will be obtained if the modified execution lengths and adjusted trip setpoints are used simultaneously.

The software DSVT program includes,a millisecond interrupt cycle, to check for DNBR and LPD trip signals. This results in a millisecond-interval limit on trip time resolution which is factored into the acceptance criteria. The following tables contain the final DSVT acceptance criteria for initial values and trip times for DNBR and LPD.

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Acceptance Criteria for DNBR and LPD Initial Values (DNBR Units and kW/ft., respectively)

DNBR DNBR LPD LPD Test Case (Min.) (Max.) (Min.) (Max.)

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Acceptance Criteria for DNBR and LPD Initial Values (DNBR Units and kW/ft., respectively)

(Continued)

DNBR DNBR LPD LPD Test Case (Min.) (Max.) (Min.) (Max.)

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l Acceptance Criteria for DNBR and LPD Trip Times (seconds) i

! DNBR DNBR LPD LPD Test Case (Min.) (Max.) (Min.) (Max.)

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i Acceptance Criteria for DNBR and LPD Trip Times (seconds) l (Continued)

DNBR DNBR LPD LPD Test Case (Min.) (Max.) (Min.) (Max.)

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3.3 Analysis of DSVT Results Results of DSVT are listed in the table on the following pages.

W Therefore, it is concluded that the DSVT does not indicate any errors in the CPC software.

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i DSVT Results ,

Initial Initial DNBR LPD DNBR Trip LPD Trip J

Test Case (DNBRUnits) (kW/ft.) (sec.) (sec.)

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i DSVT RESULTS (Cont.)

Initial Initial DNBR LPD DNBR Trip LPD Trip Test Case (DNBR Units) (kW/ft.) (sec.) (sec.)

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4.0 LIVE INPUT SINGLE PARAMETER TEST The Live Input Single Parameter test is a real-time exercise of the CPC/CEAC application and executive software, with transient CPC/CEAC input values generated from an external source and read through the CPC/CEAC input hardware. The objectives of this test are:

(1) To verify that the dynamic response of the integrated CPC/CEAC software and hardware is consistent with that predicted by design analyses.

(2) To supplement design documentation quality assurance, Phase I module tests, Input Sweep Tests, and DSVT in assuring correct implementation of software modifications.

(3) To evaluate the integrated hardware / software system during operational modes approximating plant conditions.

4.1 LISP Test Case Selection Reference 1 identifies the test cases to be used for LISP. These cases are the single variable dynamic transient test cases from the Phase II test series.

These test cases, which are applicable to SONGS-2, consist of a l

4.2 Generation of LISP Acceptance Criteria The acceptance criteria for LISP are based on trip times for the l dynamic test cases. For the non-target CEA drop test case, there l should be no trip.

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These cases are simulated within the FORTRAN Simulation Code and contain the following adjustment components.

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b Application program execution lengths used for LISP testing were the same as those for DSVT, with the addition of CEAC minimum and maximum execution lengths of. msec, respectively.

~ 4 The final acceptance criteria (generated by the FORTRAN Simulation i

Code and adjusted for the above components) for LISP are contained

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Test Case Minimum Trip) Time (seconds Maximum Trip) Time (seconds

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p 4.3 LISP Test Results The dynamic transients were executed on the Single Channel Test Facility (SCTF). The recorded trip times (in seconds) for each case are listed in the following table:

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All recorded trip times met the final acceptance criteria for LISP.

Major aspects of tM system diagnostic features were verified. _

These include the W

)The Tddressable constant range limit check and all aspects of automated

' reentry of Addressable constants were also tested. Therefore, all testing was determined to be acceptable and the system diagnostic features were correctly implemented.

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5.0 PHASE II TEST RESULTS

SUMMARY

The Phase II software verification tests have been performed as required in Reference 1. The test results are that both the CPC and CEAC software have no indication of errors and that the operation of the integrated system is consistent with the performance predicted by design analyses, which provide design inputs to CPC/CEAC Functional Design Specifications.

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6.0 REFERENCES

1. CPC Protection Algorithm Software Change Procedure, CEN-39(A)-NP, Revision 02 December 1978
2. Functional Design Specification for a Core Protection Calculator CEN-147(S)-NP, February 1981
3. Functional Design Specification for a Control Element Assembly S., Calculator. CEN-148(S)-NP, January 1981
4. CPC and CEAC Data Base Listing, CEN-266(S)-NP, Revision 01, November 1984
5. CPC/CEAC System Phase I Software Verification Test Report, CEN-176(S)-NP, Revision 03, November 1984

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COMBUSTION ENGINEERING, INC.

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