ML17213A626
| ML17213A626 | |
| Person / Time | |
|---|---|
| Site: | Saint Lucie  |
| Issue date: | 10/29/1982 |
| From: | ELECTRO-MECHANICS, INC. |
| To: | |
| Shared Package | |
| ML17213A623 | List: |
| References | |
| TS-8021-1, NUDOCS 8211040177 | |
| Download: ML17213A626 (58) | |
Text
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~ g ELECTRO-MECHANICS, INC.'ew Britain, Connecticut RPS MATRIX MOCK-UP FAULT ISOLATION AND SURGE WITHSTAND QUALIFICATION TEST REPORT Florida Power 5 Light St. Lucie Unit 2 Test Report TS 8021-1 8211040177 821029 '!
TABLE OF CONTENTS Section No. Title ~Pe e No.
U 1.0 ABSTRACT
2.0 REFERENCES
2 3.0 SCOPE 3 0.0 SURGE WITHSTAND TESTING RESULTS 6 5.0 FAULT ISOLATION TESTiNG RESULTS 9
6.0 CONCLUSION
S 15 Appendix A EM 'ZP 8021-1, Rev. B, Test Procedure Appendix B EM TR 8021-1, Rev. B, Test Record (Data)
Rev. A
'i V
r RPS Matrix Mock-Up Fault Isolation and ur-'ga Withstand Quakification Test Report 1.0 ABSTRACT The RPS matrtix circuit with associafed Bistable Trip
.Unite., -power..supplies;-relays,- fuses, clamp circuits and'
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oCher'- items as defined by Ref. 2.1 and in Appendix A, was
-constructed as a mock-up using components and materials as used in the actual RPS. This circuit was subjected to high 'frequency transient surges and high voltage main-tained faults, as defined in Ref. 2.1'and Appendix A. In all tests, the monitored simulated vital buss voltage was not-. disturbed beyond its allowable limit (+10+) and the Bistable Trip Units and Trip Path Relays did ocr form their reouired ~safet. funotion (oontaots opened and remained
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open). Testing was performed by and at Electro-Mech-anics, Inc., New Britain, CT.
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2.0 REFERENCES
2..1-- CE.Yi0"89230084 .(No Rev).
2.2 IEEE Std. 472-1974 (As modified by Ref. 2. 1) 2 3-:.C7. 13172-ICE-3001 (Rev. 02) RPS Spec.
2.4 CE-.OOOOO-ICE-3001-'('Rm. 01)'TQ Spec.
2.5 EM 34709 (Rev. D) RPS P/S Schematic
3.0 SCOPE The intent of this testing was to demonstrate the ability of the RPS matrix and associated protective circuits to limit the propagation of high frequency transients from one plant vital buss to another when that transient is ap-plied in transverse mode (between hot and neutral lines of buss) or in common mode (either hot or neutral line to earth chassis).
Further, it was intended to demonstrate that when 600 UAC or'400 VDC faults are applied in transverse mode (across the output of the matrix power supply fault isolation clamp circuit;) and in common mode (matrix power supply 1
positive output to earth '- chassis - and negative output to chassis), the remaining matrixes will perform as de-signed to initiate a reactor trip when required.
To accomplish'these ends, a mock-up was con tructed on a plywood base consisting of bistable trip units, matrix power supplies', power supply fault clamp circuits, fuses, matrix relay cards,- trip path relays and all associated interbay isolation fuses and vital buss line fuses, inter-wired to simulate the Bay A and Bay B portions of the RPS AB matrix circuit. Vital AC busses were simulated by 120 volt to 120 volt isolation transformers.'he exact circuit is shown as Figure in Appendix A. Prior to 1
testing, the tripping accuracy cf each BTU is .-.easured and the correct operation of,the trip path relays is ver if'ed.
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- 3. 1 SURGE TEST
SUMMARY
For surge withstand testing, a Velonex type 510 XEEE-type surge transient generator capable of producing 1MHz oscillatory decaying transients was used to create the required voltage pulses of 300 volt peak-to-peak amplitude for. the first full cycle. These were appled through a Velonex type -V2538 isolator to the'imulated vital buss "B" (the is'olator prevents loading of the pulse generator by the- line source im-pedance). The vital buss was adjusted to rated max-
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imum of 132 Vrms with a variable autotransformer.
The pulse was synchronized to occur at the positive line voltage peak, so as to produce a net peak volt-age of at least 337 volts (the sum of peak line volt-.
age and peak surge voltage).
Xn transverse mode, these pulses were applied di-rectly to the "B" vital buss. Two (2) oscilloscope photos were obtained clearly indicating the required-levels were attained.
While the pulses were being applied, the Bay B and Bay A BTU's were tested for tripping accuracy, three. (3) oscilloscope photos were obtained of the simulated "A" vital buss and the trip path relays were observed to trip as required. For additional information, the matrix relay coil voltage for bay "A" was also photographed from an oscilloscope wave-form,
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I., common mode, the pulses were applied separately between each line of the "B" vital buss and the "B>>
matrix po~er supply chassis (earth). The same data and photographs were obtained as for transverse mode testing.
Subsequent to the surge testing, the BTU"s were again tested for tripping accuracy and all components were examined or tested for permanent damage or degra-dation.
3.'2 . FAULT TEST
SUMMARY
Fault testing was accomplished with the use of a 30KM power source capable of delivering greate. than 600 VAC and 000 VDC at 50 amperes (the equipment was built by Electro-Mechanics and is designated as TE-273N). 'In transverse mode, the fault was applied to the output side of the Bay A matrix power supply fault isolation clamp circQit, which is also across the "A" matrix relay coil, through isolation fuses.
In common mode, the fault was applied first betwen the "A" matrix power supply positive output and its chassis, then between its negative output and its chassis.
Monitoring was accomplished with oscillographic re-corder s. -During each test, one recorder chan. el con-tinuously monitored the fault source voltage at a de-
'flection factor of approxima"ely 1950 volts per inch. A second recorder monitored any fault current
that @i~hi flow, at a de Rsat30rr factor of 5"A per inch (c amped at. approxiuat.eely 7'axi "ua indica>>
tion) The simulated Bay A v'ta' ss v"s also -;"on-e tored to deter"inc the ~axe."-u. distu",)ance due to th>e faud.t, at n deflection factor of appr oxi~ate3.y 7~0 volts per inch. Ho greater 'han 10$ variations durir>g the fault test was allowed.
An additicnE1 two (2} Channel> tnonitor ed the status of the AG/AD and BC/BD r;atrix-a sociated trip con-tacts in the Bay A and Bay B BTU's, re pectively.
Puring each fault test, the BTU's we~e required to enter a tripped condition when the signal level ex-ceeded the tr'ip sebpoints. Trippkag accuracg was de-
. -ter mined,.
For "he trsnsver se mode tests only, an additional, channel monitored the Bay A r.atria power supply DC output at a deflection factor of approximately 2< vo 'ts per inch. This channel was for reference only vXth no failure c-.iterian est,ablistiea.
Each teat maintained the f'suit condition for five (5) minutes. At. the end of each t,est, the circa)t ~ock-up was tested and examined f'r damage resu}.t'ir>g f".on the fault spph.feat ton < The failed par ts were re-corded, alonE uLth the nature of the sieur e, in the Test Record.
Zn summary, the acceptance cr iteria are:
I. Surge >Jithstand A-. Ability of BTU s to maintain required trip-ping accuracy during surge (~10mV).
B. Variation in unpulsed vit,al buss voltage during surge less than +10'~16.96V).
II. Fault, A. Ability of BTU's to attain and maintain trip-ped status in unfaulted. matrixes with trip-ping accuracy of +10mV.
B. Variation 'in vital buss voltage during fault less than +10~ (+16.96V) .
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4.0 SURGE WITHSTAND TEST RESULTS (See Photos, Appendix B)
- 4. 1 PULSED VITAL BUSS DATA (INPUT)
For each mode, that is, transverse, common-hot and common-neutral, peak line voltage was approximately 200 volts and the transient peak voltage was greater than 150 volts over line peak voltage, thus exceeding the minimum required input amplitude of 338 volts.
4.2 TEST RESULTS 4.2.1 Transverse Mode The maximum observed variation in the unpulsed vital buss was 3.7V peak-to-peak around the line voltage peak. This is within the defined limit of +10+ of instantaneous line voltage (+16.96 volts). The un-pulsed vital buss voltage was 120 Vrms or 170 volts peak.
4.2.1.2 The input of the "A" matrix power supply was discon-nected from the unpulsed vital buss to eliminate line attenuation of whatever surge was present. The same acceptance criteria applies to the open circuit as was applied to the normal configuration. This photo-graph is included in Appendix B.
4.2.1.3 For reference purposes on'y, a photograph of the "A" matrix relay coil voltage was also included in Appen-dix B. Variations greater than 28 volts peak-to-peak were observed.
4.2.1.4 Both BTU's tripped within +0.010mV of their unsurged tripping voltages during the surge application.
4.2.2 Common Mode Hot 4.2.2.1 The maximum observed variation in the unpulsed vital buss (matrix power supply AC-input), with the line connected or disconnected, was 5.1 volts peak-to-peak around the peak line vo'age, within the +10) limit (+16.96 volts).
4.2.2.2 The "A" matrix relay coil voltage had variations of about 18 volts peak-to-peak. This data is for refer-ence only.
4.2.2.3 Both BTU's tripped within +0.010mV of their unsurged tripping voltages during the surge application.
4.2.3 Common Mode Neutral 4.2.3. 1 The maximum variation in the unpulsed vital buss with the line disconnected or normal was 3.8 volts peak-to-peak around the line voltage peak. This is within the allowed limit of +10~~ or +16.96 volts.
4.2.3.2 The "A" matrix relay coil voltage had var iations of about 18 volts peak-to-peak. This data is for refer-ence only;
OO ~ I 4.2.3.3 Both BTU's tripped within +0.010mV of their unsurged tripping voltage during the surge application.
4.2.4 General 4.2.4. 1 Subsequent to all surge testing, the matrix mock-up
.' ..-continued to function normally.. There was no evi-dence of .component degradation or failure.
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5.0 FAULT TEST RESULTS 5.1 The fault voltage sour ce was ver ified prior to test.
by applying known load resistors and measuring the output voltages to be 628 VAC rms and 022 VDC, each at 50 amperes.
5.2 TEST RESULTS 5.2.1 Transverse Mode 600 UAC 5.2. 1..7 .During the five (5) minute duration of the fault', no deviation of the "A" vital .buss was observed.
Approximately halfway through'he fault, the BTU's were tripped by increasing their signal levels. The recorder charts indicated that the matrix contacts not associated with the faulted matrix did indeed at-tain and maintain tripped status thru the remainder of the test. The BTU's tripped within their required accuracy.
H 5.2.1.2 Subsequent to the test, the circuit mock-up was in-spected for damages. The following defective com-ponents were found (refer to Figure 1, Appendix A, for component designations):
Fuses F6, F8, F13, F15 and F21 opened, as is their .function, to isolate the ault.
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- b. On the "A" matrix relay card, the series 'nput resistor failed open and th relay coil sup-pression diode failed short.
- 5. 2. 2 Transver se Mode +400 VDC 5.2.2. 1 As for the 600 VAC test, no deviation of the vital buss voltage was observed. Both BTU's tripped their unfaulted matrix*contacts within rated accuracy.
5.2.2.2 The following damage was found:
- a. Fuses F8, F13 and F15 opened.
- b. The "A" matrix relay .card input resistor opened.
5.2.3. Transverse Mode -400 VDC 5.2.3.1 There was no deviation of the vital buss both BTU's successfully tripped their unfaulted matrixes within required accuracy.
5.2.3.2 The following damage was found:
- a. Fuses F6, FS, F13, F15 and F20 opened.-
- b. The "A" matrix relay card input resistor opened.
5.2.4 Common Node Tests 600 VAC and +400 VDC 5.2.4.1 With the fault applied either between the "A" matrix power supply positive output to chassis or to the negative ouptut to chassis, no discernable variation occurred on the vital buss voltage.
5.2.4.2 For all tests, the unfaulted BTU matrix contacts at-tained and maintained tripped status with the re-quired accuracy.
5.2.4.3 There was no evidence of damage to any component as a result of these tests.
6.O CONCLUSIONS 6.1 "The RPS matr ix circuits, as mocked-up, act to atten-uate transient surges applied to one of its vital buss inputs to values below the defined limits when measured at another vital bus while maintaining full rated accuracy of its safety monitoring function.
6.2 The RPS matrix circuit, as mocked-up, acts to isolate high level fault voltages from the vital busses while maintaining ability to sustain its safety function (tripped status) in unfaulted matrixes during and a ter fault application within, full rated accuracy.
APPENDIX A
~ I ELECTRO-MECHANICS, INC.
New Britain, Connecticut Florida Power 6 Light St. Lucie Unit II F-Reactor Protective System MATRIX MOCK-UP FAULT ISOLATION and SURGE WITHSTAND QUALIFICATION TEST PROCEDURE Test Procedure TP 8021-1
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p 0 Matrix Mock-Up Fault Isolation ar.d Surge Nithstand Qualification Test Procedure 1.0 SCOPE lt will be shown that before, dur ing and after a surge or fault application, the BTU in the RPS matrix mock-up will perform its required safety function (i.e. provide a trip actuation to unsurged/unfaulted matrices within required accuracy).
1.1 To demonstrate the ability of the HPS. matrix circuit (Figure 1) to isolate 000 VDC and 600 VAC .aults,.
applied as shown in Figure 2 .rom the remaining ma-trices. The acceptance criteria is defined as: 1)
Ho disturbance of the redundant vital AC bus voltage greater than +105 as monitored on an oscillographic recorder, and 2) The ability of the unfaulted BTU r c-lays associated with the AC, AD, BC and BD matrixes to perform required safety functions (i.e., to open BTU bistable contacts) during and subsequent to the fault.
,1 ~ 2 To demonstrate the ability of the HPS matrix circuit (Figure 1) to operate normally (i.e., trip within
. ated accur"cy) during and aft r application of a transier.t surge as shown in Figur 3. Acceptance criteria are: 1) The BTU operating on the vital,bus being surge tested must trip within +10mU of its pre-test setpoint, and 2) the opposit vital bus voltage mus" not vary more than ~ 10$ at any insta'nt of time Rev. B TP SG21- '1 Page 2 cont. on 3
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2.0 REFERENCES
. I CE C~cn r ac>,gc23008I /13172 (Including EPE-RFE-023) 2.2 EM Dwg. TE-273N (Fault Test Apparatus Schematic) 2 g EM Dwg. 834860, Rev. G (BTU A sembly)
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2.4 ZH 'Dwg. -8'34610,.1Rev..': C" (Matrix Relay Card Assemblv) 2 2.5 EM Dwg. 834705, No Rev. (Fault Prot. Trigger Card assembly) 2.6 EM Dwg. 834707, Rev. C (Fault Component Brkt.
Assembly) 3.0 TEST EQUIPMENT (Record manufacturer, model/serial num-bers and calibration dates in Test"Record.)
3.1 TE-273N Fault Voltage Source (.400 VDC, 600 VAC) 3.2 Two (2) Honeywell Model 1858 Oscillographic Re-
. orders with at least Six (6) Amplifier Modules 3.3 Velonex Type 510 Transient Surge Generator 3.4 Velonex Type V2538 Line Isolator Rev'. A TP 8021-1 Page 3 cont. on
pp 3.5 Oscilloscope, Tekt,ronix Type 7633 with two (2) 7A15A Ver tioal Plug-Ina and One (1) 7B53A Horizontal Plug-3e6 Oscilloscope Camera, Tektr onix C51P with at least Eighteen (18) Exposures or equivalent 4.0 TEST SET-UP
~ r 4.1 'Refer to Figure 1 for detailed mock-up schematic.
4.2 Test is to be pe. formed at normal room atmosphere.
4.3 Fault testing is to be performed with a.pparatus con-nected as shown in Figure 2.
Surge testing is o be performed with apparatus con-nected as shown in Figure 3.--
- 5. 0 SURGE TESTING I
5.1 Energize the four (4) isolation transformers. Set
. variable. autotransformer output to 132 VAC. Adjust both BTU trip setpoints to +3.000 UDC (pretrips may be +5 VDC). Increase the signal voltage to the "Bay A" BTU and record its tripping volt,age
(+3.000+0.010 VDC). Leaving "A" tripped, trip "B" in the same manner and record the voltage. Verify that Rev. A TP 8021-1 Page 4 cont. on 5
the UV relays have de-energized. Reset both signal to +2.500 VDC and reset the trip indicators. The U relays..wil1...re-erergize.. Tripping of the BTU is-in dicated when its trip status lamp just illuminates.
5.2 The scope is to be triggered in the "EXT" mode by th
.Velonex 510 "EXT" trigger jack for all tests.
-- 5 ~ 3 TRANSVERSE YiODH * ~ ".':
5.3;1 Connect scope to terminals A and B as'hown in Fig
.,ure' (Channel B simulated vital bus). Set, scope de flection to 100V/div., AC coupling, with a swee speed of 5msec/div. Adjust trace position so tha zero reference is, centered on the graticule.
-5.3..2 With the Velonex 510 Surge Generat,or -mplitude con
....trol set to minimum, set the'imer to "Continuous" mode to "Line", source impedance to " 100A" and phas to "90'". Mhile observing the scope waveform, in cr ease.. the.. amplitude .control. of Xhe,.5.10. A transien will appear at the positive line voltage peak. Con z,inue adjusting until the amplitude of this spik reaches 350 volts over zero reference. See r'ig ure 0-a for required waveform.'hotograph this trac for inclusion in the Test Report.
Rev. A TP 8021-1 Page 5 cont. on
5.3.3 Reset the scope sweep speed to lpsec/div. and photo gr aph. Refer to Figure 4-b for r equired waveform.
The peak-to-peak value "of spike should be greate than 300V riding on the approximately 200V line volt-age peak.
5.3.4 Reconnect scope to terminals J and K as shown in Fig-ure 3. Take photographs of wavefcrm with scope sweep speeds of 5ms/div. and 1psec/div. Required waveforms are shown in Figures 4-c and 4-d. The limit of the spike amplitude is to be less than + 16."96 volts rela-
"tive to the peak line voltage (~10$ of instantaneous line voltage).
5.3.5 Disconnect all circuits from terminals J and except the 28 VDC supply and tne scope. Photograph waveform at 1 volt/div. and 1psec/div. sweep speed. The sam limits apply as for 5.3.4. See Figure 4-e for expec"ed results.'
50306 Reconnect th circuits discornected in 5.3.5 and connect scope. to terminals D and E from Figure 3.
Photograph the waveform at 5 volt/div. and 1 or 2psec/div. This is for reference only and no limits apply. See Figure 4-f for expected results.
5.3.7 Repeat step 5.1 while surge is applied.
~ ~ g ~ o Discontinue the surge. Repeat step 5.1. Examine list IK circuit components and any that have failed along with the nature of the .ailur e on remarks sheet.
Rev. 8 TP 8021-1 Page'6 con". on 7
'5. 4 COMMON MODE
.3leconfigure-the -test set-up for common mode hot shown in Figure 3. Repeat 5.3. All limits and apply. pho'eferences 5.4~ Zeconfigure the test set-up for common mode ,neuter as shown an. Figure 3. Repeat 5..3. All limits a photo ref'erin'ces -gply-.
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6.0 FAULT TESTING h
6.1 Using its internal test loads, verify the TE-273N ability to deliver 50 amps at 400 VDC and 600 VA Record load voltage and current in Test, Record. R reference recorder charts to demonstrate norm waveforms using test resistance with values and co
....nections as shown in Figure 2.
6.2 There are nine (9) fault tests-,to be performed.
6.2.1 Transverse Mode, 600 VAC, fault appl'ed to te.mina D and E in Figure 2, test 1-A.
6.2.2 Transverse Mode, +400 VDC, fault applied to term nals D and E in Figure 2, test 1-B.
Rev. A TP 6021-,1 Page 7 cont. on 8
6.2.3 Transverse Mode, -400 VDC, fault applied to ter minals D and E in Figure 2, test 1-C.
a 6.2.4 Common Mode, 600 VAC, fault applied to terminals and G in Figure 2, test 2-A.
6.2Q Common Mode, +400 VDC, fault applied to terminals and G in Figure 2, test 2-B.
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6.2.6 Common Mode, -400 VDC, fault. applied to and G in Figure 2, test 2-C. terminals'.2.7 Common Mode, 600 VAC, fault applied to terminals and G in Figure 2, test 3-A.
6.2.8'Common'ode, +400 VDC, fault applied to terminals and G in Figure 2, test 3-B.
6.2..9 Common Mode, -400 VDC, fault applied to terminals and G in Figure 2, test 3-C.
6.3 For each of the above tests,'he sequence will be a
. WoI'lows:.
6.3.1 Repeat step 5.1.
6.3.2 With recorder(s) running continuously, apply faul voltage, maintaining for five (5) minutes.
Rev. A TP 8021-1 Page 8 cont. on 9
6.3.3 Appr oximately 1/2 way thr u test, repeat 5.1.
6.3.4 After test, repeat 5.1.
6 .3.5 Examine all circuit components (fuses, relays, BTU's, P/S's, etc.). List each failed component and the nature of the failure on the remarks sheet.
6.3.6 Replace any defective co...ponents prior to next test mode.
6.3.7 .The acceptance criteria are: 1) The BTU's must trip as indicated by Channels 4 and. 5 of Recorder !t1,
- 2) There must be no greater than +10+ variation of the line voltage of vital bus A as indicated on Re-corder ki1, Channel 3.
Rev. B TP 8021-1 Page 9 cont. on l0
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4 ~ Q- ~ I APPENDIX B ELECTRO-~!ECHANICS, INC.
New Britain, Connecticut Test Record TR 8021-1 Matrix Mock-Up Fault Isolation and Surge Withstand Qualification
~Q cr iption Test Procedure Part No 7q <'(n
TEST RECORD 1.0 R" CORDED DATA REQUIRED
" Record test'quipment model 'number, serial number and
-"'--.calib ation-,date(s): ---'
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TEST RECORD
, 1.0 RECORDED DATA REQUIRED Record test equipment; model 'umber, serial number and
- - -- -"'-'-calibration-date(s). '---:"- ~ ~ ~
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TH 6021-1I Page 2Acont. cn 3
5.0
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SURGE TESTlNG ee
- --Su~e Hode Transver se Common Hot Common - Neut.
Data Pretest Trip-A. Z.'I 5g
~retest:
~ .+.
.trip s>>
3 3 oos- -- Xd'o5 oo+
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z.7 os V C'-P v'-F.Z.oo/-
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Maximum Variation
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Z8 v P-P (Tare. J 5 K)
UV Relays Tripped (?) Yej Post Test Trip A Z<S5 Post, Test 2, 0'Dp
~: - -~ r1-gi=d=
Acceptance Criteria: 1) The STU. operating on the vital bus being surged must trip within ~10mV of its pretest setpoint, and 2) the oppo'site vi.tal bus voltage must not vary mor e than
<<10+ at any instant from normal voltage at that instant, and')
UV relays must drqp out when both BTU's trip.
NOTE: Photographs aod recorder char ts become part of Test Re-cord. Annotate each with TP 8021-1 and the individual test description along with deflection factors, sweep speed, date and initials .. Note the maximum anomaly.
Rev. A TR 8021-1 Page 3 cont. on 4
0 ~
6.0 FAULT TESTING Test Mode '-A 1-B 1-C 2-A 2-B 2-C 3-A 3-C Data Loaded Fault Voltage Ix Loaded Fault 5'~58
'- Cur rent I I
Pretest Trip A ;> 'f'}7 Pretest Trip B >.Qcg 3.cog ~ 0(-"I BTU ' Tr ip Actual A Tr i 4'.'1'f 7 ) ~., ( Z.'i'> Z"('{7 7 c~ c/ ~ '1 (
(.ttagg (p C1(( g ~ j(
(Rec. 1, Actua
, C}1. 4 E 5) B Trip g.co5 3.~o 3..0c5 I Recorder
'hannel 3 I Variation, O 0 0
! Maximum Post Test a Trip A Z.'f'l7, Z 'I'.I Cf&7 Post Test Trip B pOV'f > cd ),oc f <og ~ /OS >,Cop 5 c'o '(
Acceptance Criteria: 1) No d'turbance of the vital bus volt-age greater than +10+, and 2) the ability of'he BTJ's to maintain trip condition (i.e., cpen bistable contacts) subse-quent to and during the fault (Channels 4 & 5, Recorder b 1) within required accuracy, +0.010 v 'its of "retest se"point.
Rev. B TR o021-1 Page 4 cont. on 5
s ee 7.0 REMARKS AND REVXSIOVS (Make as many copies as required.)
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TR 8021-1 Page 5 cont. on 6
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~V
+VV V
Pho gl~
Test Mode: Transverse Surge Terminals Monitored: A 6 B Surge Applied: Term. A & B
'Peak Line Voltage: 200V t Peak Surge Voltage: 350V Zero Ref.: Center of Graticul aala Ref.: TP 8021-1, Fig. 4-a Photo,",2 Test Mode: Transverse Surge Terminals Monitored: A u B Surge Applied: Term. A 6 B Peak Line Voltage: 200V Peak Surge Voltage: 350V Zero Ref.: Center of Graticule Ref.: TP 8021-1, Fig. 4-b a
Photo t3 Test Mode: Transverse Surge Terminals Monitored: J & K Surge Applied: Term. A 6 B
~W+QVT ~~v Peak Line Voltage: Approx.
Surge Voltage: Less tha~
, l 1'eak
@KRAK,VZ%P EJECT. 3.7V (Ov 5KF NE li
'K Zero Ref.: Center of Graticu,'ef.:
TP 8021-1, Fig. 4-c TR 8021-1 Page '6 cont. on
~ O Photo jP4 Test Mode: Transverse Su ge Terminals Monitored J 6 K Surge Applied: Term. A 6 B Peak Line Voltage: Approx.
170V Peak Surge Voltage: Less, than 3.7V (Over line Zero Ref.: Center of Grati'cul M
=R<='" TP 8021-1, Fig. 4-d Photo jj5 Test Mode: Transverse Surge Terminals Monitored: J 6 K (With transformers arid BTU power supply dis- EWE .
connected)
Surge Applied: Term. A 6 B Peak Line Voltage: 0 (Line disconnected)
Peak Surge Voltage: Less'han 3.7V
~f.: TP-8021-1, Fig. 4-e RRE Photo g6 Test, Mode: Transverse Surge Terminals Monitored: E 6 D Surge Applied: Term. A 6 B Base Voltage: 28 VDC (Matrix coil) m%m.vmv Surge Voltage: 29.5 Volts Z'er~ef.: Center of-Grat4eule IISR (AC Coupling)
Ref.: TP 8021-1, Fig. 4-f TR 8021-1 Page 7 cont. o
Photo g7 Test Mode: Common, Surge, "Hot" Terminals Monitored: A 6 B Surge Applied: Term. A 6 C Peak Line Voltage: 200V Peak Surge Voltage: 350V Zero Ref.: Center of Graticule
--- t ' R Ref.: TP 8021-1", Fig. 4-a
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Photo gj8 Tes t Mode: Monitored:
Common, Sux ge, "Hot" Terminals A 6 B Surge Applied: Term. A 6 C Peak Line Voltage: 200U Peak Surge Voltage: 350V Zero Ref.: Center of Graticule f
Re .: TP 8021-1, Fig. 4-b Photo g9 Test Mode: Common, Surge, "H Terminals Monitored: J & K Surge Applied: Term. A 6 C
~i@KRBf ~- Pea%,'.'I.ine Voltage: 170V
.Zeal Surge Voltape: 4.. ~V.
(Overline)
Zero Ref.: Center of Grat cu Ref .: TP 8021-1, Fig. 4-c TR 8021-1 Page 8 cont ~ on
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'Photo. $ 10 Test Mode: Common, Surge, Monitored: J 6 K "Hot'erminals Surge'Applied: Term. A & C Peak Line Voltage: 170 Volts Peak Surge Voltage: 5.1 Volts (Qverline)
Zero Ref.: Center of Graticule Ref.: TP 8021-1, Fig. 4-d Photo jjll Test Mode: Common, Surge, "Hot" Terminals Monitored: J 6 K (Pith transformers and BTU P/S disconnected)
Surge Applied: Term. A 6 C Line Voltage: 0 (Line 'eak disconnected)
Peak Surge Voltage: 5.1 Volts Zero Ref.: Center of Graticule Ref.- TP 8021-1, Fig..h-e Photo,'j12 Test.Hode: Common, Surge, "Hot Terminals Monitored: E 6 D Suz~Mpp lied': Terms..'~~~.Z Ba's'e'oltage: 28 VDC (KaTrxx.
-Mo~)
Peak Surge Voltag'e: 18 Volts Zero Ref.: Center of Graticule (AC Coupling)
Ref.: TP 8021-1, Fig. 4-f I
TR 8021-1 Page 9 cont. on 10
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""Photo- $ 13 r'est Mode: Common, Surge, "Scut Terminals Monitored: A 6 B RBF. Surge Applied: Term. B & C Egg Peak Line Voltage: 200 Volts Peak Surge Voltage: 350 Volts
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<<pygmy, Ih*
%63Q=.
32BBg
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ggg Zero Ref.: Center Ref.: TP of Graticule 8021-1, Fig. 4-a
'RMQE Q@
mm TP 8021-1, Fig. 4-a 13
~ . rTr Photo f14 Test Mode: Common, Surge '2leut" Terminals Monitored: A 6 B Surge Applied: Term. B-.& C Pe'ak.Line Voltage:'200'Volts Peak Surge Voltage: 350 Volts Zero Ref.: Center of Graticule Ref.: TP 8021-1, Fig. 4-b TP 8021-1, -Fig. 4-b IRI >>
Pho to,"j 15 Test Mode: Common, Surge, "H Terminals Monitored: J & K Surge Applied: B &, C
'..~ERKEF. '.
Peak Line Voltage: 170 Volts RKE'~ Bpak,Surge Voltage:--~ Vol.ts EgRR, (Overline)
ZermRef.: Center o --Gr"~u 28EE.-
Q~ ox Ref.: TP 8021-1, Fig. 4-c TR 8021-1 Page 10 cont. on 11
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RRS Photo jj16 Test Mode: Common, Surge, Monitored: J 6 K Surge Applied: B 6 C "Neut'erminals Peak Line Voltage: 170 Volts .
Peak Surge Voltage: 3.8 Volts (Overline)
Zero Ref.: Center of Graticulel Ref.: TP 8021-1, Fig.. 4-d Photo $ 17 Test Mode: Common, Surge, "Neut" Terminals Monitored: J 6 K EkSR (With transformers and BTU P/S disconnected)
RRRRRR Surge Applied: Term. B 6 C Zaak Line Voltage.
(Line Dis'conne~~~
Beak. Surge.. Voltaze-Zero Ref .: Center o f Graticule IJhZR83EQREERH Ref.: TP 8021-1,. Fig. 4-e GSEEBKBEHKfE Pho to j,'18 Test Node: Common, Surge, Monitored: E 6 D "Neut'Terminals HINEGR3ESBEQQ Surge Applied: Term. B 6 C Base Voltage: 28 VDC (Matrix IPIHEBBNHBEHB II EEHESSE3EHHHER Peak Surge Voltage:
~il; Volts flflI 'flFSiYY.F.P~~~ 19 Graticu
) gt)~QQ@Q~ggg~ Zero Ref.: Center oZ
%5kl II BEfRCtRRBHE553ERIM (AC Coupling)
Ref.: TP 8021-1, Fig. 4-f TR 8021-1 Page'l cont. on
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