ML20141N189

Rev 2 to Procedure EIP-30, Isolator Circuit Differential High Voltage Fault Test Procedure

ML20141N189
Person / Time
Site:	Fort Saint Vrain
Issue date:	12/07/1984
From:	ENERGY, INC.
To:
Shared Package
ML20141N188	List: ML20141N187 ML20141N189
References
EIP-30, P-86119, TAC-51242, NUDOCS 8603040464
Download: ML20141N189 (13)

Text

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Attachment 2 to P-86119

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ENERGY INCORPORATED

, g JG TITLE ISOLATOR CIRCulT DIFFEl!ENTIAL lilGil VOLTAGE FAULT TEST PROCEDURE DATE PREPARED BY N!k'W W' l' *^' %? M'i REVIEWED BY C_

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RELEASE DATE CUALITY ASSURANCE 2/r / os /O-11 JV PREPARED FOR

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PROJECT MANAGER N-* ' KN '

'- , I"4'I4 Y TECHNICAL MANAGEMENT 5' f /// / 4,' Y f REVISIONS NOTE: All revisions are flagned with the symbol b in the right margin where N is clie number of the revision.

Riw. 0 - lasued for Use - 10/31/84 Rev. I - Expantled Test to include Adjncent isolator Channeln - 11/29/84 1:ev . 2 - l'ro. . dore Correct ions - 12/7/84 h/'f/94p/ '

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-)- -l- 0 0 PROCEDURE NO. EIP-30 -

- 9603040464 860219

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Attachment 2 to P-86119 ENERGY INCORPORATED PROCEDURE WG TITLE ISOLATOR CIRCUIT DIFFERENTIAL lilGil VOLTAGE FAULT TEST PROCEDURE DATE PREPARED BY 'VNW l'1'* /r % r7

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REVIEWED BY C __'[ rto ce~ idiM d/ RELEASE DATE CUALITY ASSURANCE r < >s /O l'I J'/ PREPARE 0 FOR

. , - ./ J PROJECT MANAGER b--

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TECHNICAL MANAGEMENT 'b fy/

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/t'[VIff I I REVISIONS NOTE: Ali revisions are fla;;ned with the symbol d in the right margin where N is the number of the revision.

Rev. 0 - 1.4 sued for Use! - 10/31/84 Rev. 1 - Expanded Test to Include Adjacent Isolator Channoin - 11/29/84 Rev. 7 - l'ror dore Correct ions - 12/ 7 /84 9//9/QtJ

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l-00 PROCEDURE NO. EIP-30

- 9603040464 860219

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TABLE OF CONIENTS PAGE 1.0 PURP0$E............................................................. 2 2.0 RE SP 0 H S i n I L I T I C S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 Te s t E n g i n e e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Qual i ty As surance Represen ta tive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.3 Te s t T e c h n i c i a n . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3.0 TE S T PR ER EQ U I s l TE S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3.1 Required Drawings and Special Instruc tions. . . . . . . . . . . . . . . . . . . . . 3 3.2 Eq u i pme n t Re q u i r e d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3.3 Inspection.....................................................4 3.4 P roc eda re Doc ume n t.i ti on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

4.0 E Q U I PME N T C AL I B R A T I O N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.0 itsr PRuCE00RC............................ .................. . .... 5 6.0 ACCEPIANCE CRITERIA................................................. 6 i

FIGURE 1 - DIFFERENTI AL VOLTAGE ISOLATION TEST SETUP FIGURE 2 - HIP 0T TESI SCTUP ATTACHMENT 1 EIP-30 DATA SilEET l

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REVISION NO. PROCEDURE NO. n g_,n i

2 PAGE t OF g El -146

. _ _ _ . Q RCV. I 10f_A4)

1.0 PURPOSE This proceduce describes the methods to be used when performing a high voltage faul t isolation test. Caution : This is a potentially destructive test and requires dangerous high voltages. When performing the test, employ adequate safeguards to protect against small projectiles, bright flashes, and high voltages.

The test involves applying a 480 Yrms,10 amp (noninal) source to the out-put of a single Energy Incorporated isolation amplifier and observing the e f fects. During the test, the 480 volt source will be applied to the output of channel 2 of the isolator card (798-X assembly) while the inputs of all four isolator channels are monitored. After the test, the isolator card will be inspected and all damage recorded. Also, all isolator chan-nels will be hipot tested to 600 VAC and channels 1, 3, and 4 of the isold-tor card will be electrically tested for performance.

As added provisions of the test, the system poor supply lines util be wired and monitored.

2.0 RESPONSIBILITIES 2.1 TestinLEn_gineer (TE)

It is the responsibil1ty of the te", ting engineer to:

(1) Provide or arranija for the necessary test equipment, (2) Ensure the correct application of the test equipnent, (3) Supervise the test technician,.

(4) Enter the test records in the project files, (5) De trained to level !! as per El QAP 10-2, and (6) Hotify the QC Uepartment of the pending test.

REVISION No PROCEDURE NO. EIP-30 2 PAGE 2 CF 9

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El -146 J ., L _ _ _ __ _ __ _ __ ___ _ __ ____ _ _ _

(REVI 10/ 64)

2.2 Qaality Control Representative (OCR) ,

it is the responsibility of ,the quality control representative to:

(1) Verify the test is conducted per the procedure, (2) Verify that the data are taken per this procedure, (3) Verify the equipment used has a current and valid calibration sticker or certificate, (4) Verify the proper disposition and storaje of test records, and (5) Obtain and maintain the test record copy of the procedure, data sheets, and all applicable. drawings.

2.3 Test Technician (IT)

(1) Perfona the test.

3.0 TEST PREREQUISITCS 3.1 Required Drawings andtS eciaMstructions The test engineer shall record all required drawings and applicable special instructions in Attachment 1.

J.2 Equip 1ent Required (1) liigh vol tage source: 480 t 25 VAC rms open circuit,12 amp rms minimum short circuit current, 60 Hz, single phase.

(2) C1 amp on current meter: 0 to 12 amp, 60112, t ST,.

(3) Vol tmeter : 1 St compatible with high voltage probe, (4) Eight channel strip chart recorder: 60112 min. , Wa tanabe model b

WR 3101-8L or equivalent.

REVISION NO. PROCEDURE NO. Elp 30 2 PAGE 3 0F 9 E! =I4 G h ___ _ _ _ _ _ _ _____._ _._.__ _ ____ _ ( McV. I 10/ 84)

(5). Three 50 sz, 1/4 watt resistors, two 100 n, 1/4 watt resistors, one 40 it. 6000 watt resistor, two 1.4 k,1/4 W resistors, and two I each 220 uF 25 volt min capacitors, electrolytic. I (6) liipot tester: 600 Vrms AC output,10 pamp sensitivity, Iliptron- ,

ics model 11D125 or equivalent.

(7) Test leads and switches: as required.  ;

I 3.3 Inspection Verify that all special instructions will be followed, that all items under test appear to be in working order (visual inspection only), and that the ,

test equip 1cnt is in good shape (no frayed insulation, etc.).

3.4 Procedure Documentation t

Attachment I will (when completed) become part of the test procedure docu-  !

mentation. it will be incorporated into the test record copy of the test ,

and then subtili tted tn projt!Ct tildflagement fof* final review.

C 4.0 EQUIPMENT CAllBRATION Verify that the folluing equipment has valid calibration dates. Record these dates and equipment descriptions in Section 3.3/4.0 of Attachment 1. [

(1) Both vol tmeters, f (2) Strip chart recorder, and (3) Hipot tester.

Also record a iloscription of the 48 0, 6 kw resistor.

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l REVISION NO. PROCEDURE NO. EIP-30 2 PAGE 4 0F 9 EI-14 6 y (REY l f o/ 941

I S.0 TEST PROCEDURE (Reference Figure 1 for isolation test setup.)

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During the high voltige faul t test, the following eight signal points are 1

monitored and recorded with the strip cliart recorder:

1 (1) Vg source, j (2) Vgn channel 1 l (3) Vin channel 2

] (4) Vin channel 3, l (5) V in channel 4, i (6) V t15 '

l (1) V , g e, , and I (8) V in RJC. t 4

C Au fl0N : Lethal voltages will be present during the performance of this test. Also guard against small projectiles and bright flashes.

t

} (1) Assemble the test setuo as shown in figure 1.

t l (2) Veelfy the open circutt voltage and the short circuit current of j the 40J VAC source. Obtain tnese parameters from 31 and V g via l changing the position of switch S1. Record these values in

} Attachnent 1.

i (3) While monitoring the fault current and load voltage, apply 480 t I

j 25 VAC, ras, 60112 to the isolator circuit output. Ficcord both the magnitude and tima response of all voltage incasurements with the eight channel chart recorder.

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(4) Remove the applied voltage only af ter the fault current has i

reacheit a stea@-state value (within 101) or af ter one minute

! (whichever is longer).

1

REVisl0N NO. PROCEDURE NO. RIP-30 2

PAGE 5 0F 9 F.! ~14 6

___SLfL-____----_---------------------.-----

i -(REV.I Io/ 84)

(5) Af ter power is renoved froin the circut t, inspect for damage caused by the test. Include in your inspection both visual (burnt or melted parts) and electrical (resistance) observa-j tions. Record all findings in Section 5.0 (5) of Attachment 1.

Disconnect the chart recorder from all points.

1 (6) Perform a1 output to input Hipot test as follows.

(7) Turn on iiipot tester and set the voltage control to zero volts.

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(8) Connect the Ilipot tester to the items under test as shown in Figure 2.

$ (9) Gradually increase the output voltage up to 600 VAC.

1 (10) Hate and' record ( Attachment 1) the leakage current when 600 VAC is reached, j

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(11) Wait at least 15 seconds. Note and record the leakage current a ga i n.

d NOTC : If the two values (step 10 and step 11) differ by more i than i 207,, record these values in Attachment 1.

j (12) Turn off the Hipot tester before disconnecting.

(13) Perform an isolator performance test on isolator channels 1, 3, l and 4 as per ElP-24 (Sections 8.2 and 8.7) .

]

Retain the test record copy of the procedure in the test WAP.

1 1

6.0 ACCEPTANCE CRITERIA The isolator circuit is considered to have passed the 600 V differential I fault isolation test if the following test criteria are met:

REVISION NO. PROCEDURE NO. cip.30 2 PAGE 6 0F 9 El -146

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( 9 (1) During the application of the 480 VAC power, no more than 0.25 mV of the 60 liz signal shall appear across the 50 n isolator input i and the 100 9 isolator and RJC input load resistors.

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During, the 480 VAC test, no more than 1.5 Y RMS may appear across pc,3 (2) either of the power supply resistor-capacitor notworks.

pd69 (3) The extent of the damage resulting from the test shall be con-g fined to the tested channel's output circuitry (adjacent channels W

e shall be unaf fected and the tested channel's input side must p '8 d remain intact; also, the isolator card connector must not be af fected).

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(4) 1he leakage current resulting from the 600 VAC Hipot test shall b be less than 50 nA at all times during the 15-second test.

1 ft 6 (5) Isolator channels 1, 3, and 4 must pass the testing as required i in E!P-21, 5.ictions 8.2 and 8.7, according to the criteria set l forth in ElP-24, Sections 10.2 and 10.6 (.1% linearity).

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i REVISlott fl0. PROCEDURE NO. rie-30 2 PAGE 7 0F 9 a -i4s

_____.A._1t___________._____.______ . 0R3V. I 18904)

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ISOLATOR CARC 3r 799 -X ASSY A (TEST CON'4ECTOR! dTb m -I~ 50 g 5 .

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20 NOTES: if gg

1. ALL wtRE 18 AWG WIN. TB2 TBt

2. PHYSIC ALLY SEPARATE ALL iNSTRIAsENTATICN SIGNAL LINES FROM PCwER LINES AS wuCH AS PRACTICAL. [ g

3. TWIST w!RES AS thC:CATED. / p # ,,4 tN AcCtTics T'atST ALL T 22pr -- 4^ V + 15 4 2v PCwER w!RES AS MUCH jf e 7 AS PRACTCAL. R o M- _1 <

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-I FIGURE I DIFFERENTIAL FAULT VOLTAGE e

5 o TEST SETUP s

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N L1 5 ISOLATOR CARG

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= (TEST COf!NECTOR) 9 _ L- -

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ATTACitt1ENT 1 3

EIP-30 DATA SHEET I

Reference

_Sc,ction I

w i 2.0 TE Traininj to Level !!: Name U diu g Da te Trai ned __,_,_

3.1 Special instructions l

Design Drassirigs_

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,,yyy .J Assembly Part Number

__ag_ Assembly Serial Number i

_ r tr__,, Rev. _ Assembly Dra>4f ng (i f appilcable)

_ 2 d___ Rev. Wiring and Cable List (if applicabic) l  :

i j hecialInstructions i

1.2/4.0 Eqa,ip:ait Record i

1 i Cal. Dates

Equipment !blol Manufacturer S/N t.ast Duc l

1

! liigh Voltage

, Source '

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d J il/A 0 00 )

Current l'eter [3gp;,: ,, L f f ~  : Z v_?nna: fl/A i 1 MnW l

Revision 2 E!P-30 Sheet 1 of 3 31-5

Cal. Dates Equi pment liodel Manufacturer. S/N Last Due Chart Recorder pje 3/0 / : f/su rfc.-  : sto/r/ / _ : As #3 t*/ :  :

V01tmeter a tua.__; _lm___,,  : A ;;l1' utS:-- W$l.-

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.J;;;l_. ht?4V U)/7-W /q a/g M961410 litpot Tester f/O feO_: / /, fo uw,e _s  : //A v) n i3: 8u '/ W: /e i17:

4tl 0, 6 kw resistor:

] ~ 'M 0 W1 7 'i G t/ w A ro A- ots tra s m n ,,,w.ry 5.0 TEST PROCEDURE NOTES

_Ste p.

(1) Power Source OPen circuit voltogo _l/f_f,$' / ////$

Power source short circuit current /R , ~4 4 f f,p g (2) faul t _ Current Loa <tVolta9ej Max S'v e , Qgf/'- Attach Chart Recorder Chart Time to Reach .

Steady State ^ #/f 5,c,c e 1 * ; .ws,. .

(5) Inspection Coonents c4.ee4 4 v,ari>s/er eu//e<re,c C her t/ // ,

Set frie*** $ntoke ot'e nep, ( A r,4 a ,q Set utsonep t l'YlG *>**!! Cit) derotte g ypy , gy p gg i

q Sheet 2 of 3 gvision2C/;,7pf, p ,, EgP-30

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• Step OI j.t sgn; ,v o (10) Initial leakage at 600 VAC rs40

/d _ 4 Arms.

20 (11) Final leakaga at 600 VAC ,_ 40 gl;, Arms.

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(13) Results of EIP-24 (Pass / Fail): Chann 1__pa$ s _

" a/iy11 Chann 3 /?qs s Chann 4 _ fa cg _

Tes_t,p ta Cer_tification All test data recorded above were measured and recorded as descrlhed iri procedure EIP-30.

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Test Engineer Date

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pr R.b. g\, l;c Representative Date Tejt _ Data _ Acceptance All test dita aol records have been reviewed and accepted according to the criteria of Section 6.0.

-._0$'I(. Yl Engineer Ot? WEl-._. I' ~ l O ~~blV._

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f.e g' D. Q. QC Representativo Date

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ft Revision 2 E!P-30 Sheet 3 of 3 11-5