ML20137L067

Rev 0 to Procedure PSCC-1-EIP-24, Test Procedure for Qualification of Fort St Vrain Electrical Isolation Sys for Public Svc Co of Co

ML20137L067
Person / Time
Site:	Fort Saint Vrain
Issue date:	08/01/1985
From:	ENERGY, INC.
To:
Shared Package
ML20137L062	List: ML20137L056 ML20137L067 ML20137L073 ML20137L097 ML20137L114 ML20137L144 ML20137L163 ML20137L187
References
PSCC-1-EIP-24, TAC-51242, NUDOCS 8509120328
Download: ML20137L067 (22)

Text

_. .. . _ _ _ _ . _._ __ .

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f ENERGY INCORPORATED PROCEDURE TITLE TEST PROCEDURE FOR QUALIFICATION OF THE FSV ELECTRICAL ISOLATION SYSTEM FOR PUBLIC SERVICE COMPANY OF COLORADO

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1' DATE PREPARED BY b b (f bllBf REVIEWED BY ,

hu _ 7-3/ 86 RELEASE DATE 8/1/85 QUALITY ASSURANCE dby 4J WF/-#6 PREPARED FOR Public j() Service Company of Colorado PROJECT MANAGER u. 8 d - >-- - #[/g.s-TEc-cat unAaawnT r,

midlb//4Ws r- -- ,

i REVISIONS NOTE: All revisions are flagged with the symbol in the right margin where N is the number of the revision.

Rev. 0 - Issued for Use - 8/1/85

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CONTROLLED COPY

$12M F

A

1. P PROCEDURE NO. PSCC-1-EIP-24 EI- 14 6 110-4 (R EV. I 10/84

e D

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• TABLE OF CONTENTS PAGE 1.0 SC0PE.............................................................. 2 2.0 R EF ER EN C ES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3.0 TY P E TEST PR0C ED 'JR E S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4.0 ACCEPTANCE CRITERIA................................................ 7 5.0 AP P R 0 V A L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 LIST OF DATA SHEETS

1. 1 TEST PROCE0VRE USED

1. 2 TEST EQUIPMENT USE LOG

1. 3 BURN-I N

1. 4 FUNCTIONAL TEST (DIGITAL)

1. 5 FUNCTIONAL TEST ( ANALOG)

1. 6 SURGE WITHSTAND CAPABILITY TEST

1. 7 THERMAL DRIFT

1. 8 LINEARITY

1. 9 POWER SUPPLY ORIFT

1. 10 HI-POTENTIAL TEST (DIGITAL ISOLATOR)

LIST OF ATTACHMENTS

1. EIP-24, REY. O REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 PAGE1 OF 8 EI-l<46 110-4 N1 'ONI

1.0 SCOPE This procedure, PSCC-1-EIP-24, describes the tests on the 1E analog and digital isolators needed to meet the requirements specified in Public Service Company of Colorado specification 90-I-08, Revision B.

The procedure provides an addendum to EIP-24, a generic procedure developed by Energy Incorporated for type testing the performance and isolation characteristics of the analog and digital isolators. The intent of the procedure is to define and modify for use those ' sections of the EIP-24 procedure that are applicable to the isolators designed for PSCC.

The type tests defined in this procedure are complimentary to the system test defined in test procedure PSCC-1-EIP-37. This approach is consistent with the general methodology defined in the project and test plans, PSCC-QP-001 and PSCC-TP-001, respectively.

2.0 REFERENCES

In addition to the references specified in EIP-24, the following documents are applicable specifically to PSCC-1-EIP-24. Except for item 5, these references need not be included in the work activity package:

(1) Project Test Plan for FSV Electrical Isolation System, PSCC-TP-001, Rev. 0; (2) Project Plan for FSV Electrical Isolation System, PSCC-QP-001, Rev. 0; (3) PSCC specification 90-1-08, Revision 8; (4) El internal letter, A. A. Pela/S. K. Merrill, 7/17/85; and REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 2 0 PAGE 0F EI-l46 110-4 (REV.1 10/ 84)

L

3

11 (5) EIP-24, " Test Procedure for Performance and Isolation Testing of IE Analog and Digital Isolators". This is presented as Attach-ment I h'er ein.

2.1 Applicable Product Design Drawings (include Drawing in Work Activity Package)

(1) 01622 Analog Isolation Amplifier Assembly EIP-01622, Rev. O.

(2) 01622 Quad Analog Isolation Amplifier Schematic EIP-01623, Rev.

O.

3.0 TYPE TEST PROCEDURE 3.1 Identification of Test Specimens 3.1.1 Record the identity of the test samples in the table below.

Technician Item Description PN[

S/N Ini tial s

1. Analog Isolator Card (0-10 Vdc input)

2. Analog Isolator Card (0-5 Vdc input)

3. Digital Isolator Card

4. Single Channel isolator 5- be r &WW 3.2 Identification of Test Procedures Sections 3.3 through 3.7 of this procedure outline the tests within the EIP-24 procedure that are to be conducted.

REVISION NO. PROCEDURE NO. pSCC-1-EIP-24 0 PAGE 3 OF 8 El-146 L 9,4 (REV.1 10/ 84)

3.2.1 For each type test performed, record the title and the corresponding sections of EIP-24 in data sheet #1. Data sheet #1 plus the remain-ing data sheets represent part of the test report.

3.3 Burn-In 3.3.1 Perform the steps described in Section 7.0 (pretest) of EIP-24.

l 3.3.2 Record the test equipment used in data sheet #2 (step 3 of EIP-24) .

3.3.3 Record burn-in time and serial nunbers of each card in data sheet #3 (steps 7 and 8 of EIP-24).

3.4 Operational Check 3.4.1 Perform the steps described in Sections 8.1 and 8.2 of EIP-24 for the digital and analog isolators, respectively.

3.4.2 Record the data in data sheet #4 for digital isolator and data sheet

1. 5 for analog isolator.

3.5 Surge Withstand Capability Test 3.5.1 Perform the steps described in Section 8.5 of EIP-24, 3.5.2 Record the data in data sheet #6.

l 3.6 Loss of HVAC Simulation l l

3.6.1 Perform steps 1 through 4 as described in Section 8.6 of EIP-24.

3.6.2 Set chamber to 120*F and allow to stabilize for 20 minutes.

3.6.3 Repeat step 4 at the 1, 4 , 7 , and 12-hour points.

REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 PAGE4 OF 8 EI-l<46 110-4 "* ' O l

3.6.4 Return the chamber to ambient conditions and repeat step 4.

CAUTION: Do not expose the equipment to thermal shock by opening the oven door. Allow the oven to cool down with the closed.

3.6.5 Record the results in data sheet #7.

3.7 Power Source Test 3.7.1 Analog 3.7.1.1 Perform the steps described in Section 8.7 of EIP-24.

3 .7 .1.2 Record the results in data sheet #8.

3.7.1.3 Perform the steps described in steps 1 through 3 of Section 8.8 of EIP-24.

3.7.1.4 Connect the 115 VAC of the test specimen in series with a Power-stat variable' transformer (M/N SPN 116B) (see Figure 1).

3.7.1.5 Set the Powerstat' variable transformer output to 105 VAC t 2 VAC.

3.7.1.6 Record the outputs of each channel in data sheet #9.

3.7.1.7 Return the Powerstat to output 115 VAC t 2 VAC.

3.7.1.8 Set the Powerstat variable transformer to output 132 VAC t 2 VAC.

3.7.1.9 Repeat step 8.7.1.6.

3.7.2 Digital 3.7.2.1 Perform the steps described in steps 1 through 3 of Section 8.3 of EIP-24.

REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 op 8 PAGE 5 EI-l 46 110 4 ( REV. I lo/ 84)

\

1 DVM N p '

h { /h . - -

ANALOG / DIGtTAL

/ \

os q ] ,,

ISOLATOR CHASSIS e 164 V

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i vAC ,/ , ,

POWERSTAT . I

=

ggMAER ecweg, su,

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FIGURE I SECTION 3 714

_ _ _ ~ . - - . .._.. ., - _ . , _ _

y , v_ .,, , . - -_ _,,_ . _

_ . _ . , _ _ _ - - - . - ,. .._,. y-,-

3.7.2.2 Set the hipot tester to t2000 VOC.

3.7.2.3 Record the leakage current specified in data sheet #10.

3.7.2.4 Set the hipot tester to t2000 VAC.

3.7.2.5 Repeat step 8.7.2.3.

4.0 ACCEPTANCE CRITERIA The acceptance criteria are defined below.

4.1 Digital Isolator Functional Test Same as EIP-24, Section 10.1.

4.2 Analog Isolator Functional Test Same as EIP-24, Section 10.2.

4.3 Surge Withstand Capability Test i

j Same as EIP-24, Section 10.4.

4.4 Loss of HVAC Simulation Output change of less than 0.01% per degree F for analog modules. The base temperature is the ambient condition at the time the initial functional test is performed.

REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 PAGE 7 OF 8 EI -l<46 110-4 ( ""V' ' ' O' )

4.5 Power Source Test 4.5.1 Analog Outputs within 0.257, of output span for inputs at high and low limits of input span.

4.5.2 Digi tal Same as hipot of EIP-24, Section 10.3.

5.0 APPROVAL The final review and approvals defined in EIP-24, Section 12.0, shall be

• used.

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1 l

REVISION NO. PROCEDURE NO. PSCC-1-EIP-24 0 PAGE 8 OF 8 I

E!-146 110-4 ( "'V' ' ' O' }

DATA SHEET #1 TEST PROCEDURES USED Test Section/ Title Test Section of EIP-24 110-4

t DATA SHEET #2 l TEST EQUIPMENT USE LOG Date -

Test Engineer QCR l

Calibration ftet:/Model Serial No. Date Used For Tests 1

i 4

i e

6 110-4

. _ _ .-. . . - - .=. .. . _ - - _ -._ - - .

4 1

DATA SHEET #3 BURN-IN ,

c Date Test Engineer QCR t15-Volt DC Power Supply Used: MODEL S/N j +5-Volt DC Power Supply Used: MODEL S/N 1

Isolator Frame Used: MODEL S/N

, Isolation Amplifier Printed Circuit Boards Installed

~

j 9 Slot Model Serial Number 1

2 4

3 4

j! 5.

6 l

7.

1 8

! 9 10 11.

i 12 l -13 l 14 l 15 i 16 ,

! 17

! 18 -

19 20 i 21 i 22 23 24 Burn-in time Spect fied i

l Actual i

i

110-4

. -. .- - . = - . . - . - . . - . - . -_ . . -- . _ =-

t

' i DATA SHEET #4 a

i FUNCTIONAL TEST DATE:

TEST ENGINEER:

, QCR

., DIGITAL ISOLATOR DATA SHEET-i Sht of j Card Card Output i Sl ot - S/N Channel 0 V in 5 V in 45 V in 48 Y in QCR l

J 1

2 3

Accepted 4 Rej ected 5

6 7

8 1

2 3

Accepted 4 Rejected 5 i 6 7

8 1

2

3  !

Accepted

~

4 Rejected 5 6 -

4 7 i 8

~

1 1

i 2 3

i Accepted 4 Rej ected 5 6

1 7

{ 8 i

4 4

110-4

- -,...- n .,-4 , , ,----n.,- . - - = . . - - , , - - - , . , - - - - ,

. , . , , - - ~a ,, ,-, . , - - - -,gy,-en,- ---,-~7 - , ,

I. '

i 4

I DATA SHEET #5 i

FUNCTIONAL TEST DATE:

TEST ENGINEER:

QCR 1

ANALOG ISOLATOR DATA SHEET Specifications Inpu t* Outpu t*

Low High Sht of i

j Card Card Output Voltage Slot S/N Channel Low High QCR 1

2 Accepted 3 Rej ected 4

. 1 l 2 Accepted 3 i Rej ected 4 ,

l 1

2

Accepted 3 Rej ected 4 1

1 2

Accepted 3 Rejected 4 1

2 Accepted -

3 l-Rej ected 4

1 2

Accepted 3 Rejected 4 i

i l

• Input and expected output signal to be defined prior to testing.

f I 110-4

. . l I

4 OATA SHEET #5 (continued)

FUNCTIONAL TEST f

DATE:

l TEST ENGINEER:

QCR ANALOG ISOLATOR DATA SHEET Specifications Inpu t* Outpu t*

Low

. High Sht of 1

2

• Accepted 3 Rejected 4 1

2 Accepted 3 Rejected 4 1

I 4

I

• Input and expected output signal to be defined prior to testing .

110-4

- . .-- . -. .. - = __ . = _ . -_ . . . _ - .

i

- DATA SHEET #6 SURGE WITHSTAND CAPABILITY TEST ,

DATE:

TEST ENGINEER:

• CARD TYPE QCR:

WAVESHAPE VERIFICATION QCR Sht of

TRANSVERSE MODE S.W.C. TEST

! QCR QCR PRE-SWC TEST CARD S/N CHANNEL CONNECTIONS OK TEST RUN FUNCTIONAL OK l

COMMON J0DE S.W.C. TEST QCR QCR POST-SWC TEST CARD S/N . CHANNEL CONNECTIONS OK TEST RUN FUNCTIONAL OK i

s 4

1

• Provide data sheet #6 for each module listed in data sheet #2.

i 110-4

. - . . -. . . - . - - . . . - = . .

DATA SHEET #7 THERMAL ORIFT DATE:

• CARD TYPE TEST ENGINEER: "

CARD S/N QCR:

Sht of Temp ( ) 'C ( Ambient)

Input Low Output Input High Output QCR CHI CH2 CH3 CH4 Temp ( ) 'C for a period of one hour CHI CH2 CH3 -

CH4 Temp ( ) 'C for a period of four hours

CH1 1

CH2 CH3 CH4 Temp ( ) 'C for a period of seven hours CHI CH2 2

CH3 CH4 Temp ( ) *C for a period of 12 hours1.388889e-4 days <br />0.00333 hours <br />1.984127e-5 weeks <br />4.566e-6 months <br /> 1

CHI CH2 CH3 CH4

• Provide data sheet #7 for each module listed in data sheet #2.

110-4 4

DATA SHEET #7 (continued)

THERMAL ORIFT DATE:

• CARD TYPE TEST ENGINEER:

, CARD S/N QCR:

Sht of Temp ( ) *C ( Ambient)

Input Low Output Input High . Output QCR CH1 CH2 CH3 i CH4 4

I i

• Provide data sheet #7 for each module listed in data sheet #2.

1 110-4

. - - . -- -~ -- -. - - . - . _ - _ . _ = _ _ . . - , . . - _ . - , _ _ , .

DATA SHEET #8 LINEARITY DATE:

TEST ENGINEER:

• CARD TYPE QCR:

CARD S/N Sht of Minimum Input Input Output OCR CHI CH2 CH3 CH4 25% of Maxim m Input Input Output QCR CH1 CH2 CH3 CH4 50% of Maximum Input Input Output QCR

' CHI i

CH2 CH3

CH4 75% of Maxim m Input Input Output OCR CH1 CH2 CH3 CH4 100% of Maximum Input

• Provide data sheet 18 for each analog module listed in data sheet 92.

110-4

. . . _ - - . - . - ._ . _ . . - - . - = = - - - - - _

DATA SHEET #8 (continued)

LINEARITY .

DATE:

TEST ENGINEER:

• CARD TYPE QCR:

CARD S/N Sht of Input Output QCR

, CH1 CH2 CH3 CH4 i

i l t i

i i

l

• Provide data sheet #8 for each analog module listed in data sheet #2.

-110-4 4

.- , - - - - . - , , , - - - . ~ . , . . . , - . . . , - - - - - - . . - - ,.-u e. ,, , - - . -- ,- ,n - , , ,- , , - - -w --,,- --m ----,-r ran - , - - ,,,. -~s

< DATA SHEET #9 POWER SUPPLY ORIFT ,

DATE:

TEST ENGINEER

• CARD TYPE' QCR:

CARD S/N Sht of l

(Nomal) 115 VAC Input Output QCR 4

CH1 Ch2 CH3 CH4 (Low) 105 VAC Input Output QCR l

CH1 CH2 CH3 i CH4 (High) 132 VAC Input Output QCR CH1 CH2 CH3 CH4 4

4 I

f

• Provide data sheet #9 for each analog module listed in data sheet #2.

110-4 f

- - - --.,,,s..- -- ., , , . - . - . , - , . . - , ,

-e. ,- - . , , , , . _ - . - e,,, , ,..,,-.w.- ,.e,,.-.,,,.,..,..,..a e.,.,

1

• i 1

DATA SHEET #10 HI-POTENTIAL TEST . .

i DATE:

TEST ENGINEER:

QCR l DIGITAL ISOLATOR DATA SHEET.

Sht of i

Card Card Leakage Current Leakage Current Slot S/N Channel Z KVDC QCR. 2 KVAC QCR 1

2 3

, Accepted 4 Rejected 5 1 6 j 7 i 8 1

2 3

Accepted 4 Rejected 5 6

.4 7 i 8 1

4 2 3

Accepted 4 Rejected 5 6

i 7 8

1 2

. 3 l Accepted 4 ,

Rejected 5 6

". 7 -

! 8 i

110-4

, - _ _ _ . _ - . _ - - - ._-,._,___m- . . ~ . ,,_,....,_.,__,_,,.,,,_,_,,,-_____,m. , _ , . , _ _ , , , , , , , _ _ . , , _ . , , , _ .