ML20107C102

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Responds to 850131 Request for Addl Info Re SPDS Isolators. Description of Measures Taken to Protect Safety Sys from Electrical Interference Generated by SPDS Will Be Provided by Aug 1985
ML20107C102
Person / Time
Site: Fort Saint Vrain Xcel Energy icon.png
Issue date: 01/31/1985
From: Warembourg D
PUBLIC SERVICE CO. OF COLORADO
To: Johnson E
NRC OFFICE OF INSPECTION & ENFORCEMENT (IE REGION IV)
References
P-85035, TAC-51242, NUDOCS 8502210183
Download: ML20107C102 (11)


Text

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0 PublicService .

Company of Colorado P.O. Box 840 Denver, CO S0201-0840 (303)571 -7511 January 31, 1985 Fort St. Vrain Unit No.1 P-85035 e n IV DM  %

Nuclear Regulatory Commission 611 Ryan Plaza Drive, Suite 1000 '

FEB - 5W Arlington, Texas 76011

- N Attention: Mr. E. H. Johnson Docket No. 50-267

SUBJECT:

Safety Parameter Display System

REFERENCES:

1) PSC Letter, Warembourg to Johnson, 11/13/84 (P-84487)
2) NRC Letter, Johnson to Lee, 9/14/84 (G-84355)

Dear Mr. Johnson:

In Reference 1 above, we indicated that the following information (quoted from Reference 2) regarding the Safety Parameter Display System Isolators would be provided by 1/31/85:

NRC Request With regards to isolation devices between the SPDS and safety systems, provide the following information:

1.) " Prior to procurement, FSV will conduct an analysis to determine the maximum credible fault (voltage and current) that the isolators will be exposed to during normal operation. The staff advised FSV that the credible fault must be applied to the output of the device in the transverse mode (between signal and return) and other faults should be considered (i.e, open and short circuits)."

2.)"The staff requested that the acceptance criteria be identified -

in their Safety Analysis Report, and the tests results he submitted to the NRC for confirmatory review."

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8502210183 650131 PDR ADOCK 05000267 '\ g gved gjg F PDR \ f6 $) 3/

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3.) " Define the pass / fail acceptance criteria for each type of device."

4.) "A description of the measures taken to protect the safety systems from electrical interference (i.e., Electrostatic Coupling, EMI, Common Mode and Crosstalk) that may be generated by the SPDS."

Item 1 is addresed by Attachment 1 to this letter. Items 2 and 3 are addressed by Attachment 2. Item 4 can not be supplied at this time, as we are vendor dependent regarding this information. This information will be supplied as soon as it is available, in any case it should be no later than August,1985.

If you have any questions regarding this matter, please call Mr. M.

H. Holmes at (303) 571-8409.

Very truly yours, Ah /Y- (Yousd D. W. Warembourg Manager, Nuclear Engincering Division DWW/ MEN /ksc .

Attachments

m . -:

-~ Attachment 1 a '

-.: '. P-85035 Fort St. Vrain Safety Parameter Dis) lay System Isolation Device Maximum Credible ;ault Study

~A Maximum Credible Fault Study was conducted to ensure the isolation

-devices-selected forLuse by the.SPDS System would protect associated safety related systems. As we indicated in Reference - 1, test configurations and-test data will be supplied when available. This is currently scheduled to be no later than August, 1985.

The- study analyzed.all ports in the isolating devices to ensure all faults were considered.

Isolator Input Faults The Data' Logger Inputs requiring isolation were divided into two categories:

  • Current Loops - These contain potentials of up to 84 VDC with'

' normal signals of 4 to 20 mA and 10 to 50 mA.

  • Miscellaneous Circuitry - These contain potentials and outputs up to 20 VDC.-

- All of these categories-are powered from 120 VAC sources. This value was set as a baseline _ minimum fault potential.-

Each category was analyzed for faults (shorts, opens, component value changes) to determine -the highest potential that - could possibly-appear on ..the' Loutput of the circuit and the_ input of the . isolating devices. It was decided 'to detemine both the largest AC and DC-potential _due to the use;of large DC potentials in some circuitry.-

lThe ' study ' determined the highest AC potential and current to be 120 VAC 2 amps. The' highest DC: fault potential was found to be in- the-

- current loop category-(Ref. Fig. 2). The DC potentialj and current. is.

+ - 100 VDC 1 amp.

Isolator Cabinet Faults

- The maximum fault to be isolated on the output and power ports of the

- the maximum credible fault.

. isolating device available in the wil1~be isolationdetermined cabinet- by(see Figures 6 87). -_This fault will not be tested in.the input side of the isolating device _ as the required physical: separationLbetween 1 IE and non IE sides.of the isolating cabinet' negates 'the credibility of this fault appearing on

- the isolator input. '

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. _ _ _ _ _ _ .l______m_____u __m..-.__._________________-m____._____.m_m.__mU_-___._._.1__.___..____m________.______._____m______m_m_____m._m__..____._m__-_,_.______.___m____ms

The data logger input / output cabinets and isolation will be supplied by inverters N-9255 and N-9234 (refer to Fig. 1). These two inverters supply 120 VAC, 109 (RMS) AMPS and 120 VAC, 130 AMPS (RMS) respectively. The worst possible fault would be a direct short on the output of one of the inverters (N-9234) due to its greater current capacity. Actual data on the inverters peak current on fault is unavailable. However, an examination of data from inverters similar to N-9255 and N-9234 shows the output on fault to reach approximately 125% before the current limiting circuit in the inverter begins to control the output (ref. Fig. 3). Cable lengths between the inverters and the equipment are short; therefore, the effect of the cable impedance on the fault current is negligible.

Current breakers are in the line but their response time at the current produced will allow the current through to the isolation cabinet (Reg. Fig. 4). A safety switch with Amptrap A13t-2 AMP fuses will be placed in the line to reduce the current available to the isolation cabinet from 162.5 AMPS to 5 AMPS (Ref. Fig. 5).

The maximum credible fault to be tested for at the output and power ports of the isolating device is, therefore, 120 ',AC, 5 AMPS (RMS).

The maximum credible faults that are to be tested are:

Input: 1 120 VAC, 2 AMPS 2 10n VDC, 1 AMP Output and Power Supply: 120 VAC, 5 AMPS

Attachment 2

, P-85035 Isolator Fault Testing Acceptance Criteria The isolation device will be considered acceptable if the above testing meets the following criteria:

1. Fault on Input (120V, 2A & 100VDC, 1 AMP)

-a) Associated output does not exceed its normal range.

b) No effect on the input and output of the other channels of the device (multichannel devices only) c) No effect on the i 15 volt power supply voltage.

2. Fault on Output (120V, SA) a) Less than 0.5% change in the associated input.

b) No effect on the input and output of the other channels of the device (multichannel device only).

c) No effect on the i 15 volt power supply voltage.

3. Fault on Power Supply (120V, 5A) a) Output on any channel does not exceed its nonnal range, b) Less than 0.5% change in the input of any channel of the device.

INST BUS 4~

125 VDC 30S 2 '

120/208V N-9238 N-9245 BATT.CHG/INV.5 <

INVERTER G N-9255 CHG N-9234 120V/109A' OUTPUT , ____ 120V/130A OUTPUT

- ___LN V, 8

E4s

~ -m SAFETY /

j SWITCH __

= N-92126 INST. BUS S INST. BUS 6 120V N-9296 120V N-9297
COMPUTER POWER COMPUTER POWER 1

1 DATA 10GGER

. BATTERY 5 PWR DIST PANEL N-9254 120V N-9021

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  • e e s ines+s to emy AUTOMATIC $YNCHRONIZINS: HARMONIC 015hlRTl0N: INSTRUMENTAfl0N:

Phase of Output Voltage is held 5% max. tat nominal freq. & voltage) One a-c voltmeter & One a c ammeter within =5' of sync signal source per phase. 2% accuracy.

PART LOA 0 EFFICIENCY, % of F.L eff.: Synchronization verification ligtit when the source is between 92 and 138 volts between 58 and 62 Hz.  % L-90*'.. % L-75% CONSTRUCTION:

Front and rear access cabinet.

AUTOMATIC VOLTAGE REGULATION: STARTUP PROVi!!ONS: Components on serticai pans. Aemovaoie input Circuit Brealier & Pre charge Switch with screw driver and wrenett. ASA61 Lt. Gray

=1 for any one condition. or =2%

4 second programmed start paint.

total regulatron for any combination of t'te following conditions: CA8tNET:

a. 0 mar. continuous rated Icad. CIRCUlf PROTECTION:

1.0 0.5 p.f. lagging.* Input 0-C Input CB (per phase) stuensions ctranasects

b. from discharge to equalize batterF Control Circuit fuses free Wieth Meight septh Freet.co'rt'dl pear voltage (see Note above).

m Power Semiconductors. Current limit fuses

c. 32122'F ambient. 42 spares) W6 54* 84* 32%" 27* 24* 27*

Output. Autornatic Current Limit m OUTY: Continuous (can tre disconnected) wg 64* 84* 48* 36* 30* 36*

RANCE OF A0JUSTMENTS:

VoRage =4 2%

$HORT ClflCUIT GUTPUT CURRENT: g6'.* 162- 84* 32%* 27* 24 27" Frequency 2 2 Hz rom.125% of unity p.f. F.L Amperes

  • 192* 84* 48- 36* 30" 36' W8 FREQUEN?Y STABILITY: 0 C INPUT TRAN3lENT TOLERANCE:

=.6 Hr. 32122*F. 'M fe' 10 ""croseconds (40 chms or

  • Note: Inverter assemb'ed and shipped in NOTE greater transient source impedance). three separate W cabinets.

=.5 Hz 50100'F.

  • Lead regulehen will be = 1.S*'. lor inverters enerked in A.C output Veltese Coluonn abere, when lead is EtoV,2 wire or f tol2 cay.

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                    ,                 ,,,               .; - t                                                           FAULT CURRENT = 162.5 AMPS f             .
                                    "i              U                  U                                                CORRECTION I 2t = 1.5 (0.26) Amp                                 FACTOR       SeC. = {8/25) (0.34-0.215) + 0.215 =

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NOTE: TABLES TAKEN FROM GOULD SCHAWMUT BULLETIN #AT618. FIG. 5

FAULT ON INPUT. ~ ISOLATION CUTPUT INPUT MODULE /PCB TEST

                             ,-      CHANNEL                     -\    1 VOLTAGES       ,-

1 - _ _1_ _ _ _ _

                               -CHANNEL                           -

2 MONITORED MONITORED CHANNELS

                                -CHANNEL                          -

CHANNELS - -

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_ _ _3_ _ _ _ _ . . CHANNEL 4 MONITORED 120 J- CABINET VAC }CPOWER SUPPLY FAULT ON OUTPUT INPUT ISOLATION OUTPUT l MODULE /PCB

                                                                                              -   CHANNEL           - TEST VOLTAGE i

CHANNEL 2 MONITORED $ MONITORED CHANNELS CHANNEL CHANNELS

                                                                                              ---_3__---

CHANNEL (- 4 -

                                                                                                                      -) MONITORED 120 i- CABIHET VAC   1=    POWER SUPPLY FAULT ON POWER SUPPLY ISOLATION INPUT              MODULE /PCB                                OUTPUT

(- CHANNEL

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_ _ _1 l CHANNEL MONITORED - 2 , MONITORED

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CHANNELS i_ CHANNEL

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                                  ' - CABINET VAC      (=     POWER SUPPLY
                                                                    ! SOLATION TESTING FIG. 6

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                                                                                                                                                     #                Emat.Yocx AnaA mowr Ano naAn ar FIELD CABLE ENTRY / EXIT AS REQUIRED PRELIMINARY CABINET CONFIGURATION NOTE: FINAL CONFIGURATION WILL BE VENDOR DEPENDENT.                                              FINAL CONFIGURATION WILL 11EET IEEE STD. 384 (1982)

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