ML20107C102

Responds to 850131 Request for Addl Info Re SPDS Isolators. Description of Measures Taken to Protect Safety Sys from Electrical Interference Generated by SPDS Will Be Provided by Aug 1985

ML20107C102
Person / Time
Site:	Fort Saint Vrain
Issue date:	01/31/1985
From:	Warembourg D PUBLIC SERVICE CO. OF COLORADO
To:	Johnson E NRC OFFICE OF INSPECTION & ENFORCEMENT (IE REGION IV)
References
P-85035, TAC-51242, NUDOCS 8502210183
Download: ML20107C102 (11)

Text

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0 PublicService Company of Colorado P.O. Box 840 Denver, CO S0201-0840 (303)571 -7511 January 31, 1985 Fort St. Vrain Unit No.1 P-85035 DM e

n IV Nuclear Regulatory Commission FEB - 5W 611 Ryan Plaza Drive, Suite 1000 Arlington, Texas 76011 N

Attention: Mr. E. H. Johnson Docket No. 50-267

SUBJECT:

Safety Parameter Display System

REFERENCES:

1) PSC Letter, Warembourg to Johnson, 11/13/84 (P-84487)

2) NRC Letter, Johnson to Lee, 9/14/84 (G-84355)

Dear Mr. Johnson:

In Reference 1 above, we indicated that the following information (quoted from Reference 2) regarding the Safety Parameter Display System Isolators would be provided by 1/31/85:

NRC Request With regards to isolation devices between the SPDS and safety systems, provide the following information:

1.) " Prior to procurement, FSV will conduct an analysis to determine the maximum credible fault (voltage and current) that the isolators will be exposed to during normal operation. The staff advised FSV that the credible fault must be applied to the output of the device in the transverse mode (between signal and return) and other faults should be considered (i.e, open and short circuits)."

2.)"The staff requested that the acceptance criteria be identified g() h in their Safety Analysis Report, and the tests results he submitted to the NRC for confirmatory review."

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3.) " Define the pass / fail acceptance criteria for each type of device."

4.) "A description of the measures taken to protect the safety systems from electrical interference (i.e.,

Electrostatic Coupling, EMI, Common Mode and Crosstalk) that may be generated by the SPDS."

Item 1 is addresed by Attachment 1 to this letter.

Items 2 and 3 are addressed by Attachment 2.

Item 4 can not be supplied at this time, as we are vendor dependent regarding this information.

This information will be supplied as soon as it is available, in any case it should be no later than August,1985.

If you have any questions regarding this matter, please call Mr. M.

H. Holmes at (303) 571-8409.

Very truly yours, Ah /Y- (Yousd D. W. Warembourg Manager, Nuclear Engincering Division DWW/ MEN /ksc Attachments

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P-85035 a

Fort St. Vrain Safety Parameter Dis) lay System Isolation Device Maximum Credible

ault Study

~A Maximum Credible Fault Study was conducted to ensure the isolation

-devices-selected forLuse by the.SPDS System would protect associated safety related systems.

As we indicated in Reference - 1, test configurations and-test data will be supplied when available.

This is currently scheduled to be no later than August, 1985.

The-study analyzed.all ports in the isolating devices to ensure all faults were considered.

Isolator Input Faults The Data' Logger Inputs requiring isolation were divided into two categories:

These contain potentials of up to 84 VDC with'

• Current Loops

' normal signals of 4 to 20 mA and 10 to 50 mA.

• Miscellaneous Circuitry - These contain potentials and outputs up to 20 VDC.-

- All of these categories-are powered from 120 VAC sources. This value was set as a baseline _ minimum fault potential.-

Each category was analyzed for faults (shorts, opens, component value changes) to determine -the highest potential that - could possibly-appear on..the' Loutput of the circuit and the_ input of the. isolating devices.

It was decided 'to detemine both the largest AC and DC-potential _due to the use;of large DC potentials in some circuitry.-

lThe ' study ' determined the highest AC potential and current to be 120 VAC 2 amps. The' highest DC: fault potential was found to be in-the-

- current loop category-(Ref. Fig. 2).

+

- 100 VDC 1 amp.

The DC potentialj and current. is.

Isolator Cabinet Faults

- The maximum fault to be isolated on the output and power ports of the

- the maximum credible fault.

isolating device wil1~be determined by(see Figures 6 87). -_This fault available in the isolation cabinet-will not be tested in.the input side of the isolating device _ as the required physical: separationLbetween 1 IE and non IE sides.of the isolating cabinet' negates 'the credibility of this fault appearing on

- the isolator input. '

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The data logger input / output cabinets and isolation will be supplied by inverters N-9255 and N-9234 (refer to Fig.

1).

These two inverters supply 120 VAC, 109 (RMS) AMPS and 120 VAC, 130 AMPS (RMS) respectively. The worst possible fault would be a direct short on the output of one of the inverters (N-9234) due to its greater current capacity. Actual data on the inverters peak current on fault is unavailable.

However, an examination of data from inverters similar to N-9255 and N-9234 shows the output on fault to reach approximately 125% before the current limiting circuit in the inverter begins to control the output (ref. Fig. 3).

Cable lengths between the inverters and the equipment are short; therefore, the effect of the cable impedance on the fault current is negligible.

Current breakers are in the line but their response time at the current produced will allow the current through to the isolation cabinet (Reg. Fig. 4). A safety switch with Amptrap A13t-2 AMP fuses will be placed in the line to reduce the current available to the isolation cabinet from 162.5 AMPS to 5 AMPS (Ref. Fig. 5).

The maximum credible fault to be tested for at the output and power ports of the isolating device is, therefore, 120 ',AC, 5 AMPS (RMS).

The maximum credible faults that are to be tested are:

Input:

1 120 VAC, 2 AMPS 2

10n VDC, 1 AMP Output and Power Supply:

120 VAC, 5 AMPS

P-85035 Isolator Fault Testing Acceptance Criteria The isolation device will be considered acceptable if the above testing meets the following criteria:

1.

Fault on Input (120V, 2A & 100VDC, 1 AMP)

-a) Associated output does not exceed its normal range.

b) No effect on the input and output of the other channels of the device (multichannel devices only) c) No effect on the i 15 volt power supply voltage.

2.

Fault on Output (120V, SA) a) Less than 0.5% change in the associated input.

b) No effect on the input and output of the other channels of the device (multichannel device only).

c) No effect on the i 15 volt power supply voltage.

3.

Fault on Power Supply (120V, 5A) a) Output on any channel does not exceed its nonnal range, b) Less than 0.5% change in the input of any channel of the device.

INST BUS 4~

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AUTOMATIC $YNCHRONIZINS:

HARMONIC 015hlRTl0N:

INSTRUMENTAfl0N:

Phase of Output Voltage is held 5% max. tat nominal freq. & voltage)

One a-c voltmeter & One a c ammeter within =5' of sync signal source per phase. 2% accuracy.

when the source is between PART LOA 0 EFFICIENCY, % of F.L eff.:

Synchronization verification ligtit 92 and 138 volts between

% L-90*'.. % L-75%

CONSTRUCTION:

58 and 62 Hz.

Front and rear access cabinet.

AUTOMATIC VOLTAGE REGULATION:

STARTUP PROVi!!ONS:

Components on serticai pans. Aemovaoie

=1 for any one condition. or =2%

input Circuit Brealier & Pre charge Switch with screw driver and wrenett. ASA61 Lt. Gray total regulatron for any combination of 4 second programmed start paint.

t'te following conditions:

CA8tNET:

a. 0 mar. continuous rated Icad.

CIRCUlf PROTECTION:

stuensions ctranasects 1.0 0.5 p.f. lagging.*

Input 0-C Input CB (per phase)

b. from discharge to equalize batterF Control Circuit fuses free Wieth Meight septh Freet.co'rt'dl pear voltage (see Note above).

Power Semiconductors. Current limit fuses m

c. 32122'F ambient.

42 spares)

W6 54*

84*

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27*

24*

27*

Output. Autornatic Current Limit m

OUTY: Continuous (can tre disconnected) wg 64*

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$HORT ClflCUIT GUTPUT CURRENT:

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Frequency 2 2 Hz rom.125% of unity p.f. F.L Amperes W8 192*

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30" 36' FREQUEN?Y STABILITY:

0 C INPUT TRAN3lENT TOLERANCE:

=.6 Hr. 32122*F.

NOTE

'M fe' 10 ""croseconds (40 chms or

• Note: Inverter assemb'ed and shipped in

=.5 Hz 50100'F.

greater transient source impedance).

three separate W cabinets.

• Lead regulehen will be = 1.S*'. lor inverters enerked in A.C output Veltese Coluonn abere, when lead is EtoV,2 wire or f tol2 cay.

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FAULT ON INPUT. ~ ISOLATION CUTPUT INPUT MODULE /PCB TEST CHANNEL -\\ 1 _ _1 VOLTAGES 1 -CHANNEL MONITORED 2 CHANNELS MONITORED -CHANNEL CHANNELS _ _ _3 } CHANNEL 4 MONITORED 120 J-CABINET VAC }CPOWER SUPPLY FAULT ON OUTPUT INPUT ISOLATION OUTPUT l MODULE /PCB CHANNEL - TEST VOLTAGE i CHANNEL 2 MONITORED MONITORED $ CHANNEL CHANNELS CHANNELS ---_3__--- CHANNEL (- 4 -) MONITORED 120 i-CABIHET 1= POWER SUPPLY VAC FAULT ON POWER SUPPLY ISOLATION INPUT MODULE /PCB OUTPUT -} (- CHANNEL l _ _ _1 CHANNEL 2 , MONITORED MONITORED CHANNELS i_ CHANNELS ~ ~ ~ ~ ~ ~ CHANNEL _ _.3 _ _ _ _ _. CHANNEL r-/ (- 4 ) TEST VOLTAGE 120 ' - CABINET j VAC (= POWER SUPPLY ! SOLATION TESTING FIG. 6

s s 1 ISOLATION SYSTEM CONFIGURATION FIELD CABLE ENTRY / EXIT AS REQUIRED C [) \\ mr Al I \\ O l Yocx AnaAs 7 i ; lj _e g u7 g s = y a E 1 fA \\ SECTION A-A ,. N '* ' g o 4.o% M s1 \\ Yp+ {)ff Emat.Yocx AnaA

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r ar FIELD CABLE ENTRY / EXIT AS REQUIRED PRELIMINARY CABINET CONFIGURATION NOTE: FINAL CONFIGURATION WILL BE VENDOR DEPENDENT. FINAL CONFIGURATION WILL 11EET IEEE STD. 384 (1982) FIG. 7 >}}