Text

Proposed Tech Specs,Replacing Existing Reactor Recirculation Flow Control Sys W/Adjustable Speed Drive Sys
	ML17291B094
Person / Time
Site:	Columbia
Issue date:	10/26/1995
From:	; WASHINGTON PUBLIC POWER SUPPLY SYSTEM
To:	;
Shared Package
ML17291B093	List: GO2-95-228, Application for Amend to License NPF-21,revising TS to Reflect Replacement of Existing Reactor Recirculation Flow Control Sys W/Adjustable Speed Drive Sys; ML17291B094;
References
	NUDOCS 9510310383
	Download: ML17291B094 (179)
	v • d • e

APPENDIX E TECHNICALSPECIFICATION PAGES WITHPROPOSED CHANGES INDICATED 9510310383 951026 PDR ADOCK 05000397 P

PDR

Appendix E Page 1 of 10 Add the followingInserts where indicated on the attached Technical Specification page markups.

INSERT A "4.4.1.1.3 Each reactor coolant system recirculation loop pump speed controller shall be demonstrated OPERABLE at least once per 24 months by verifying that the average rate of change ofpump speed is:

a.

Less than or equal to 10% ofrated pump speed per second increasing, and b.

Less than or equal to 10% ofrated pmnp speed per second decreasing. "

INSERT B

~ recirculation pump speed and flow... "

~

INSERT C The Supply System willadd the following sentence to the Bases upon approval of the proposed changes to the Technical Specifications:

"The response times assume a 60 Hz output frequency Pom the adjustable speed drives (ASDs). "

Ili

3 4.2 POWER DISTRIBUTION LIMITS 3 4.2.7 STAB TY MONITOR NG TWO LOOP OPERATION LIMITING CONDITION FOR OPERATION 3.2.7 The stability monitoring system shall be operable*

and the decay ratio of the neutron signals shall be less than

.75 when operating in the region of APPLICABILITY.

A~PI B

TP:

OPIAATIOAAL OOIIOITIOA I, ~Itt t I

I tt I

P* I operation and THERMAL POWER/core flow conditions which lay in Region C of Figure 3.2.7-1.

ACTION:

a.

With-decay ratios of any two (2) neutron signals greater than or equal to 0.75 or with two (2) consecutive decay ratios on any single neutron signal greater than or equal to 0.75:

b.

As soon as practical, but in all cases within 15 minutes, initiate action to reduce the decay ratio by either decreasing THERMAL POWER with control rod insertion or incr easing core flow~h-recAreANAon-Row-Goatro~

~~e-mar6pu&&on; The starting o~MAAo+of a recirculation pump for the purpose of decreasing decay ratio is specifically prohibited.

With the stability monitoring system inoperable and when operating in the region of APPLICABILITY:

As soon as practical, but in all cases within 15 minutes, initiate action to exit the region of APPLICABILITYby either decreasing THERMAL POWER with control rod insertion or increasing core flow~~ec'i~ul~o~

w-conkrQ~Ave-man4p&a&en.

The starting ersM4t4n~of a recirculation pump for the purpose of exiting the region of APPLICABILITY when the stability monitoring system is inoperable is specifically prohibited.'xit the region of APPLICABILITYwithin one (I) hour.

SURVEI LANCE RE UIREMENTS 4.2.7.1 The provisions of Specification 4.0.4 are not applicable.

4.2.7.2 The stability monitoring system shall be demonstrated operable*

within one (I) hour prior to entry into-the region of APPLICABILITY.

4.2.7.3 Decay ratio and peak-to-peak noise values calculated by the stability monitoring system shall be monitored when operating in the region of APPLICABILITY.

Verify that the stability monitoring system data acquisition and calculational modules are functioning, and that displayed values of signal decay ratio and peak-to-peak noise are being updated.

Detector levels A and C (or 8 and D) of one LPRM string in each of the nine core regions (a total of 18 LPRM detectors) shall be monitored.

A minimum of four (4)

APRMs shall also be monitored.

WASHINGTON NUCLEAR - UNIT 2 3/4 2-7 Amendment No. 94,137

I I" g

3 4.2 POWER 0 STR BUTION LIMITS 3 4.2.8 STABI ITY MONITORING - SINGL LOOP OPERATION LIMITING CONDITION FOR OPERATION 3.2.8 The stability monitoring system shall be operable*

and the decay ratio of the neutron signals shall be less than

.75 when operating in the region of

'PPLICABILITY.

~APPLI AAI TI:

IIPIAATIOAALI AOITIOA I; Itt I

I tt I

p I operation and THERMAL POWER/core flow conditions which lay in Region C of Figuee 3.2.8-1.

~ACT ON:

a.

With decay ratios of any two (2) neutron signals greater than or equal. to 0.75 or with two (2) consecutive decay ratios on any single neutron signal greater than or equal to 0.75:

As soon as practical, but in all cases within 15 minutes, initiate action to reduce the decay ratio by either decreasing THERMAL POWER with control rod insertion or increasing core flow e&h-ve~auAMon-Aow-cod~

~kate-man4p&a@en-.

The starting ersh&&e~of a recirculation pump for the purpose of decreasing decay ratio is specifically prohibited.

b.

With the stability monitoring system inoperable and when operating in the region of APPLICABILITY:

As soon as practical, but in all cases within 15 minutes, initiate action to exit the region of APPLICABILITY by decreasing THERMAL POWER with

~control rod insertion.

Exit the region of APPLICABILITYwithin one (I) hour.

SURVEILLANCE RE UIREMENTS 4.2.8.1 The provisions of Specification 4.0.4 are not applicable.

4.2.8.2 The stability monitoring system shall be demonstrated operable*

within one (I) hour prior-to entry into the region of APPLICABILITY.

4.2.8.3 Decay ratio and peak-to-peak noise values calculated by the stability monitoring system shall be monitored when operating in the region of APPLICABILITY.

Verify that the stability monitoring system data acquisition and calculational modules are functioning, and that displayed values of signal decay ratio and peak-to-peak noise are being updated.

Detector levels A and C.(or B and D) of one LPRM string in each of the nine core regions (a total of 18 LPRM detectors) shall be monitored.

A minimum of four (4)

APRMs shall also be monitored.

WASHINGTON NUCLEAR - UNIT 2 3/4 2-9 Amendment No. 94, i37

0

$4 U

0

3/4.4 REACTOR COOLANT SYSTEM 1

3/4. 4. 1 RECIRCULATION SYSTEM RECIRCULATION LOOPS LIMITING CONDITION FOR OPERATION 3.4. 1.1 Two reactor coolant system recirculation loops shall be in operation.

APPLICABILITY:

OPERATIONAL CONDITIONS 1" and=.2".

ACTION:

a.

With one reactor coolant system recirculation loop not in operation:.

l.

Verify that the requirements of LCO 3.2.6 and LCO 3.2.8 are met, or comply with the associated ACTION statements.

2.

Verify that'HERMAL POWER/core flow conditions lay outside Region 8 of Figure 3.4.1.1-1.

With THERMAL POWER/core flow conditions which lay in Region 8

of Figure 3.4. 1. 1-1, as soon as practical, but in all cases.

within 15 minutes, initiate action to exit Region 8 by either decreasing THERMAL POWER with control rod insertion or increas ing cor e flow wWh-flow-contro~Awe-marApu&Me~

'IAIithin 1 hour1.157407e-5 days 2.777778e-4 hours 1.653439e-6 weeks 3.805e-7 months exit Region 8.

The starting ~hi&5ng%f a

. recirculation pump for the purpose of exiting Region 8 is specifically prohibited.

3.

Mithin 4 hour4.62963e-5 days 0.00111 hours 6.613757e-6 weeks 1.522e-6 months s:

Da.la.+ad m-j+-the-LocW~

b)

Increase the MINIMUM CRITICAL POMER RATIO (MCPR) Safety Limit per Spec.fication

2. 1.2,

and, c)

Reduce the Maximum Average Planar Linear Heat Generation Rate (MAPLHGR) for General Electric fuel limit to the single recirculation loop operation limit specified in the Core Operating Limits Report, and d)

Reduce the volumetric flow rate of the operating recircula-tion loop to

< 41,725"" gpm.

"See Special Test Exception 3.10.4.

""This value represents the actual volumetric recirculation loop flow which produces 100% core flow at, 100K THERMAL POMER.

This value was determined during the Startup Test Program.

WASHINGTON NUCLEAR " UNIT 2 3/4 4-1 Amendment No.

94

REACTCR

O'NT SYST" M E

T R

T TE LiMii NG COND jTION FOR OPERATiON (Continued)

ACTION:

(Continued}

b.

~,

e)

Perform Surveillance Requirement 4.4.1.1.2 if THERMAL POWER is

< 25Ã""

of RATED THERMAL POWER or the recirculation loop flow in the operating loop is

< 10~ " of rated loop flow.

The provisions of Specification'.0.4 are not applicable.

" Otherwise, be in at least.HOT SHUTDOWN within the next 12 hours1.388889e-4 days 0.00333 hours 1.984127e-5 weeks 4.566e-6 months .

With no reactor coolant system recirculation loops in operation, immediately initiate measures to place the unit in at least HOT SHUTDOWN within the next 6 hours6.944444e-5 days 0.00167 hours 9.920635e-6 weeks 2.283e-6 months .

SURVEiLLANCE REQUIREMENTS 4.4.1.1.1 With one reactor coolant system recirculation loop not in operation, at least once per 8 hours9.259259e-5 days 0.00222 hours 1.322751e-5 weeks 3.044e-6 months verify that:

~~lckad

~~~a-Control-)-mode,an~

>> ~

The volume ric low rate of the operating loop is

< 41,72S gpm.""

This value represents the actual volumetric recirculation loop flow which produces 100~ core flow at 100" THERMAL POWER.

This value was determined Curing the Startup Test Program.

"""Final values were determined during Startup Testing based upon actual THERMAL POWER and recirculation loop flow which will s~eep the caId water

>rom the vessel bottom head preventing stratification.

WASHINGTON NUCLDcR UNIT 2 3/4 4-2 Amendment No. >>

I 4k~ l 4

REACTOR COOLANT SYSTEM SURVEILLANCE RE UIREHENTS Continued) c..

Core flow is greater than or equal to 39% of rated core flow when core THERMAL POWER is greater than the limit specified in Figure 3.4.1.1-1.

4.4.1.1. 2 With 'one reactor coolant system recirculation loop not in operation, within no more than 15 minutes prior to either THERMAL POWER increase or recir culation loop flow increase, verify that the following differential temperature requirements are met if THERMAL POWER is < 25%""" of RATED THERHAL'POWER or the recirculation loop flow in the operating recirculation loop is

< 10%""" of rated

'1oop flow:

a.

< 1454F between reactor vessel steam space coolant and bottom head Grain line coolant, b.

< 50'F between the reactor coolant within the loop not in operation and the coolant in the reactor pressure vessel',

and c.

< 504F between the reactor coolant within the loop not in operation and the operating loop.

The differential temperature requirements of Specification 4.4.1.1.2b.

and c.

do not apply when the loop not in operation is isolated from the reactor pressure vessel.

4.4.1.1 Each reacto coolant ystem r irculation loop flow control valve shall e

dern hstrate OPERABLE t least nce per 8 months y:

erifyig that th control alve fai s "as is" on loss o

hydraulic pressu 5 (at the ydrauli control nit), an Ver ying tha the ave ge rate f control valve mov ent is:

Less an or eq al to 2.

Less than or e ual'.to 1

of strok per secon

opening, nd 11% of stroke er second closin ZXSERT A

"""Final values were determined during Startup Testing based upon actual THERMAL POWER and recirculation loop flow which will sweep the cold water from the vessel bottom head preventing stratification.

WASHINGTON NUCLEAR - UNIT 2 3/4 4-3 Amendment No. 71

REACTOR COOLANT SYSTEN

'ET PUMPS LIMITING CONDITION FOR OPERATION 3.4.1.2 All jet pumps shall be OPERABLE.

A~It:

PEEATIONAI OONOITIONE I d

E.

ACTION:

Mith one or more jet pumps inoperable, be in at least HOT SHUTDOWN within 12 hours1.388889e-4 days 0.00333 hours 1.984127e-5 weeks 4.566e-6 months .

SURVEILLANCE RE UIREMENTS NOTES The provisions of Specification 4.0.4 are not applicable provided the surveillance is:

1.

Performed within 4 hours4.62963e-5 days 0.00111 hours 6.613757e-6 weeks 1.522e-6 months after the associated recirculation loop is in operation.

. 2.

Performed within 24 hours2.777778e-4 days 0.00667 hours 3.968254e-5 weeks 9.132e-6 months after exceeding 25K of RATED THERMAL POWER.

These notes are applicable to both surveillance 4.4.1.2.1 and 4.4.1.2.2.

4.4. 1.2.1 Each of the above required jet pumps shall be demonstrated OPERABLE at least once per 24 hours2.777778e-4 days 0.00667 hours 3.968254e-5 weeks 9.132e-6 months by determining recirculation loop flow, total core flow and diffuser-to-lower plenum differential pressure for each jet pump and verifying that no two of the following conditions occur when both recirculation loops are operating.

a ~

The indicated recirculation loop flow differs by more than 10K from tb t bll b dyl ~

'I ~ bdb ddd characteristics for two recirculation loop operation.

~Ngy ll b.

The indicated total core flow differs by more than lOX from the established total core flow value'derived from two recirculation loop flow measurements.

c.

The indicated diffuser-to-lower plenum differential pressure of any individual jet pump differs from established two recirculation loop operation patterns by more than 20K.

4.4. 1.2.2 During single recirculation loop operation, each of the above required jet pumps shall be demonstrated OPERABLE at least once per 24 hours2.777778e-4 days 0.00667 hours 3.968254e-5 weeks 9.132e-6 months by verifying that no two of the following conditions occur:

b.

The indicated recirculation loop flow in the operating loop differs by tt Itt I tb t bit*A I El

'b' Pdb I

t l*tl *.

b dyd Z'tQEZTB The indicated total core flow differs by more than 10X from the established total core flow value derived from single recirculation loop flow measurements.

c.

The indicated diffuser-to-lower plenum differential pressure of any individual jet pump differs from established single recirculation loop patterns by more than 20X.

'WASHINGTON NUCLEAR UNIT 2 3/4 4-4 Amendment No. 493, 141

TAB E 3 6 3-Co tinued A

CO SO 0

V ES

'D n

m Kl I

C UC ION ND U

B a.

utomat c so at o

V es (Continued)-

Equipment Drain (Radioactive)

EDR-V-19 EOR-V-20 Floor Drain (Radioactive)

FDR-V-3 FDR-V-4 Fuel Pool Cooling/Supp} ession Pool Cleanup FPC-V-149 FPC-V-153(f)

FPC-V-154(f)

FPC-V-156 ALV GROU MAXIHUH ISOLATION TINE Seco ds 15 15 35 O

H+V-A, B

)fY-ISA+

H

-I A,B I Y-V OA HY

-33

,B H -V-4A, HY- -35 H -V-A,B Traversing Incore Probe TIP-V-1,2,3,4,5 TIP-V-15 V7fis Lukivd. Qbgc 7o ha dclc&dd'ro~ WM~i~1 SPeciA~A'o~s P~~

602-93-25'(

~da M/0/2//93 (7AC A1 8843)

~

D 4 'I

B 3

U C

0 d.

Ot e Co e

(Continued)

SO 6

OU HAXIHUH ISOLATION TIHE d

Radiation Honitoring PI-V-X72f/1 PI-V-X73e/1 Transversing Incore Probe System TIP-V-6 TIP-V-7,8,9,10,11(e)

Vobis ~~%ra waaa Vo h~

deist~ 4rOd MCCAat sCS I S~fiMkoucS WLt-d02-9B-zsc

) da6J tofziAs (~c +Sa/6s)

N.A.

N.A.'But greater than 3 seconds.

PProvisions of Technical Specification 3.0.4 are not applicable.

a See Technical Specification 3.3.2 for the isolation signal(s) which operate each group.

b)

Valve leakage not included in sum of Type B and C tests.

c)

Hay be opened on an intermittent basis under administrative control.

d)

Not closed by SLC actuation signal.

e Not subject to Type C Leak Rate Test.

f Hydraulic leak test at 1'. 10 P.

g Not subject to Type C test.

fest per Technical Specification 4.4.3.2.2 (h

Tested as part of Type A test.

(i)

Hay be tested as part of Type A test.

If so tested, Type C test results may be excluded from sum of other Type B and C tests.

(j)

Reflects closure times for containment isolation only.

(k During operational conditions 1,

2 IIt 3 the requirement for automatic isolation does not apply to RHR-V-8.

Except that RHR-V-8 may be opened in operational conditions 2

8 3 provided control is returned to the control room with the interlocks reestablished and reactor ressure is less than 135 si r

(1)

The isol t on og c asso a

e e re c or r c rcpt a

o y r u c

on ro con nmen so on v

ves eed ot m et si gle t tiara crtte a fo OPEIRQILI for per d en ng no later han y lg, 995

A

> ~

, gy,l

INSTRUMENTATION BASES 3 4.3.4 R

C RCULAT ON PUMP TRIP ACTUATION INSTRUMENTATION The anticipated transient without scram (ATWS) recirculation pump trip system provides a means of limiting the consequences of the unlikely occurrence of a failure to scram during an anticipated transient.

The response of the plant to this postulated event falls within the envelope of study events in General Electric Company Topical Report NED0-10349, dated March 1971, and NED0-24222, dated December 1979.

The end-of-cycle recirculation pump trip (EOC-RPT) system is a part of the reactor protection system and is an essential safety supplement to the reactor trip.

The purpose of the EOC-RPT is to recover the loss of thermal margin which occurs at the end-of-cycle.

The physical phenomenon involved is that the void reactivity feedback due to a pressurization transient can

.add positive reactivity to the reactor system at a faster rate than the control rods add negative scram reactivity.

Each EOC-RPT.system trips both recircula-tion pumps, reducing coolant flow in order to reduce the void collapse in the core during two of the most limiting pressurization events.

The two events for which the EOC-RPT protective feature will function are closure of the turbine throttle valves and fast closure of the turbine governor valves.

A fast closure sensor from each of two turbine governor valves provides input to the EOC-RPT system; a fast closure'sensor from each of the other two turbine governor valves provides input to the second EOC-RPT system.

Simil-

arly, a position switch for each of two turbine throttle valves provides input to one EOC-RPT system; a position switch from each of the other two throttle valves provides input to the other EOC-RPT system.

For each EOC-RPT system, the sensor relay contacts are arranged to form a 2-out-of-2 logic for the fast closure of turbine governor valves and a 2-out-of-2 logic for the turbine throttle valves.

The operation of either logic will actuate the EOC-RPT system and trip both recirculation pumps.

Each EOC-RPT'ystem may be manually bypassed by use of a keyswitch which is administratively controlled.

The manual bypasses and the automatic Operating Bypass at less than 30K of RATED THERMAL POWER are annunciated in the control room.

The EOC-RPT System instrumentation that provides a trip signal measures first stage turbine pressure to initiate a trip signal.

The safety analysis requiring an EOC-RPT bases initial conditions on rated.power and specifies turbine bypass operability at greater than or equal to 30K of rated thermal power.

Because first stage pressure can vary depending on operating conditions, the qualifying notes describing when the turbine bypass feature is to disabled specify a turbine first stage pressure corresponding to less than 30K RTP (turbine first stage pressure is dependent on the operating parameters of the reactor,

turbine, and condenser).

Therefore, because a

value for turbine first stage pressure cannot be precisely fixed and because pressure measurement initiates the trip the Technical Specification refers to a pressure associated with a specific Rated Thermal Power value rather than a

value for pressure.

The EOC-RPT system response time is the time assumed in the analysis between initiation of valve motion and complete suppression of the electric arc, i.e.,

190ms, less the time allotted for sensor

response, i.e.,

10ms, and less the time allotted for breaker arc suppression determined by test,'s correlated to manufacturer's test results, i.e.,

83ms, and plant preoperational test results.

Add KdsERT L Operation with a trip set less conservative than its Trip Setpoint but within its specified Allowable Value is acceptable on the basis that the difference between each Trip Setpoint and the Allowable Value is equal to or less than the drift allowance assumed for each trip in the safety analyses.

WASHINGTON NUCLEAR UNIT 2 B 3/4 3-3 Amendment No. )37

0 R

Qt S 4

E y ~ a

ATTACHMENT1 Attachment 1 contains the detailed responses to the staff questions

...9603200260

~F kl

~'v<g

'1;l

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL

~

The following information provides the Supply System responses to the staff questions from Reference

1. The question numbers and question statements from the Reference 1 enclosure are duplicated for convenience and tracking.

Qi~eion 1

What are the sources of power for the GE-FANUC system?

~Res onse The GE-PANUC control system for the RRC system ASD is located in main control room panel E-CP-H13/P634. The 120 VAC power to the H13/P634 panel is supplied from a critical bus.

The PANUC Input/Output (I/O) signal communication panel, E-CP-RRC/ASD/1, is located in the ASD building. The 120 VAC supply to the local ASD panel (E-CP-RRC/ASD/1) is powered from E-PP-ASD1/4 circuits 5 and 6.

The E-PP-ASD1/4 panel is fed from two redundant uninterruptible power supply (UPS) units (RRC-IN-ASD/1Aand 1B). Ifone UPS power source fails, the control system willautomatically switch to the alternate source.

guestion 2 Explain how the GTO chopping technique works to eliminate harmonic frequencies to the motor

~

which could create resonance.

What are the consequences ifthe chopping technique fails? What indication is given in the control room of a GTO failure?

~Res onse The ASD can be divided into two parts:

(1) the silicon controlled rectifier (SCR) source (rectifying AC into DC) bridge and (2) the gate turn-off (GTO) load (inverting DC back into a variable AC) bridge.

The SCR source bridge is used to regulate the torque producing current to the motor. The GTO load bridge uses a pulse width modulation (PWM) technique to regulate the fundamental frequency and power factor to the motor.

By inserting chops (or pulses) at predetermined angles in the output square wave form of the GTO inverter, the PWM technique can eliminate selected harmonics in the ASD output.

This chopping method has been programmed into the ASD control to eliminate the following harmonics:

Ran e of Fundamental Fre uenc z

Harmonic Eliminated 5-7 7-12 12 - 17 17-25 25 - 32 32 - 42 42 - Max.

Attachment 1

Page 1 of 14 23-25 17-19 11-13 7-11 5-7 5

None

It t P tttt I

4~

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL Ifa failure in the chopping software were to remove the chopping function when the pump speed was less than 42 Hz, pump vibration levels could increase.

As described in Appendix B of Reference 2, the monitoring equipment would detect excessive vibration.

A GTO failure would initiate either an ASD alarm or fault which willbe annunciated in the main control room. A GTO failure indication willbe displayed at the local ASD printer and on the Video Display Unit (VDU) in the main control room at panel H13/P602.

Ques~ti n '3 Describe surveillance/periodic testing to be performed which willassure that harmonic current from the adjustable speed drive willbe maintained within established limits at safety as well as non-safety buses.

R~es onse There are no plans to perform surveillance or periodic testing of the harmonic currents.

The baseline test performed in June, 1995 indicated 3.7 percent voltage total harmonic distortion (THD) on the "A"RRC loop and 5.2 percent on the "B" RRC loop. The testing was performed at 30 Hz. In addition, during Power Ascension Testing the harmonics will be monitored and compared to previous results.

The safety related loads are fed from normal transformer one (TR-N1) and are isolated from the harmonics effect.

The equipment connected to SH-5 and SH-6 buses is not safety related.

In addition, the windings of normal transformer two (TR-N2) mitigate the effects of the harmonics.

The gate circuits are the primary source of the harmonic voltages.

A failure in the gate circuits would cause an increase in the harmonic level.

It would also cause a channel trip and be annunciated in the control room.

Therefore, no additional surveillance or periodic testing is deemed necessary.

Que~ti in 4 Given that the harmonic currents generated are kept within a 5 percent limitby harmonic filters, will there be any resonant conditions generated which could produce currents greater than the electrical equipment is designed to?

R~es on e The design of the ASD system does not include harmonic filters immediately downstream of the power source to the ASD.

Filters were not considered necessary for this installation because the THD was acceptable.

The motor filter capacitors act as harmonic filters on the motor side of the ASD. Harmonic filters upstream of the ASD equipment willonly be installed iffuture operating conditions indicate a need for additional filtering. During normal plant operation, the SH-5 and SH-6 buses are connected to TR-N2 and the safety related loads are connected to TR-N1. Thus, there is no interconnection between the non-safety related SH-5 and SH-6 buses and Attachment 1

Page 2 of 14

EC

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL the safety related buses.

As discussed in the response to Question 5 (below), the equipment on the critical buses, SM-4, SM-7 and SM-8, willnot be affected by the harmonics since the THD voltage levels on the buses that supply this equipment are expected to be less than 0.5 percent.

The primary loads on the SH-5 and SH-6 buses are non-safety related transformers and motors, which are tolerant of harmonics even above 5 percent.

The effect of harmonics on these types of loads generally only results in a reduction in expected lifedue to additional winding heating.

Also, the secondary windings of TR-N2 willattenuate the harmonic voltages for the SH-5 and SH-6 loads.

Question 5 At WNP-2, have electrical; instrumentation, and control system equipment been designed to operate satisfactorily with a harmonic voltage of 5 percent superimposed on the input voltage by operation of the proposed adjustable speed drive?

~Re ggnne At WNP-2 the electrical, instrumentation, and control system equipment have not been specifically designed for use with harmonic voltages.

General Electric performed a harmonic analysis on the WNP-2 6.9 KV electrical system to determine the extent of the harmonics imposed on the system and their effects on electrical equipment connected to SH-5 and SH-6.

The GE report of the analysis concluded that TR-N2 and the startup transformer (TR-S) are to be derated 30% and 31%, respectively, based on their forced oil and air rating.

s 'a'proactive'measure, a design. specification has been developed for a-harmonic filter. The filter may be necessary iffuture additional loads to TR-N2 and TR-S are calculated to exceed the new ratings.

There is no derating of the motor loads connected to either TR-N2 or TR-S.

The report concluded that the equipment on the critical buses will not be affected by the harmonics since the THD voltage levels on the buses that supply this equipment are expected to be less than 0.5 percent.

~ues ion 6 Have the harmonic filters been designed and sized for the harmonic current generated from the adjustable speed drive as well as the harmonic current from the power supply system for all modes of plant operation.

~Res ense As discussed in Question 4, the modification does not include harmonic filters.

Attachment 1

Page 3 of 14

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL Quues ion 7 With the harmonic filters inoperable and the adjustable drive speed at 100 percent, what is the harmonic distortion contribution from the variable speed drive?

~Re onse As discussed in the responses to Questions 4 and 5, the ASD system at WNP-2 does not include harmonic filters. Therefore, the harmonic distortion data presented in Appendix B, page 4, of Reference 2 provides the 100 percent load contribution from the ASD system.

Question 8

It is stated in Appendix B, page 22 [sic], that the onsite operational testing of the ASDs was performed in June 1995 (during a plant outage).

During the testing, the highest voltage total harmonic distortion was 5.2 percent as measured at SM-6 [sic].

This value exceeds the 5 percent value established in IEEE-519.

What effects does this have on the remaining loads on bus SM-6 [sic]? Are there any other tests done on the ASDs since then? Ifso, please provide the test results. Ifnot, how many tests are planned in the near future?

R~es onse Note:

The discussion of the onsite operational testing appears in Appendix B, page 3 of 22, and includes THD data for the SH-5 and SH-6 buses. Itis assumed that this question refers to the SH-6 bus discussed on page 3 of the Appendix.

The SH-5 and SH-6 buses are the 6.9 KV power supply for the ASDs. The SM-1, SM-2, and SM-3 buses are the 4.16 KVpower supplies for the safety related buses.

Appendix B, page 3, (3rd paragraph, 2nd sentence), of the Reference 2 submittal incorrectly indicated that the SH-6 bus was the safety related SM-7 bus power supply and the SM-1 bus was the ASD power supply (the parenthetical statements following "SH-6" and after "SM-1" were interchanged).

The SH-6 bus is actually the ASD power supply and the SM-1 bus is actually the safety related SM-7 bus power supply.

The other references to the ASD and safety related bus power supplies are correct.

As discussed in the response to Question 4, the primary loads on the SH-5 and SH-6 buses are non-safety related transformers and motors.

The effect of harmonics on these types of loads generally only results in a reduction in expected life due to additional winding heating.

Also, the secondary windings of TR-N2 willattenuate the harmonic voltages for the SH-5 and SH-6 loads.

There has been no additional harmonics testing since June, 1995.

During the Power Ascension Test the harmonics willbe monitored.

Attachment 1

Page 4 of 14

~~

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL Quuet~ion Appendix B, page 4, provides the results ofan analysis in percentage oftotal harmonic distortion in startup as well as in generation mode.

Please explain the last three columns of tables on this page.

~Res on e The last three columns of each of the two tables in Appendix B, page 4, are the electric current (I) total harmonic distortion (THD I) analysis results for the startup and generation modes of plant operation.

In the startup mode, the SH-5 and SH-6 buses (ASD power supplies) are connected to the "X" winding of TR-S and the SM-1, SM-2, and SM-3 buses (safety related bus power supplies) are connected to the "Y" winding of TR-S.

The primary (or high side) winding of TR-S is designated as the "H" winding.

The THD I data for the TR-S windings (with respect to the various ASD channel operating modes) are contained in the last three columns of the startup mode table.

The columns labeled "THDI" in conjunction with "TRS-X," "TRS-Y," and "TRS-H" contain the THD I data analyzed to be at the "X," "Y," and "H" windings of TR-S, respectively.

In the generation mode, the main generator supplies power to the main step-up transformers (TR-M) which, in turn, supply power to the Bonneville Power Administration 500 KV grid system.

In this mode, the main generator also supplies power to TR-N1 and TR-N2, The SH-5 and SH-6 buses are connected to TR-N2 and the SM-1, SM-2, and SM-3 buses are connected to TR-Nl in the generation mode.

The columns labeled "THDI" in conjunction with "TR-N2" and "TR-M" contain the THD I data analyzed for TR-N2 and TR-M secondary (low side) windings, respectively.

The column labeled "THD I" in conjunction with "TR-Nl (Pri)"

contains the THD I data analyzed for TR-Nl primary (high side) winding.

Also, in the startup mode table in Appendix B, page 4, 20, 40 and 60 percent load rows represent the startup mode condition. The analytical data support a speed increase to 60 percent during the startup mode without reaching the 5 percent limiting value (recommended in IEEE-519) on any bus.

uestion 1

It is stated in Appendix B, page 2, that the adjustable speed operation affects RPT breaker performance.

Since the ASDs vary the frequency of the power supplied to the motor, the opening time of the breaker willvary inversely with the supplied voltage, i.e., ifthe system is operating at 15 HZ the opening time of the RPT breakers increases to 20 cycles (assuming normal opening time of the breaker to be 5 cycles).

With this delay in opening time, are these breakers stillproperly coordinated with the containment electrical penetration conductors for all possible short circuit conditions, including maximum available fault current?

Your response should also include the coordinated fault-current-versus-time curves for these penetrations.

Attachment 1

Page 5 of 14

g Kl el 1

) 'L'

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL

~Res ense This response divides the question into two parts.

What effect willoperating at 15 Hz have on the EOC-RPT breaker opening time?

Are the containment electrical penetration conductors protected from all possible short circuit conditions?

This installation has no adverse effect on the EQC-RPT breaker opening time. The EOC-RPT system is required to be operable above 30 percent rated thermal power. The current EOC-RPT system trips the 60 Hz power supply to the RRC pumps by opening the EOC-RFZ breakers, transferring the pumps to the 15 Hz power supply.

Following the installation of the ASD, an EOC-RPT signal willstill open the EOC-RPT breakers, tripping the RRC pumps.

However, the pumps willno longer transfer to another power supply.

The opening time of the EOC-RPT breaker is not a direct inverse function of the frequency.

The breaker opening time includes the mechanical spring opening time plus the arc quenching capability.

The mechanical spring opening time is constant and independent of frequency.

The arc quenching varies inversely with the frequency.

Consequently, it was conservative for the transient analysis to assume the entire opening time was inversely proportional to frequency.

The current limiting function and the short circuit protection for the penetrations are discussed below.

The relay fault current vs time curves showing the ASD application are still being developed.

Preliminary checks have shown that the points in question are to the leftof the 1000 MCM damaged time (i') curve.

With no points to the right of this curve, the operating conditions are then bounded.

The containment penetration conductor protection is stillprovided by the RRA and RRB breakers (primary feeder breakers for the ASD) and backed up by the SH-5 and SH-6 feeder breakers.

Since these breakers still operate in the 60 Hz portion of the system, opening time is not impacted due to the 15 Hz operation downstream of the ASD. Additional protection is provided however, from the volts/hz, over current, and voltage balance relays that have the sensors located downstream of the ASD but trip the RRA and RRB breakers.

The over current relays fed from the current sensors connected upstream of the ASD equipment satisfy the Technical Specification requirements for containment penetration conductor protection.

The ASD installation improves the over current protection by:

1.

providing higher impedance between power source and load; 2.

isolating the penetration from 6.9 KV motor fault current contribution; 3.

the ASD current limiting design function.

The cable penetrations for the RRC pump motor consist of one 1000 MCM copper conductor per phase.

To protect a cable penetration against a through-fault current level estimated at 1916 amps (RMS), the RRA, RRB, SH-S, and SH-6 circuit breakers must interrupt the fault in 1000 seconds or less.

The tripping time required to protect the cable penetration is well within the tripping time of these breakers.

Attachment 1

Page 6 of 14

I.

A I J s

l4 4

E 8'

~

'Y

~

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL The capability for the cable penetration to withstand the capacitor discharge current of 30,000

~

amps is around 2.6 seconds.

The capacitor discharge currents willdissipate within 2 to 3 cycles (30 - 50 ms).

The ASD is a current source type drive. That is, the ASD is designed to maintain the operating current required by the motor, even ifthe load impedance changes.

Upon a short-circuit fault, the ASD current can surge up to 2.5 times its operating current.

But the iterative scan function of the microprocessor willregulate the fault current back down by reducing its output voltage.

The operating current at each of the ASD terminals is 726 amps @ 63 Hz. The expected short-circuit current surge from the ASD is:

726 amps x 2.5

= ~1815 am 0 (RMS)

Each ASD channel has an instantaneous trip which is set at:

1.7 x 654 amps (Drive Base current) = ~1112 am s (RMS)

Upon a short-circuit fault greater than 1112 amps, the ASD willinterrupt the fault within 20

msec, In the 12 pulse mode, the ASD fault contribution to a fault on the 6.9 KV bus willbe:

1815 amps x 2 x (3800/7200) =

tOO16 am 1s (RMS) where:

2 = number of ASD channels; 3800/7200 = transformer ratio In addition to the ASD short-circuit current contribution, the motor filter capacitors located at the ASD terminals willalso discharge a current into the fault.

This capacitor peak discharge current may be as large as 30,000 amps.

Since this peak discharge current should dissipate to a safe value within 2 to 3 cycles, it willnot have a detrimental impact on the cable penetrations for the RRC pump motor circuits.

Quuetton 11 Provide a schematic diagram that shows all the protective devices used for the ASD system.

R~es onse The schematic diagram is included as Attachment 2.

Attachment 1

Page 7 of 14

J~

I

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL Question 12 The change from 18 month to 24 month surveillance interval and some of the accident analysis sections refer to the high reliability of the FANUC and MEM units. The numbers are given as "per demand."

a.

Provide a description of this term as it relates to the startup and normal operation of the ASDs.

b.

Provide the information which forms the basis for those reliability numbers.

~Res onse a.

The system failure probabilities of 1.25 E-06 and 4.26 E-06 per system demand that were calculated for the recirculation flow control system GE-FANUC control logic and the entire ASD system, respectively.

The "per demand" phrase refers to the situation where the system is in a state of readiness to perform its function (shutdown or operating at steady state) and a demand is made on the system to change state (e.g., startup, runback, operator demand for a higher or lower speed).

The "per demand" numbers given consider both the probability that the GE-FANUC or ASD MEM willnot respond to the demand and the probability of random failure. The analysis considers faults occur when there is a demand placed on the system.

The "per demand" type of analysis is typically used for standby systems that must respond on demand.

b.

The reliability numbers were taken from GE proprietary reliability analysis report NEDC-32232P, "WNP-2 Reactor Recirculation Adjustable Speed Drive (ASD) System Reliability Analysis," prepared by GE Nuclear Energy and dated August, 1993.

The non-proprietary Executive Summary from this document is included as Attachment 3 and describes the methodology.

The failure rate information in this analysis was derived from manufacturer information and industrial failure rate information. This analysis also analyzed the system on a parts count basis and calculated a single channel failure rate of 6.85 E-05 per hour, which was considered low.

The parts count approach is conservative since it assumes that all component failures lead to system unavailability.

The calculated control logic and system availability were calculated to be 99.9998 percent and 99.9994 percent, respectively.

Additional reliability numbers for ASDs are found in EPRI TR-101140, "Adjustable Speed Drives Application Guide," dated December, 1992.

This report indicates a mean time between failure (MTBF) for an ASD with dual channels of 120,000 hours0 days 0 hours 0 weeks 0 months .

GE Drive Systems indicates a 352,000 hour0 days 0 hours 0 weeks 0 months MTBF for a drive and a drive availability for a 12 pulse dual channel system of 99.97 percent based on field performance (see ).

Attachment 1

Page 8 of 14

g %e

',R

,t 4l c )

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL uestion 1

Are all of the alarms listed in Table 2 of Appendix B fsic] annunciated in the control room?

R~~on e The two hardwired alarms from each ASD channel annunciated in the control room are "ASD ALARM" and "ASD FAULT." The alarms listed in Table 2, Appendix C, page 6, of the Reference 2 submittal are displayed on the VDU mounted in the H13/P602 panel in the main control room.

~ue liinn14 Does the logic provide for continued acceleration ifthere is a failure of one of the ASD channels between 2 and 15 Hz?

R~es ense i

During normal startup, the master channel alone (6 pulse operation) willgo through the normal startup sequence until a minimum speed of 15 Hz is reached.

Once the minimum speed is

reached, the slave channel starts, synchronizes with the running channel, and the system goes into 12 pulse operation. Ifthe master channel fails during the startup, the slave channel will synchronize with the running motor and continue the startup sequence.

However, the ASD will only be capable of 6 pulse operation at 15 Hz. There is a 0.5 second delay associated with the slave channel such that the slave channel starts approximately 0.5 seconds after the initial start.

Ifa slave channel failure occurs during startup with the master channel operating, the master channel would continue the startup sequence.

Since the slave channel design precludes synchronizing with the running motor at 15 Hz to provide 12 pulse operation, the master channel would continue in only 6 pulse operation.

A failure of either the master or slave channel will be indicated to the control room operators by a fault annunciation and the GE-FANUC automatically limits the maximum speed to 52 Hz for single channel operation.

Qg~tion~l Describe the loss of one ASD in more detail.

Is the change of the remaining ASD to 52 HZ instantaneous (as fast as the sense and command can perform it) or is it ramped at the pump coast down rate?

Given that a single ASD has torque capability of 52 HZ, are there any effects on the system as a result of motoring at 60 HZ down to 52 HZ?

Is the ASD maximum frequency limiter changed at the same time?

Attachment 1

Page 9 of 14

I'

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL

~Res onse While operating in the 12 pulse mode above 52 Hz, a loss of one ASD channel results in the following system responses:

~

The speed reference of the GE-FANUC controls and the maximum speed limitof the operating ASD channel immediately drops to 52 Hz;

~

Upon transferring from the 12 to 6 pulse mode on the loss of one ASD channel, the remaining ASD channel willbegin operating in the current limit mode.

The current to the RRC pump motor willbe reduced approximately 70 percent, The motor willbegin to ramp down in speed to 52 Hz, but not as fast as its natural coast down rate of the pump/motor.

Just before reaching 52 Hz, the motor current load will be below the current limitof the ASD channel.

At 52 Hz the motor willbe operating at current and voltage consistent for that operating speed.

Thus, there would be no.adverse effects on the system as a result of motoring from 60 Hz to 52 Hz.

gue~ti n 16 Provide the FANUC and MEMoperation, maintenance and installation manuals or the following excerpts.

Particular items of interest include the self diagnostics (what parameters are monitored), the manufacturers claimed environmental parameters (temperature, humidity, etc.),

automatic actions taken upon a diagnostic result.

R~es onse The specified items of interest are addressed in Attachment 5.

The requested information is contained in the attached documents as follows:

ASD MEMUnit

~

Environmental parameters are defined in GEK-103111, sheet 2-1.

~

Diagnostics and action taken are described in GEK-103111, sheets 7-1 through 7-15.

GE-FANUC System

~

Environmental parameters for the CPU are defined in GFK-0555, sheet 5.

These environmental parameters are typical of all the GE-FANUC components.

~

Diagnostics and action taken are described in GFK-0265, sheets 2-52 through 2-57, and sheets 3-1.through 3-35.

Attachment 1

Page 10 of 14

e'

~

4~

l4

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL

~ue tion i7 Are there any alarms or indications in the control room ofproblems with the FANUC and MEM other than microprocessor interrupt?

R~tes onse Refer to the response to Question 13 for the alarms and indications associated with the ASD MEM unit. The other FANUC alarms include Bus A, B, and C Genius I/O Trouble, operating limitconditions - ASD Channel Failure, Rx Level Low, Recirc A or B High Flow Delta, Delta T Cavitation.

~ue tion i8 Describe the quality controls of the manufacturing process.

Were the devices under a QA program including software QA, V&V,and configuration management?

Is an error and change reporting mechanism in place to assure that WNP-2 is informed of changes/errors in the products?

Has WNP-2 or an industry group performed any QA audits of the vendors?

~Res onse QAA The ASD, including the software, was manufactured under a GE quality assurance (QA) program. Verification and validation (V&V)and configuration control practices were performed according to industrial standards.

However, these practices do not necessarily comply with the NRC standards for a 10 CFR 50, Appendix B QA program, as described in EPRI TR-102348, "Guideline on Licensing Digital Upgrades,"

and NRC Regulatory Guide 1.152, "Criteria for Programmable Digital Computer System Software in Safety Related Systems of Nuclear Power Plants."

The 10 CFR 50 Appendix B QA program was not deemed necessary due to the non-safety related ASD application at WNP-2.

The GE FANUC hardware was manufactured by GE Fanuc Automation North America, Inc in Charlottesville, Virginia.

The FANUC hardware was manufactured under a quality control management program which was standard for the industry in 1992, when the equipment was shipped to WNP-2.

onfi urai n man emen The software for the GE Drive System (GEDS) control is a standard firmware design which cannot be modified in the field by the user.

The software can be roughly divided into the categories of "background" and "foreground." The foreground consists of the interrupt driven, real time tasks such as firing calculations and regulator calculations, and phase locked loops.

The background consists of tasks such as the monitor, fault/alarm logging, and the control start/stop sequencing.

The control tune-up variables for a specific drive are stored in EEPROM memory using a terminal connected to an RS 232 port on the microprocessor card.

Attachment 1

Page 11 of 14

VP

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL The software is made up of modules which were developed, tested and verified through operating experience over the last 8 to 10 years for the GTO-induction motor drive control system.

These modules and the resulting object code are stored in a unique job space on the GEDS VAXcomputer (VAXis a DigitalEquipment Corporation product line). The object code has a unique "catalog" number which is used by manufacturing to access the proper data for "burning" (permanently programming) the EEPROMs necessary for loading the control microprocessor board.

Ifit is necessary to revise the software to correct errors or to provide new standard functions, a new revision is created which is downward compatible with all earlier revisions. Allprevious modules are preserved by the system.

Once the product released to the customer, the software is archived under the control of the GE VAXsystem manager.

The procedure for creating and maintaining software, controlling viruses, software security, and releasing software is described in the GEDS Requisition Engineering Procedures and Work Instructions "controlled documents" established to comply with International Organization for Standardization (ISO) 9000 Standards.

The GE FANUC software was configured at GE-NE in San Jose, California, The software, which can be modified in the field by the user, was designed under the GE-NE quality control program.

The software was independently verified and tested with actual GE FANUC hardware and simulated I/Os. The software sent to the Supply System is a controlled document, A copy of the software is stored on a VAX computer in San Jose.

Ifany changes are made to the software during installation or testing, a revised controlled document willbe issued by GE. If GE identifies changes needed following installation and testing, the Supply System will be notified.

Error and chan e re ortin For the GEDS, an error and change reporting mechanism is in place to correct errors and make changes as described above.

A Field Change Notice is issued to Product Service to order and ship new PROMs to the job site to correct identified problems.

Because the WNP-2 FANUC hardware is registered with GE Fanuc, the'Supply System willbe advised of any errors or changes to the GE FANUC hardware.

~Aa idio Neither the Supply System nor Philadelphia Electric Company Energy (for the Peach Bottom plant) have performed a QA audit of GEDS or GE-FANUC, As indicated above, the GEDS QA program was reviewed by an independent third party agency in order to meet ISO 9000 requirements.

Attachment 1

Page 12 of 14

w<$ r'-

i>>

~',t

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL

~uestion i Provide the company names and factory locations of the designers and manufacturers of the FANUC and MEM.

R~tes onse The MEM unit was manufactured and configured at GEDS in Salem, Virginia, The GE-FANUC was manufactured by GE-FANUC Automation in Charlottesville, Virginia and configured by GE-NE in San Jose, California,

~ue tion 20 Is there any indication to the operator when the limiting functions in the FANUC or MEM override the operator's demand?

~Re p~ne There are annunciator alarms in the control room which communicate to the operator the ASD is in a "limitmode."

The following limits are annunciated:

Channel Failure; Rx Level Low; Delta T Cavitation; Recirc A or B High Flow Delta; Feedwater Pump Trip.

QtesQim 2i Are the ASD over frequency relays separate from the MEM'l R~eonse Yes, the ASD over frequency relays are separate from the MEM. Two types of over speed protection are provided.

1.

A separate electromagnetic frequency relay is mounted on the 6.9 KVbus,which feeds the RRC pump motor. Ifthe frequency to the motor is greater than the relay trip setting, the relay willtrip the ASD feeder breaker (RRA(B)) and the RPT breaker (4A(B)). Refer to Figure 2B, Appendix C, page 3, of the Reference 2 submittal for the electrical bus and breaker configurations.

2.

An over speed trip is incorporated into each ASD channel MEM unit. Ifthe frequency at ASD output terminals exceeds the over speed trip setting, the ASD channel will be automatically tripped.

Attachment 1

Page 13 of 14

g

RESPONSE TO REQUEST FOR ADDITIONALINFORMATION-ASD SUBMITTAL Quuion 22 Verify that there are no changes to the safety related RTP [sic].

~Res onne There are no changes incorporated in this plant modification that impact the safety function or safety related status of the EOC-RPT.

The following is a summary of the operational changes to the EOC-RPT design.

One change to the EOC-RPT design was to use existing spare contacts to send a pre-trip signal to the ASDs to initiate shutdown of the ASDs in parallel with the opening of the EOC-RPT breakers.

Isolation between the safety related circuits and the non-safety related ASD pre-trip signal is accomplished by using existing electrical isolation relay contacts.

A second change is related to the operating envelope (i.e., from operating only on a 60 Hz basis to a 15 - 63 Hz basis).

The effects of ASD variable speed operation on EOC-RPT breaker timing is discussed in Appendix B, pages 2, 11, 12, and 18 of the Reference 2 submittal.

Currently a trip signal to the EOC-RPT breakers will reduce the pump speed to 15 Hz.

Following installation of the ASD system, the EOC-RPT trip will shutdown the RRC pumps.

This is similar to the BWR/4 design.

Attachment 1

Page 14 of 14

ATTACHMENT2 is a schematic diagram showing the protective devices used for the ASD system

IATTACHMENT3 is an excerpt from the ASD system Reliability Report

OV<t LfW

~

l +O' filed 1gl

'%l

~t Ql, 4

h Ir VF%

0 V

5t +~ >>1& t 4

ff Q f[d ~ I 4

+

V yV

'1

NEDC-32232P 1.0 EXECUTIVE

SUMMARY

This analysis provides the basis for the reliability evaluation of the Reactor Recirculation Adjustable Speed Drive (ASD) System and its GE-FANUC controls for the Washington Public Power Supply System (Supply System) WNP-2 plant.

Reliability analysis includes an estimate ofprobability that an event (e.g., failure ofASD) will occur and an assessment ofthe consequential effects on plant availability should itoccur. It is important that the probability ofoccurrence ofASD System failure be low.

This analysis was perfomied in two phases.

The first phase encompassed a Failure Modes and Effects Analysis"(FMEA) for the critical"ASD System components.

11iis ASD System FMEA provided a qualitative evaluation and assessment ofthe critical ASD System components and the significance of their corresponding failure modes.

The Parts-Count Method was used to.calculate the single channel failure rate of 6.85E-05 per hour, which is considered low. ~This conservative approach uses random component failure rates and assumes that any single component failure willlead to a complete ASD channel failure.

The second phase was conducted using the CAFTA (Computer Aided Fault Tree Analysis) computer program that quantitatively evaluates failure probabilities, their significance and the overall system unavailability (Reference 11).

Two fault trees were developed and analyzed for the GE-FANUC control logic and the entire ASD System design, respectively.

Failure probabilities of 125E-06 and 4.26E-06 per system demand were calculated for the GE-FANUC control logic and the entire ASD System, respectively.

These failure probabilities are considered low for a non-safety system, and translate into a high ASD System availability of99.9998 and 99.9994 percent, respectively, based on a system Mean Time To Repair (hfITR)of24 hours and five hundred ASD System demands per year.

The study concludes that both the Reactor Recirculation ASD System and the GE-FANUC control logic design provide high system availability and more than adequately meet the reliability standards based on established industry guidelines and practices for comparable non-safety systems.

No credible failure modes were found that could affect WNP-2 plant safety assumptions for the LOCA, ATWS, Transient and Stability design basis analyses.

Furthermore, the ASD reliabilitysystem design analyses

'upport'the 10CFR50.59 and 10CFR50.92 safety evaluations included in the WNP-2 Recirculation Pump Adjustable Speed Drive Licensing Report (Reference 1).

1-1

ATTACHMENT4 is an excerpt from the vendor field performance reliability study

l7

~

fW

GE Drive Systems Reliability Report for Adjustable Speed AC Drives The best practice to determine the reliability of the power conversion and control for adjustable speed ac drives has been to accumulate field performance on operating systems.

lt is a more accurate and meaningful method to establish failure rate and MTBF. This has been done and the results are tabulated for each installation site for control and power devices.

Each control unit is an operating power converter and control, ie a six pulse system or one channel of a dual channel 12 pulse system.

Power device units are. individual SCR or GTO devices, and are not included in the control unit data.

The other major components in the drive system are not included in the report.

These include transformer, motor, link'inductor and switchgear.

There were no failures of these components in the field data submitted.

Also there were no control unit failures from the redundant cooling systems.

There is a fairly wide range of failure rates in the data submitted.

This might be rationalized by a number of factors:

1-2-

3-4-

5-Factory quality variance User maintenance practices Reporting accuracy 0perating environment Data interpretation The notable factors from the above are:

1 Site B was shipped in 11/88 with a new design for the electronic control module with one half the printed circuit boards as in the other sites.

Site F had thyristors from a different vendor than the other sites.

2&3 Site C submitted the mostcomprehensive maintenance report.

4 Site C is installed in a control room that is not air conditioned as are the other sites.

Site C had air filters to minimize dirt laden air into the force ventilated power controller.

5 Power device failures from poor gate drive were not counted.

The failure rate and MTBF for the total experience at six sites represents a reasonably accurate measure of equipment performance to be expected - on the average.

The six sites represent 15 percent of the total GE LCI and IMD drive population in service.

GE Drive Systems Allof the sites except B had redundant systems, either 12 pulse dual'channel or six pulse with hot standby.

All sites had N +

1 thyristors and redundant cooling systems.

A unit failure did not represent a drive failure on the redundant systems.

The data submitted identifies four instances where the fan drive tripped.

On a drive basis the failure rate was; Unit HRS

= 1408 x 10'ailures

= 4 Failure rate

= 2.8 x 10'ours MTBF

= 352,000 hour0 days 0 hours 0 weeks 0 months s/40 years The data submitted for Sites C and F showed the highest failure rate but had no drive trips.

In summary the failure data from operating systems in a real world environment represents an accurate and meaningful measurement of equipment performance to be expected.

In the GE case, the control failure rate should decrease with the decrease in printed circuit board count and the continually increasing quality which comes with standardization.

The field performance data submitted from sites C and E included repair time.

The results of this accumulated data show a MTTR (mean time to repair) of 10 hours1.157407e-4 days 0.00278 hours 1.653439e-5 weeks 3.805e-6 months (4 hours when parts are available).

Some of the repair times exceeded 24 hours2.777778e-4 days 0.00667 hours 3.968254e-5 weeks 9.132e-6 months which suggests that parts were not available at the site.

MTTR predictions based on parts available would be significantly lower.

Again, the MTTR prediction of 10 hours1.157407e-4 days 0.00278 hours 1.653439e-5 weeks 3.805e-6 months represents actual experience in a real world environment which presents a meaningful measurement to use in equipment availability predictions.

Based on MTBF and MTTR the single channel availability is:

A =

1 x 100 = 99.97%

1 + MTTR MTBF And the drive availability for a 12 pulse dual channel or 6 pulse hot standby will be 99.997% as demonstrated in the field.

~Defini i ns Failure rate (lambda) = failures per million hours MTBF = 1/lambda

I

GE Drive Systems Adjustable Speed AC Drive Failure Rate Data CONTROL ITE A

B C

D E

"F 4

2 10 8

22 8

(10')

192.7 57.8 624.0 455.5 799.8 461.0 UNITS UNIT HRS.

FAIL RE 7

0 29 9

14 21 36.3 0

46.5 19.8 17.5 45.6 27.5/3.1 21.5/2.5 50.5/5.8 57.0/6.5 21.9/2.5 RATE MTBF (10~HRS)

(10sHRS/YRS)

Total 54 2590.8 80 30.9 32.4/3.7 ITE UNITS NIT HRS.

~AIIIARES RAT MTBF (10e)

(10 HRS)

(10'HRS/YRS)

A B

C D

E F

144 120 504 432 1398 432 6.94 1.74 32.38 24.6 49.72 16.60 0.144 0

0.185 0.041 0.020 0.301 6.9/788 5.4/616 24.4/2785 50.0/5708 3.3/379 Total 3000 131.98 14 0.106 9.4/1076

ATTACHMENT5 includes excerpts from the vendor installation, maintenance, and operation manuals

E 4

g, r~r'j

~.

F,

~ ~ m I ~

i

Washington Public Power Supply System GEK-103111 TAB 2 SYSTEM PAEUMETf<2SS Speed Range 0 - 1980 rpm. (66Hz.)

Acceleration/Deceleration As required up to 10%/Sec within maximum drive capacity.

Altitude and Temperature Allindoor equipment is suitable for operation in an ambient temperature not to exceed 40', 0 to.95 percent relative humiditywithfrequent interchange of atr.

Air Quality Ventilating air quality shall be maintained such that:

Altitude:

Temperature Range:

Humidity Range:

3300 feet above mean sea level O'C to 40'C

'(indoor) 50'(Outdoor) 5%

to 95%

relative humidity Hydrogen Chlorides do not exceed 4 PPB.

Hydrogen Sulfides do not exceed 4 PPB.

Chorines do not exceed 2 PPB.

Sulphur Dioxides do not exceed 4 PPB.

Chlorine Dioxides do not exceed 4 PPB.

Induction Motor (Existing)

Temperature and humidity conditions, including their relative rate ofchange, should be controlled such that there is no moisture condensation in or on the control equipment.

6900 volts, 3-phase, 60 hertz Maximum steady-state voltage variation: p Mva short circuit at drive source terminals: 485 Maximum frequency variation: + 2%

Rated Power Stator Voltage

, Synchronous Speed Service Factor Weight (lb)

Wk (lb-ft" Locked Rotor Load

8900 Horsepower

,6600 volts, 3-phase, 60 Hz.

.1800 RPM

1.15

60,000

21,500

1200 (pump)

Pump Curve Torque Requirements:

Pump curve.

Load torque proportional to speed squared with maximum torque at 1980rpm at 11,200 hp.

2-1

0 17'n 4

a

+fv 'to+

E Lt~

~l ~'

~

GT0-IMD GEH4014 CHAPTER 7 DIAGNOSTICS AND TROUBLESHOOTING 7-1. INTRODUCTlON Included in the drive power and electronic circuitry is a multi-layered diagnostic and troubleshooting capability.

The main elements of this capability are the following:

1. Self testing of critical microcomputer system elements every time the control is reset or power applied..

2. A memory type, fault monitor which displays the cause of shutdown in a printed message at the printer.

3. Lights and test points on front of cards provide the following information:

a; Attenuated system bus voltages and currents on test points allow a check of magnitude and phasing.

b. Gate'pulse signals to converter bridge available at test points.

c. Neon cell voltage indicating lights across each thyristor in power converters for indications of shorted cells.

d. Overcurrent, overvoltage, and overspeed indicating lights in electronics module.

e. Card front lights indicate status of all switching input and outputs to/from electronics. module..

4. Gate-test-mode allows checkout of analog signal conditioning circuitry, microprocessor firing control, and cell, gate signal integrity while off-line.

5. Serial monitor software which allows examination of system memory, inputs, and outputs (Chapter 5).

6. Capability to store diagnostic lists of system variables preceding and following fault.conditions. (Chapter 4).;

2. CONTROL SELF TEST 7-3. BASlC STRUCTURE The self test routines are PLM86 procedures which may be executed by the HMPG'resident in the Structured Control Electronics Module (SEM/MEM) to test individual PWB's and functions.

These routines are executed upon power-up if

, the TEST switch on the NLCB is in the up position.- These routines may also be.run when the drive is in a non-RUN condition by operator commands received via a terminal connected to the HMPG's RS-232 port or by depressing a test switch.

The function of the self test is to test most of the control panel for the Structured GTO-IMD, with great emphasis placed on the testing of'the PWB's in the SEM/MEM.

Testing of the panel begins by performing tests of'the hardware elements within a neighborhood of the HMPG'S microprooessor and continues to tests of increasingly remote hardware.

Allof the tests incorporated within the self test may be classed into 3 groups:

1.

PWB-Specific tests 2.

Paired PWB tests 3.

Panel-level tests 7-4. PWB-SPECIFIC TESTS A great amount of effort has been placed on performing tests that willpinpoint problems on specific PWB's first. In this manner, ifany easily diagnosed problemexists; it willbe clearly spelled out to the operator, instead of vaguely g

fined by a list of possible solutions.

Testing such as these comprise the PWB-Specific test group.

.7-1

~ Wt all

7-5. PAIRED PWB TESTS Tests which depend on the operation of several PWB's are chssed within the Paired-P%B group.

Diagnostic messages for,failures of these tests willindicate a functional problem and also a list of possible solutions which may be general in nature.

CAUTION Self test exercises the output relays; therefore, the output terminal boards should be disconnected from the I/O module, and/or source and load breakers should be rackedwut and drive stopped.

7-6. PANEL-LEVELTESTS Panel-level tests also require, correct operation of several PWB's or modules, however, these tests are segregated to allow the user to perform either a module-level test (involving only the control SEM/MEM)or a complete panel-level test which would include this last category of procedures.

From a practical point of view, the sequence of testing, within the-control SEM progresses in the following manner l.

HMPG HLCB 3.

HAIA 4.

NSFC (source-master) 5.

NSFC (load) 6.

NSFC (source-slave) 7.

NLCB 8.

NLlB (source) 9..

NLIB (load) 10.

HISA 11.

HRDA 12.

NAIF Further tests which include PWB's outside the SEM/MEM, progress in the following sequence:

1.

~

Cables leading from the SEM/MEM.

The I/O Module.

7-2

~ l1 c 9 l 'i gj II

~ ~

t'0

'L f

GT0-IMD GEH-6014 7-7. EXECUTING THE TESTS

.e self-test routing may be initiated by resetting (toggle Tpl (RESET) to TP2 (DCOM) the HMPG with the TEST switch (on the NLCB) in the UP position.

The entire test is completed in approx. 20 seconds.

At its completion, status information willbe printed out at the door-mounted printer.

In the present product, the entire self-test routing is executed; however," provisions for executing small sections of the code are in place.

Upon completion of the self-test, the drive willoperate in the gate-test-mode.

To rerum to normal operation, the NLCB's test switch must be returned to the normal position and the HMPG must be reset (Toggle TP1 (RESET) to TP2 (DCOM)).

CAUTION Self test exercises the output relays; therefore, the output terminal boards should be disconnected form the I/O module, and/or source and load breakers should be racked-out drive stopped.

II NOTE If the VBol setting at NCCD is greater than 10.5 Vdc then set down to 10.5Vdc before executing self test. Return to original setting when self test is done.

3.

DIAGNOSING FAILURES As mentioned above, failure of any of the self test procedures willproduce a diagnostic message on the door-mounted printer.

The format of the diagnostic message is:

DATE TIME FAILED (aabb) DURING TEST OF:

aa= TEST NUMBER description of test bb=SUBTEST NUMBER PROBLEM: problem statement POSSIBLE SOLUTION:

solution 1.

solution 2 solution 3 Usually, a failure can easily be diagnosed by the problem statement.

At least on solution willbe suggested in the print out. It is suggested that trouble-shooting be performed at the PWB level ( Replace the PWB not its component).

Although the diagnostic messages may indicate more specific failures, it is not recommended the PWB components be replaced or repaired (always write or attach the diagnostic to the card).

The TEST NUMBER and SUB-TEST NUMBER uniquely define a failure within the self test procedure.

The TEST

~ '

- <UMBER is'incremented from 1 to 31 (hex) as the tests progress.,For different test numbers.

the SUB-TEST ameter willvary from 1 up to the number'of sub-test within that major test.

The Description of Tests section that Iows details the complete self test procedure according to the TEST NUMBER and SUB-TEST NUMBER parameters 7-3

~

p

~4

$'I f

ll

GEH4014 s

7-8.1. Description of Tests.

The following lists all tests available with sub-test information:

TEST DESCRIPTION TEST DESCRIPTION

.1 2

HMPGROMTST: Reads all of ROM me-mory (F000:0 to FFFF).Possible failures are:

-BusHog error

-Read error

.1

.2

.3 HMPGRAMTST: Reads all of RAM mem-ory (0:0 to 0:3FFF). Possible failures are:

-BusHog error

-Read error

-Write error HMPGINTRTST

.1

-Verifies control and data lines to HMPG's 8259 Verifies STALL asserted after 1.5 seconds.

7

.1

.2

.2 DMPB

-Checks that Write Enable Switch is not asserted.

-Checks for no BusHog during EEPROM reads

-Checks for expected pattern in EEPROM.,

6 HMPG INTR

.1

- Verify operation of BusHog interrupt.

.2

- Verify that BusHog doesn't occur for legitimate read.

.3

-Verify operation ofTime Tic interrupt.

.1

.2

.3

.4

.5

.6

.7

.9

.A

.B

.D

.E

.F

.10

.11 5.

.1

.2 HMPG TMR

-Verifies addr lines & data bits 6 & 7

-Verifies addr lines &, data bits 6 & 7

-Verifies data bits 5-0 with walking 1 pat-tern

-Verifies that alLoutputs are free to toggle.

-FOR TMRO: Checks for null count=

1

-FOR TMRO: Loads TMR; checks for null count = 0

-FOR TMRO: Verify TMR time out

-FOR TMR1: Verify TMR reloads

-FOR TMR1: Checks for null count = l

-FOR TMRI: Loads TMR; checks for null count = 0

-FOR TMRI: VerifyTMR time out

-FOR TMR1: Verify TMR reloads

-FOR TMR2: Checks for null count = I

-FOR TMR2: Loads TMR; checks for null count = 0

-FOR TMR2: Verify TMR time out

-FOR TivIR2: Verify TivlR reloads HMPG S10 PRES

-Check that USART trans and rec buffers are empty

-Verifies software reset of STALLcircuit Initiate stall timer; checks for no STALL after 100 8

.1

.2 9

.1 A

.1

.2

.3

'.4

.5

.6

.7

.8

.9

.A

.B

.C

.D

.E

.F

.10

.11 HLCB PRES

-Enables IMOK; checks for OIMOK = 0

-Disables IMOK;.checks for OIMOK = 0 HLCB DAK Checks for no BusHog during reads of HLCB.

HLCB TMR U22

-Verifies addr lines & data bits 6 & 7

-Verifies addr lines & data bits 6 &. 7

-Verifies data bits 54 with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

-FOR TMRO: Checks for null count =

1

-FOR TMRO: Loads T54R; checks for null count = 0

-FOR TMRO: Verify TiifR time out

-FOR TMRO: Verify TMR reloads

-FOR TMR1: Checks for null count = 0

-FOR TMRl: Loads TMR: checks for null count = 0

-FOR TMRl: Verify TMR time out

-FOR TMR1: Verify TMR reloads

-FOR TMR2: Checks for null count =

1

-FOR TMR2: Loads TMR; checks for null count = 0

-FOR TMR2: Verify TMR time out

-FOR TMR2: Verify TMR reloads

k \\

+gal 1 1

GT0-IMD GEH<014 TEST DESCRIFI'ION TEST DESCRIFI'ION B

.1

.2

.3

.4

.5

.6

.7

.8

.9-

.A

.B

.C

.D

.E

.F

.10

.11

.14

.15

.16 C

.1 D

.1

'LCB TMRU23

-Verifies addr lines & data bits 6 & 7

-Verifies data bits 5% with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

-FOR TMRO: Checks for null count =

1

-FOR TMRO: Loads TMR; checks for null count = 0

-FOR TMRO: Verify TMR time out

-FOR TMRO: Verify TMR reloads

-FOR TMR1: Checks for null count =

1

-FOR TMRl: Loads TMR: checks for null count = 0

-FOR TMR1: VerifyTMR time out

-FOR TMRl: Verify TMR reloads

-FOR TMR2: Checks for null count =

1

-FOR TMR2: Loads TMR; checks for null count = 0

-FOR TMR2: Verify TMR time out

-FOR TMR2: Verify TMR reloads

-FOR TRM2: Initialize to Mode 0; verify status

-FOR TMR2: Load with 10 ms, verify status.

-FOR TMRS: After 4 ms, verify status.

-FOR TMR2: After 15 ms, verify time out.

-FOR TMR2: Check that count = 0.

HLCB INTR PRES

-Verify addr and data lines to HLCB's 8259.

HLCB SIO

-Initialize and check status of HLCB's 8251.

-Verify that single byte of data is send, by sensing status.

-Verify transfer of data pattern.

HAIADAK

-Checks for no BusHog during reads of HAIA.

-Checks for no BusHog during writes to HAIA.

F

.1 10

.1

.2

.3

.4

.5

.6

~7

.8

.9

.A

.B

.C

.D

.F

.10

.11 12

.1

.2 13

.1 14

.1

.2

.3

.4 HAIAPRES

-Checks that HAIAis present by reading single bit.

HAIATMR

-Verifies addr lines & data bits 6 & 7

-Verifies addr lines & data bits 6 8'

-Verifies addr lines & data 'bits 6 & 7

-Verifies data bits 5-0 with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

-FOR TMRO: Checks for null count =

1

-FOR TMRO: Loads TMR; checks for null count = 0

-FOR TMRO: Verify TMR time out

-FOR TMRO: Verify TMR reloads

-FOR TMR1: Checks for null count =

1

-FOR TMR1: Loads TMR; checks for null count = 0

-FOR TMR1: Verify TMR time out

-FOR TMRl: Verify TMR reloads

-FOR TMR2: Checks for null count =

1

-FOR TMR2: Loads TMR; checks for null count = 0

-FOR TMR2: Verify TMR time out

-FOR TMR2: Verify TMR reloads HAIACONVERSION

-Start A/D conversion; check that BUSY

= 1.

-Check that 1DAVAL= 0

-Wait for conversion to complete; check that BUSY = 0.

-Check that 1DAVAL= l.

HAIAPSUPPLY

-Check that N15 supply is read correctly.

-Check that P15 supply is read correctly.

NSFC S PRES Set IMOK true; read back IMOKsignal.

Set IMOK false; read back IMOKsignal.

NSFC S TMR PRES

-Verifies addr lines &. data bits 6 & 7

-Verifies addr lines & data bits 6 & 7

-Verifies data bits 5-0 with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

7-5

H 4j IPf

GEHM14 DESCRIPI'ION DESCRIPI'ION 15

.1

.2

.3

.4

.5

.6

.7

.8

.9

.A

.B

.D

.1

.2 17

.1

.2

~3

.4

.5 18,

.1

.3

.4

.5

.6 NSFC S TMODE

-FOR TMRO: Checks for null count =

1

-FOR TMRO: Loads TMR; checks for null count = 0

-FOR TMRO: VerifyTMR time out

-FOR TMRO: Verify TMR reloads

-FOR TMRl: Checks for null count =

1

-FOR TMR1: Loads TMR; checks for null count = 0

-FOR TMR1: Verify TMR time out

-FOR TMR1: Verify TMR reloads

-perform operations to set pulse train to 0; verify

-In TEST Mode, write all on pattern, ex-pect echo of same.

-In TEST Mode, walk 1 thru primary &.

firing latch.

-In TEST Mode, see ifpulse train is stuck low.

-In TEST Mode, see ifpulse train is stuck high.

-In TEST Mode, check that pulse train is tog ling.

NSFC L PRES

-Set IMOK true; read back IMOKsignal.

-Set IMOK false; read back IMOKsignal.

NSFC L TMR PRES

-Verifies addr lines & data bits 6 & 7

-Verifies addr lines &idata bits 6 & 7

-Verifies addr lines & data bits 6 & 7

-Verifies data bits 54 with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

.NSFC L TMODE

-FOR TMRO: Checks for null count = I

-FOR TMRO: Loads TMR; checks tor null count = 0

-FOR TMRO: Verify TMR time out

-FOR TMRO: Verify TMR reloads

-FOR TMR1: Checks for null count =

1

-FOR TMR1: Loads TMR; checks for null

.B

.C

.D

.E 19

.1

.2 lA

.1

.2

.3

.4 1B

.1

.2

.3

.5

.6

.7

.9

.B

.C

.D

-In TEST Mode, walk I thru primary &

firing latch.

-In TEST Mode, see ifpulse train is stuck low.

-In TEST Mode, see ifpulse train is stuck high.

-In TEST Mode, check that pulse train is toggling.

NSFC SRC SLAVE PRES

-Set IMOK true; read back IMOKsignai.

-Set IMOK false; read back IMOKsignai.

NSFC SRC SLAVE TMR PRES

-Verifies addr lines & data bits 6 & 7

-Verifies addr lines &, data bits 6 & 7

-Verifies addr lines &data bits 6 & 7

-Verifies data bits 54 with walking 1 pat-tern

-Verifies that all outputs are free to toggle.

NSFC SRC SLAVE TMODE

-FOR TMRO: Checks for null count =

1

, -FOR TMRO: Loads TMR; checks for null count = 0

-FOR TMRO: Verify TMR time out

-FOR TMRO: Verify TMR reloads

-FOR TMR1:.Checks for null count =

1

-FOR TMR1: Loads TMR; checks for null count = 0

-FOR TMR1: Verify TMR time out

-FOR TMR1: Verify TMR reloads

-Perform operations to set pulse train to 0; verify

-In TEST Mode, write all on pattern, ex-pect echo of same.

-In TEST Mode. walk T'thru primary &

firin latch.

-In TEST Mode, see ifpulse train is stuck low.

-In TEST Mode, see ifpulse train is stuck high.

-fn TEST ivlode, check that pulse train is tounling.

.7

.8 count = 0

-FOR TMR1: Verify TMR time out

-FOR TMR1: Verify TMR reloads

-perform operations to set pulse train to 0:

verify

-In TEST Mode, write all on pattern, ex-pect echo of same.

lc

.1

.2 NSFC S PLL

-FOR TMR2: Enables PLL; checks for null count = l.

-FOR TMR2: Loads TMR; checks for null

=0

~ a

) 'E,

~p ty V'E "Ji:

GT0-IMD GEH<014

.3

.4 1D

.1

.3

.4 1E.1-

.3

,4 DESCRIFI'ION

-FOR TMR2: Verify TMR time out.

-FOR TMR1: Verify TMR reloads.

NSFC L PLL

-FOR TMRZ: Enables PLL; checks for null count = 1.

-FOR TMRZ: Loads TMR; checks for null

=0

-FOR TMR2: Verify TMR time out.

-FOR'TMR1: Verify TMR reloads.

NSFC SRC SLAVE PLL

-FOR TMRZ: Enables PLL; checks for null count = 1.

-FOR TMR2: Loads TMR; checks for null

=0

-FOR TMR2: Verify TMR time out.

-FOR TMR1: Verify TMR reloads.

TEST 21

.1

.3

.4

'.6 7

.8

.9

.A

.B

.C DESCRIPI'ION

-Check waves.

,. -Check

-Check

-Check waves.

-Check

-Check for source VA, VB, VC square Check for any source flux waves.

for SRC VA flux wave.

for SRC VB flux wave.

for SRC VC flux wave.

SRC phase sequence.

for load VA, FB, VC square Check for any source flux waves.

for load VA flux wave.

for load VB flux wave.

for load VC fiux wave.

load phase sequence.

HLCB SQ WAVES

-Check for absence of square waves with oscillator off.

-Check for any square waves with oscilla-tor on.

1F

.1 20

.2

.3

.4 ROLL CALL

-Test for ribbon cable connecting HAIA-.

(JA) to SEM(JG)

-Enable NLCB IMOK; check for IMOK true.

-Disable NLCB IMOK; check for IMOK false.

-Enable NLIBS IMOK;check for IMOK true.

-Disable NLIBS IMOK; check for IMOK false.

-Enable NLIBLIMOK;check for IMOK true.

-Disable NLIBLIMOK;check for IMOK false.

NLCB DIFF AMPS

-Test for 0 volts at REFO

'-Test for 0 volts at TREFO.

-Test for 0 volts at 12PREFO.

-Inject current in REFO circuit; test for change in output.

-Inject current in TREFO circuit; test for change in output.

-Inject current in 12PREFO circuit; test for change in output.

-Test for 0 volts at SPD (speed).

-Reset existing faults; test for IOSP (over-speed) = 0

.3

.4

.6

.7

.8 23

.1

.3

.4 NLIB S ANALOG

-Reset existing faults; verify UV & not OV condition.

-Verify not SUPPression condition.

-Verify 1UV70 =,0.

-Test C17 for time delay. (Overvoltage circuit).

-Test for 0 volts at IFBS.

-Test for 0 volts at FLUX BAS.

-Inject current in source current condition circuit. Detect change in IFBS.

-Detect change in Fl UX BAS.

-For FLUX BAS: Check level of positive offset.

-For FLUX BAS: Check level of positive peak

-For FLUX BAS: Check level of negative peak.

NLIB L ANALOG

-Reset existing faults; verify UV & not OV condition.

-Verify not SUPPression condition.

-Verify lUV70 = 0.

-Test C17 for time delay. (Overvoltage Ctfcult).

~

-Test C17 for time delay. (Overvoltage circuit).

-Test for 0 volts at IFBL.

7-7

4' Vl 1I

GEEK14 DESCRIPI'ION TEST DESCRIPTION

.7

.8

.9

.A

.D

.E

.F-

.10

.11

.12

.13

.14

.15

.16

-Test for 0 volts at FLUX BAL.

-Inject current in source current condition circuit. Detect change in IFBL.

-Detect change in FLUXBAL.

-For FLUXBAL: Check for 0 volts dc offset.

-For FLUXBAL: Check level of positive peak

-For FLUX BAL: Check level of negative peak.

A

,-For FLUX CBL: Check for 0 volts offset.

-For FLUX CBL: Check level of positive peak.

-For FLUX CBL: Check level of negative

. peak.

-For FLUX ACL: Check for 0 Volts dc offset.

-For FLUX ACL: Check level of positive peak.

-For FLUX ACL: Check level of negative peak.

-Turn offTST2 signal, verify 10LTCH is 1 (latched).

-Verify 1KILLLD= l.

-Reset faults,.verify 10VLTCH.is 0.

-Verify lKILLLD= 0.

.13

.14

.15

.16 25

.I 26

.1

-Turn offTST2 signal, verify 10VLTCH is 1 (latched).

-Verify 1KILLLD= 1.

-Reset faults, verify IOVLTCHis 0.

-Verify 1KILLLD= 0.

HMPG INTR

-Enable test oscillator; verify occurrence of source zero crossing interrupt (slave intr 0).

-Verify frequency of source zero crossing intr.

-Enable test oscillator; verify occurrence of load zero crossing interrupt (slave intr 1).

-Verify frequency of load zero crossing intr.

-Verify occurrence of source firing inter-rupt.

-Verify occurrence of load firing interrupt.

NLCB SPEED

-Enable test oscillator; verify speed cir-cuits reads 55 Hz.

-Verify no,overspeed condition.

24

.1

.2

.3

.4

.6

.7

.8 NCCD ANALOG

-Verify 1GNDF2 = 0.

-Verify OIFLT = 1.

-Verify 10VLTCB = 0.

-Verify 1KILLD = 0.

-Verify 1CAPFLT = 0.

-Verify OCIBERR = l.

-Verify IFB(-) is approximately 0.0 VDC.

-Take OTST1 low, verify OIFLT is still OIFLT IS 0

-Verify 1GNDF2 is 0.

.B 'VerifyOCIBERR is 0.

.C

-Turn offsource current, verify OIFLT is 27

.1 28

.1 HISA PRES

-Disable IMOK; verify by reading back bit.

-Enable'IMOK; verify by reading back bit.

CABLE CONT

-Tests for continuity in ribbon cable from SEMJA to I/O Module.

-Tests for continuity in ribbon cable from SEM, JK to I/O Module.

-Tests for continuity in ribbon cable from SEM, JH to I/O Modus.

-Tests for continuity in ribbon cable from SEM, JB to Door Module.

.D

.E

.F

.10 12

-Verify lGiNDF2 is 0.

-Verify OCIBERR is 1.

-Turn on load current signaL verify OIFLT is O.

-Turn off load current, verify OIFLT is l.

Also set OTSTl high.

-Turn offTST2 signal, verify 10VLTCH is l.

-Verify 1KILLLD= l.

29

.1 A

.1 HISA lo

-Set all inputs from I/O Module high; verify by reading back inputs to HISA.

-Set all inputs from I/O Module low; veri-fy by reading back inputs to HISA.

NCCD XDCD FDBK OK

-Check O'DDCDS in XDCD against EEPR-OM variable XDCD configuration E.

7-8

GT0-IMD GEH<014 2B

.1 2C

.1 2D

.1 DESCRIPTION

-Check CPS is OK - have output voltage

-Check that GTO gate drivers are in off" position.

HMPG INTERRUPT 7

-Check master interrupt 7 Load NSFC Pulse train

-Check load side NSFC pulse train.

P105 SUPPLY

-Check that 105 volt dc power supply is OK.

HROA 1A IO

-In sequence, pick-up single relays on the HROA in slot 1A of the I/O module.

Expect feedback signal to indicate change.

TEST DESCRIPTION

.5

.6

.7

.8

.9

.A

.B

.C

.D

.E 30 NLCB R DVR

-Drop-out all relays; verify

-Pick-up single 28 V relay; back.

-Dropout all relays; verify

-Pick-up single 28 V relay; back.

-Drop-out all relays; verify

-Pick-up single 28 V relay; back.

-Dropout all relays; verify

-Pick-up single 28 V relay; back.

-Drop-out all relays; verify

-Pick-up single 28 V relay; back.

-Drop-out all relays; verify by feedback.

verify by feed-by feedback.

.2

.5

.6

.7

.8

.9

.A

'.-Force all HROA(1A) relays to drop-out; verify by feedback.

-Force 105 Vdc relays to pick-up; verify by feedback.

-Drop out 105 Vdc relays, wait 40 ms, verify by feedback.

-Pick-up single 28 V relay; verify by feed-back.

-Dropout all relays; verify by feedback.

-Pick-up single 28 V relay; verify by feed-back.

-Dropout all relays; verify by feedback.

-Pick-up single 28 V relay; verify by feed-back.

-Dropout all relays; verify by feedback.

-Pick-up single 28 V relay; verify by feed-back.

-Dropout all relays; verify by feedback.

.1

.2

.3

.4

-Verify presence of HROA in slot 1B of I/O module.

-Verify presence of HROA in slot 1A of I/O Module.

-Force relay drivers on NLCB on; verify response from I/O Module via feedback

-Force relay drivers on NLCB on; verify response from I/O Module via feedback 31

.1 DOOR MOD PRES

-Test for CTS asserted.

-Test for DSR asserted.

32

.1 33 NAIF A TO BUSY OK NAIF DAK

-Checks for no BUSHOG during reads of NAIF.

2F.

HROA 1B IO: In sequence, pick-up single relays on the HROA in slot 1B of the I/O module.

Expect feedback signal to indicate change.

k

-Force all HROA(1A) relays to drop-out; verify by feedback.

-Force 105 Vdc relays to pick-up; verify by feedback.

-Drop out 105 Vdc relays, wait 40 ms, verify by feedback.

-Pick-up single 28 V relay; verify by feed-back.

.1

.2

.3 34

.1

-Verify not busy

-Convert and venfy busy

-Wait 1 second, verify not busy NAIF A TO D OK

-Input 5.082 +30mVdc, reading should be between 4.952 and 5.212

-Input 2.503 +30mVdc, reading should be between 2.373 and 2.633

-Input 0.0 +030mVdc, reading should be between -0.130 and 0.130

-Input -2.498 :30mVdc,reading should be between -2.628 and -2.368 7-9

J Ig

~'r<

+gis4 t rL

~

GEEK14 I

TEST DESCRIPI'ION 5

-Input A.999

-'. 30mVdc, reading should be between -5.129 and -4.869 35 NAIF D TO OK

.1 Check D/A I, Input voltages as outline on 1E.1 to.5 and check for d/a conversion by A/D that already checked.

.2 Check D/A 2

.3 Check D/A 3

.4 Check D/A 4

.5 Check D/A 5

'6 Check D/A 6

.7 Check D/A 7

.8 -

Check D/A 8 After the microcomputers have successfully powered up and/or self-test operations have finished successfully, the printer can then display'aults/alarms as described below.

7.9 FAULT/ALARMMOMTOR Built into the electronics software module are fault/alarm monitors.

7-10 FAULT DETECTION

'n the event of a fault condition, the IMDwillshut down and a fault indication willappear on the SEM/MEM.

The cause of the shutdown willbe displayed on the printer terminal located on the, control panel door. Ifmore than one fault has occurred, the fault finder willstore and print the subsequent faults (up to 10 total).

To reset the control after a fault condition, it is necessary to press the reset switch on the HLCB card in the SEM/MEM or the reset pushbutton on the control panel door.

But first record the fault/alarm/relay status, and I/O states. Ifthe fault condition is clear, the fault light willgo out after a door reset, hnd stay out when the reset is completed.

Consult the system elementary ladder diagram for a complete list of faults.

Most of the faults are standard and are defined in the following paragraphs.

along with suggested corrective action.

MASTER SLAVE UNBALANCE-Indicates that there is an unbalance between the torque or excitation current commands for the two channels of a dual channel drive. See TORQUE, EXCITATIONCOMMANDUNBALANCE alarms for details. This fault is an optional feature selected by setting bit 10 of tuneup SQOPT2 to a 1

COOLANT PRESSURE LOW OR PUMP LOSS - Indicates low differential coolant pressure across power converter bridges or loss of both pump starters for an excessive time period. In the absence of other indications check for presence of pump power, that pumps are rotating, and check operation of differential pressure switch.

SOURCE LOW LINE - Indicates that the source voltage has dropped below 70% of nominal for an excessive period of time. This function willalso detect single phasing of the source. Time limit is set by protective tuneup parameter PTSUVT. Investigate reason for loss of voltage.

g

'liNKOVERVOLTAGE - Indicates an overvoltage across. the load dc bus. Overvoltage is set by pot VBOL on the 7-10

44 i h

<<a)>$$ k,,

@e gg fP'l "

t&r

GT0-RQ)

GEH-6014 NCCD card and the feedback is derived from the load bridge attenuators on the NATLboard. This ahrm indicates that

>e dc link has been interrupted while there is still current in the link inductor. This can happen due to simultaneous turn ffof all GTOs, an open circuit in the inverter bridge, or an open circuit in the ac buses to the motor.

The following should be checked:

1) Perform control self test.

2) Perform gate test mode to insure that all GTO gating signals are present.

3) Check for loose bus or cable connections in the bridges, dc inductor circuit, capacitor panel, and all output power cables.

4) Check for proper wipe or open poles on the output breaker / contactor, ifsupplied.

SOURCE-OVERCURRENT, SOURCE BACKUP OVERCURRENT - Indicates an overcurrent as detected by the source bridge accts. These faults are symptoms of many possible failures. The backup overcurrent is a hardware protective backing up the software overcurrent protective. The current feedback signals and the hardware overcurrent detectors are located on the NLIB boards in the, electronics module. Check all SCRs and GTOs for shorts, perform control self test, and perform gate test; LOAD OVERCURRENT, LOAD BACKUP OVERCURRENT - Same as above except detected from inverter bridge accts.

SOURCE, LOAD PLL - Indicates that the source or load phase locked loop has lost lock with the source or load ~,,

voltages, respectively. The source and load PLLs operate from crossovers of the source and load integrated terminal,.

aitages (flux). This failure is most often caused by a failure in the,voltage feedback attenuator circuits in the bridges.

erform control self test, gate test, check NATLattenuator boards for open connectors or resistors, and check continuity of associated circuits.

STACK OVERFLOW - Indicates that the microprocessor is unable to complete its,interrupt driven operations in a normal amount of time, resulting in excessive stack buildup. Proceed as for MICROPROCESSOR ALARM.

SOURCE DIFF CURRENT,- On drives with a series 12 pulse source, this fault indicates an unbalance between the

""source bridge currents. Since the bridges are in series their currents'should be balanced at all times. Perform self test, perform gate test, check for shorted SCRs, and check acct circuits for open wires or connectors.

SOURCE OVERVOLTAGE - Indicates source voltage is excessive (threshold typically set at 1.2 p.u.). Investigate reason for excessive voltage. Ifno reason found, perform control self test.

P70 GATfNG SUPPLY UNDERVOLTAGE - Indicates loss of 70 volt gating supply for source bridge(s) or a blown fuse in one of the HPTK gating boards. Output of P70 supply should be approximately 85 vdc when drive is not running. Check HPTK fuses and input / output fuses for 70 volt gating supply.

P105 SUPPLY UNDERVOLTAGE - Indicates loss of 105 vdc supply for i/o module contact input circuits. Check voltage at i/o module, check for external shorts in field wiring, and replace the 105 vdc supply (on i/o module) if necessary.

LOAD OVERVOLTAGE - Indicates excessive output volta e (threshold typically set at 1.2 p.u.). Perform self test and recheck tuneup set tings.

VERSPEED - Actually an indication of overfrequency derived from the hardware "speed" circuitry on the NLCB

~

oard. The NSFC and NLIB boards are involved as well. Normally set to 1.05 p.u. of maximum drive frequency.

erform self test. If,overspeed occurs at start up from rest, it is likely to be due>>to.defective. load attenuator circuits.

7-11

II II n

P ~

sP gt, I

GEEK14 GROUND FAULT-Indicates a ground somewhere between (and including) the source isolation transformer and the ac output buses (including the motor ifthere is no output transformer). May also indicate a failed output ac bus attenuator.

A'shorted capacitor may also result in an indication of a ground fault. Check each phase of capacitor bank for shorts. If none of the above, megger transformer, bridges, dc link inductor, and output ac buses.

COOLANTTEMPERATURE HIGH OR H/E BLOWER LOSS - Indicates one or both of the following:

I) The coolant temperature has exceeded the fault level. normally set to 158 degrees Fahrenheit.

2) Heat exchanger fan(s) have failed (on a liquid to air heat exchanger) or the'heat exchanger fan(s) are no longer Iunnlng.

For systems with air cooled heat exchangers, check that cooling fans are operating and that heat exchanger is not blocked. For systems with liquid to liquid heat exchangers, check for adequate service (cooling) water flow.

COOLANT RESISTANCE - Indicates that the coolant resistivity has dropped to a critically low level. Resistivity fault level is normally set at.2 megohm - centimeter.

Replace mixed bed deionizer filter, run cooling system until resistivity increases above.2 megohm - cm, and restart drive.

COOLANT LEVEL - Indicates that coolant is below the low level, float switch in the coolant reservoir. Add coolant and check for leaks.

CHOPPER PS UNDERVOLTAGE OR P28 LOW; Indicates 120vac, 400 Hz output from the chopper power supply or the 28 vdc from the electronic module supply is low for an excessive time (software set, not adjustable).

Check chopper supply input voltage, output voltage, and protective fuses. Note that failure of the chopper circuit on the NHFA board can result 'in low output voltage, especially under load.- Check P28 volt=bus on electronic module power supply. Since this supply is unregulated, the power supply transformer adjustment tap should be set to give the maximum output voltage (approximately 31 vdc).

XDCD CONFIGURATION ERROR - Indicates a mismatch between the number of. GTOs programmed into DRVCFG setting 'and'the analog signal returned from the'XDCD board (on control panel sidewall) to the NCCD board indicating the number of GTO gate driver circuits per brid e Ie

. Perform self test and check that the number of GTOs programmed into DRVCFG is correct.

SOURCE REVERSE PHASE SEQUENCE - Indicates incorrect phase sequence as sensed on source bridge ac buses.

Depends on voltage feedback signals from the source attenuators beginning with the NATL board in the source bridge.

DESYNC FAILURE - On drives with synchronize / bypass capability, this fault indicates that the bypass breaker /

contactor has failed to open when commanded to do so during a transfer from across the line to variable speed operation (de-synchronization).

GTO GATE DRIVER FAULT - Indicates failure ot'a GTO or GTO ate driver in the load bridge. Observe LEDs on the XDCD card on the control panel sidewall and the red LEDs on the GTO

~ate drivers to locate the failed unit(s).

Check GTOs for shorts with a DVM. Ifany shorted GTOs are tound, check the associated snubber diodes for shorts. If no shorted GTOs are found. check flber optic cables / connections and / or chan e out ate driver cards. and perform self test.

7-11.

ALARMDETECTION Alarms are conditions which are cause for concern but which do not warrant immediate shutdown of the drive but should be investigated as soon as possible. A composite <<Iarm signal is generally supplied to operate a light on the control panel door. a remote annunciator supplied-by the user. or both.

7-12

gA l

~l AJ

GT0-IMD GEH<014 Some of the alarms willvary from one installation to the next, so the software ladder:diagram section of the system

'ementary must be consulted for a complete list of. The following alarms are standard (ifapplicable) and so willbe fined here.

ALARMS:

USER DEFINED ALARM-Indicates an alarm condition from a user defined interlocl'.

Not always supplied or used.

COOLANT PRESSURE LOW OR PUMP LOSS - Indicates low differential coolant pressure across power converter bridges or loss of both pump starters.

In the absence of other indications check for presence of pump power, and check operation of differential pressure switch in pump panel.

LOSS OF START PERMISSIVE - This is an optional alarm indication that the start permissive contact supplied by the:-

user is open.

I/O ADDRESSING PROBLEM - Indicates that memory or i/o associated with the microprocessor has failed to respond when addressed.

Can also be caused by inadvertent user input of a non existent memory location from the terminal.

Perform self test of drive at the earliest convenience.

lfthe problem is not identified by the self test, begin systematic substitution of digital boards one at a time.

MICROPROCESSOR INTERRUPT - Indicates that an improper interrupt of the microprocessor has occurred.

Perform self test of drive at the earliest convenience.

Check equipment for loose connections, arcing or other abnormal sources

"'feleci'rical noise.':If the. problem is not'identified otherwise,'begin systematic, substitution of,digital boards in the.-

following order:

VRSA (HMPG/DMPB/PROMS), HLCB, NSFC, HAIA.

LOSS OF SPEED CONTROL - Indicates that speed-is not following the speed reference. This usuallyoccurs because

. drive is overloaded and in current limit. Ifthis is the case, reduce load. Ifthe, overload.was temporary, reset and, continue.

GTO GATE DRIVER ALARM-Indicates failure of a GTO or GTO gate driver in the load bridge. Observe LEDs on the XDCD card on the control panel sidewall and the red LEDs on the GTO.gate drivers in the load bridge to locate the failed unit(s). Check GTOs for shorts with a DVM. Ifany shorted GTOs are. tound,.check the associated snubber diodes for shorts. Ifno shorted GTOs are found, check fiber optic cables / connections and / or change out gate driver cards, and perform self test.

LOSS OF SPEED REFERENCE - Indicates that the 4-20 ma speed reference has gone below 4 ma. Ifthe 4-20 ma reference circuit is used with a 2-IO volt reference, this alarm indicates that the reference has gone below 2 volts. Check continuity of the external (user) reference circuit. Perform self test of drive at the earliest convenience. Ifthe problem is not identified by the self test, begin systematic substitution of boards one at a time. starting with the NLCB board.

GTO FREEZE.- Indicates a condition resulting in a momentary protective freeze or halt of GTO filing. (IfGTOs are gated offat a current higher than their rating, they will fail.) The freeze circuit is located on the NCCD board in the electronics module. A freeze" is caused by one of three conditions:

I) An overcurrent condition, threshold set by the OVRI pot on the NCCD board. Currents from both source and load accts are checked against the OVRI setting.

2) Low chopper power supply voltage as sensed on the NCCD board. In this case low chopper supply voltage alarm mi ht also be reasonably expected.

3) Low P28 vdc bus.from the PSFF power supply module.

troubleshoot this condition, followsteps given for SOURCE OVERCURRENT and LOAD OVERCURRENT faults.

eck ifP28.vdc bus is low..Check that. chopper supply output voltage is l20 -,130 vac.

7-13

~ r b

4

GEE%014 Ir BRIDGE FILTER FUSE - Indicates that protective fuses for Zcv source bridge ac bus MOVs are blown. Not applicable to drives with a 4kv source bridge. Check fuses at the earliest convenience. SOURCE LINE DIP - Indicates a momentary dip of the source voltage to less than 70% of nominal. Investigate reason for loss of voltage, reset, and continue.

SOURCE LINE DIP '- Indicates a momentary dip of the source voltage to less than 70% of nominal. Investigate reason for loss of voltage, reset, and continue.

LOSS OF RUN PERMISSIVE - This is an optional alarm indication that the-run permissive contact supplied by the user is open.

BAD EEPROM INITIALIZATION-Indicates "that an attempted download of data'from PROM to EEPROM has failed.

This is checked only during a hard reset or power up and when test point TINO on the HLCB board is tied to DCOM to initiate a download.

Upon receipt of this alarm while attempting a download of EPROM to EEPROM, check the following:

I) Check that the write enable switch on the microprocessor daughter board DMPB is on.

2) Perfo'rm a control self test.

COOLANT TEMPERATURE HIGH OR H/E BLOWER LOSS - Indicates one or both of the following:

I) The coolant temperature has exceeded the alarm level,"normally set to 140 degrees Fahrenheit. When this happens, the backup heat exchanger fan, ifsupplied, willnormally come on.

2)'A heat exchanger fan has.failed resulting in,a switchover.tocthe"backup, fan,. if,supplied..-,

2 g

g g

g For systems with air cooled heat exchangers, check that cooling fans are operating and that heat exchanger is not blocked. For systems with liquid to liquid heat exchangers, check for adequate service (cooling) water flow.

COOLANT RESISTANCE LOW - Indicates that the coolant resistivity has decreased below the alarm level of 1,>>

megohm - centimeter.

Replace mixed bed deionizer filter as soon as possible.

SYNCH TRANSFER FAILURE - On drives having synchronize / transfer across the line capability, this alarm indicates that the bypass breaker / contactor has not closed within the allocated time limit after being commanded to close by the drive. The time delay is the sum of tuneup settings SYBCP and SYBCA.

In the event of this alarm, check the following:

I) Check ihat the bypass breaker / contactor is racked in, has control power available, and all its close permissives are met.

2) Check that the close bypass relay (CBC) in the drive control panel is picking up.

3) Check continuity of the circuit between the CBC interlock and the bypass breaker / contactor.

I

4) Check that the status interlock (52A) back from the bypass breaker / contactor is functioning properly and check continuity oi the circuit back to the drive control.

" SYNCHRONIZING MATCH FAILURE - On drives with synchronize / transfer across the line capability, this alarm

~

indicates that the drive has failed to synchronize / transter within the allocated time limit. Time is set by tuneup SQT7.

7-14

~ 0

~

1 fy

'Ij l

GT0-IMD GEH4014 the event of this alarm, check the following:

') Check that drive is not overloaded / in current limitand thus unable to reach top speed.

2) Check that incoming line voltage is not low.

P70 GATING SUPPLY VOLTAGE DIP - Indicates a temporary dip of 70 volt gating supply for the source bridge SCR firing circuits. An undervoltage detector is built into each of the HPTK gating boards in the source bridge. Unless this alarm is followed up by a GATING SUPPLY UNDERVOLTAGEFAULT, it is probably due to a.control power dip.

The appropriate action in this case is to reset and continue.

TORQUE COMMANDUNBRACE - On dual channel drives, the torque command from the "A" channel (master) speed regulator is sent as a torque reference to the "B" channel (slave) as a +/- 10 volt analog signal. The "B" channel performs an a/d conversion on the torque sisal so that it can be used by the digital control. The digitized sinai is also converted-back to analog +/- 10 volt and sent back to the A" channel (master). The master digitizes the returned signal and compares it with the signal being sent. Ifthere is a mismatch of more than 100 counts (.1 PU), an alarm is generat-ed.

'n the event this alarm is generated, the following checks should be made:

1) Perform self test of both channels at the earliest convenience.

2) Check continuity of interconnecting wiring between drive channels.

3) Check for loose ribbon cable connectors on electronics module and i/o module.

, Replace the NISA card in the electronics module.

EXCITATIONCOMMANDUNBALANCE-Same as TORQUE COMMANDUNBALANCEexcept that the signal is the command for motor excitation (magnetizing) current originating from the "A" channel (master) flux regulator.

MOTOR OVERTEMPERATURE - This is an optional alarm indication of motor overtemp from an externally supplied monitor.

CHOPPER POWER SUPPLY VOLTAGE DIP - Indicates 120 vac, 400 Hz output from the chopper power supply or the 28 vdc from the electronic module supply is low. Check chopper supply input voltage, output voltage, and protective fuses. Note that failure of the chopper circuit on the NHFA board can result in low output voltage, especially when under load. Check P28 volt bus on electronic module power supply. Since this supply is unregulated, the power supply transformer adjustment tap (located in the power supply) should be set to give the maximum output voltage (approxi-mately 31 vdc).

l 7-12.

GATE-TEST-MODE 7-12.1. General.

The gate test mode allows off-line testing of much of the analog signal conditioning, microprocessor firing control, and gate pulse generation circuitry. In the gate-test-mode,a local test oscillator supplies 3 phase, approxi-mately 60 Hz signals in place of the attenuated bus signals from the source and load bridges.

The electronic control can then lock onto these signals and generate signals to "dry fire" the thyristors in both bridges.

Thyristor gate pulses may

- '~en be examined for proper magnitude and phasing.

Firing may be adjusted between advance and retard limit for each g

age.

In the gate-test-mode, the control produces pulse train firing.

perform the following tests, a dual channel oscilloscope with voltage probes and a current probe is required.

7-15

=ress q

'4, p>t pi@

'lj+

vL JQ4 e

l Ukb

o GPK-0555 September.

1990 C

Series 90 -70 Programmable Controller Central Processing Unit, 32-Bit, 16 MHz Expandable, Floating Point IC697CPU782

~ Supports'floating point calculations.

~ Siagle slot CPU.

~ 12K inputs and outputs (any mix).

~ Up to 8K analog I/O.

~ 0.4 microseconds per boolean function.

~ 16'Hz. 80386DX microprocessor.

~ Supports Genius~ and Series 90-70 I/O.

~ Programmed by Logicmaster'90.

~ Supports up to 512 Kbytes of battery-backed expansion memory in the same slot.

~ Configurable data and program memory.

~ Battery-backed calendar clock.

~ Three position operation mode switch.

~ Password controlled access.

~ 'Hzee status LEDs.

~ Software configuration (No DIP switches or jumpers).

~ Reference information inside front door.

OK AN CNAlaan csMllVIL Mocsssslo UNfr gl

~WIDOW

~lTVWITWICNE

~ELO

~JCC7TI WW&ll

%wcsNT Cw&IUL

~SfllSIOa TMI tCNtT~Ill

~~ICSM4 N Rcw ~ Isar 0

8 Functions The CPU 782 is a siagle slot PLC CPU which allows floating point calculations.

The CPU 782 is program-med and configured, by Logicmaster 90.programming software to perform real time control of machines, processes and material handling systems.

The CPU 782 commuaicates with I/O aad smart option modules over the rack mounted backplane (IC697CHS750. 790, 791) by way of the VME C.I

.Standard format.

Supported option modules include GEnet LAN, Progranmunable Coprocessor, Access 90r" Display Coprocessor, Graphics Display Coprocessor, Genius VO Bus Controller, and all Series 90-70 discrete and analog VO modules.

Program and data memory for the CPU 782 is available by the attachment of aa expansion memory board with either 128, 256 or 512 Kbytes battery-backed CMOS RAM.

Operatioa of this module may be controlled by the three position switch or remotely by an attached programmer and Logicmaster 90 software. The status of a CPU is indicated by the three greea LEDs on the front of the module.

90, Access 90, Workmasrcr, Logicmasrcr. Gcnins and GEnet are rradansrts of GH Fannc Anrornarion Norrh Arncnca, inc.

Ai 4

l

Centrai Processing Unit, 32-Bit, 16 MHz GFK-0555 9~ation

~ Instauatioa should aot be anemptcd without refer-ring to the Series 90-7Q PLC Instalhtion aad Oper-ation Manual (See Refereacc 5).

~ Alignthc expansion memory and CPU connectors.

~ Alignthe captive screws on the memory board with the staadoffs already installed on the CPU.

~ Push the memozy board oato the CPU coaaector easurmg the maang screws rcmam allgilcd with their respective standoff.

~ Screw each memory board screw into the standoffs with a ¹I Phillips screwdriver, firmly tightening each.

~ Connect. the battery to either of the baacry connec-tors on the module.

~ Put toggle switch ia the STOP position.

~ Make sure rack powct's off.

~ Install in slot 1 of rack Q. (Sec Figure 1)

~ Turn oa power.

the top LED stays on and the middle and bottom LEDs are off. The CPU is now ready to be program-med. After the program has been verifie the toggle switch may be moved to the appropriate operation mode positioa.

- The LEDs indicate the position of the toggle switch and the state of the program.

Installation of a CMOS expansion memory board oa the CPU will rcqture initialization of the CPU with the programmer (See Reference 5).

Expansion Memory'he CPU 782 must have a CMOS RAM expaasion memory boartL The CMOS expansioa memory board provides CMOS RAMmemory of 128K, 256K or 512

,Kbytes.

The battery which supports this memory is located on the main CPU board housing. (See Figure 2) 0

~

T U U N7Tf TUTIt~ IU'tCITITUXIICICUTTUI

~ TUCCI UTUTUlAClMV% CC ICUT UUUUUUUJlt TUCUUICICTW AT SIIU CNOIUUITUTUITUt0 UICUUNtttUtIL CLWNQClLY

~ICTICICCI taTTTTIT UCISITU L

eSOCr CI UT~ lsCI

%dlll~IUU

~IUUaaaIU CUV ~ CUVTTI~ I@VIII/IltUUCUUTCIrt%

OAWl&v%%UTICAUCUTI~

CTU OS WWSfl%UCUU4Wh'I

~ ~ 4Wel% UJU OIIUCCttILUCUITI IU ~ AWKUUUCT.tWIWllI IUCTIHCIUUtt

~ICUU IIUtT

~ Figure LSeries 90-70 PLC System Diagram The module should power up and blink the top LED.

When the diagnostics have completed successfully, Figure 2. CPU 782 - Location of Major Features

r a *~4%

N, ~

lt j'I i

Ceatral Processing Unit, 32-Bit, 16 MHz GFK4555 Programmer, Connection, Parallel For "a parallel interface the progiamtner is connected to the top port on the Bus Transmitter Module (IC697BEM713) as shown in Figure 1. Consult Ref-erence 1 for a description of progtamtning functions.

Serial Port The 15-pin Dwonnector provides the connection to an RS-485 compatible serial port as shown in Figure 3.

This port provides a serial connection to a Work Sta-tion interface board installed in the programming computer.

The serial connection can also be made Qom the serial port on the CPU to the serial port on the programming computer,:or. other, serial device.

through the GE Fanuc RS <22/RS<85 to RS-232 Converter (IC690ACC900).

This connection can be made with available cables or you,may build cables to fit the needs of your application.

For more information on serial communications, see references 5 and 6.

41 4W444TW X

~ll aw aw

<<w

~4W CTT W CTTW 414 W SIS W W44 a ld

~I IT aw ll a f4

~

ATS W

~1

~I Cfddl

~ CflW

~

AT I

IIaal Multidrop Configuration Following are the cable and connector requirements, and a wiring diagtam for connecting a Wotktnaster II, Workmaster, or other compatible computer to Series 90 PLCs in an 8-wire multidrop, serial data configura-uon.

A maximum of 8 PLcs may be included in a multidrop configuration.

The 15-pin serial port connector for the Series 90-70 PLC is located on the CPU.

The 37-pin serial port connector is located on the Work Station Interface board installed in the computer.

The cable type for these connections should be 24 AWG, 30V computer grade.

Extra Qexible constrtiction is recommended for short lengths.

C

~

4 T V

IL 4 4 C ~

~4 C

444 Oaf~WMMI11 WAATTT4441M I4444WTO O44 $ 1 OdfOUI 4OM Al

~444T WM 44 ~

f4141 WMOW

~44Mf 4&WHO W 114 WII Tda adl aid dfSI4 df4IO CTS Ql CIS W Sf

~4 1g044 TWO4OOWW444W

~IdMAT4WATIT44~ M O44 4OTWII44T4 WIOWW'W

~l4 44 If~ f44 MWTOW414 WOO444 TO4I41 OIWITT44 ld44TW4M4OOM144I441 ll4MW4WOf144 a I4 a Id aa aw ATTId WTW CISld

~ISW Af

~4OOI4 NOT%

TCITALLSISSTII44 ALLdITSWC~TOCI CASLSS TTTCW STLI TTT LASTSWI IS 44 ftgT

~ ALLILATSIATSTSt ATSAkst CITCLACTt eSTITTALIS MCS4 IAAX4444L ld44MIICT WOOAWa IOCTOIAWATSISW TO4444TW WMT444ICOTW IWWW41TAWA~~ TO IS OTAWSW OATOIW4 ATTWOO OTTWIAOLTMT444OTSW 4W44 OlOOHWAW WC

~r44WCTT TfCOTOOTO 1444% 44TOWIM4 4O M4 8444 1H 1AM4OWL TfldTl% 44444414 IWOTT44 WAWMAWWTIIh, CATAI44 NAOOO SWIOWI NO CTTT44IITI TWTd\\WATDIWdTd ATTICfl44 44ISWOW CT4 444a

~ IdlINdMII, Figure 3. System Configuration. Serial Connection to Programmer Figure 4. Series 90 PLC 8-Wire Multidrop, Serial Data Configuration

~p fE '"

Ci(

>++'v(

Central Processing Unit, 32-Bit, 16 MHz GFK-0555 Co n6guration The Model 70 CPU and I/O system is configured with Logicauister 90 programming software.

There are ao DIP switches orjumpers used to configure the system.

The CPU vcrifics the acmal module aad rack coafig-uration at power-up and periodicall during opcrauon.

The actual configuration must be the same as the programmed coafiguration.

Dariatioas are reported to the CPU alarm processor fimctioa for configured fault response.

Consult Reference 1 for a description of configuration functions.

Batteries A lithium battery (IC697ACC701) is installed as shown;in Figure 2 This battery maintains program and data memory when power is removed and oper-ates thc calendar clock.

Be sure to install the new battety before removmg the old battery.

If during power-up diagnostics a low battery is detected the Module OK LED (top) will aot stay on.

Specific indication of a low battery state is detailed in Ref. 5.

Removing a Module The instructions below should be followed when removing a module from its slot in a rack.

~ Grasp the board Qmtly at the top and bottom of the board cover with your thumbs on the &oat of the cover and your Qngers on the plastic clips on the back of the cover.

~ Squeeze the rack clips on the back of the cover with your Qngcrs to disengage the clip from the rack rail aad pull the board Qrmly to remove it &om the backplane connector.

~ Slide the board aloag the card guide and remove it from the rack.

sf gJt 4.

. L'p 4

e If

Central Processing Unit, 32-Bit, 16 MHz GFK<555 Table L References Title Logicmastez 90 Pzogramnnng Sofzwaze User's Manual Logicmaszez 90 Refezence Manual Pzogzazumable Copzocessor Module User's Manual Programmable Copzocessor Module Refezence Maunal Series 90~-70 PLC Installation and Opezauon Manual GFK No.

GFKM63 GFKM65 GFK~S GFK4487 GFKM62 Table 2. Specifications Battery Shelf life Memory retention Enviroamentals Operating temperature Storage temperature Humidity Vibration Shock Current required from 5V Bus Time of Day'lock accuracy Elapsed Time Clock (internal timing) accuracy Serial Port RS422l485 compatible Complies with standards IEC JIS DIN UL CSA NEMA/ICS ANSI/IEEE VDE FCC VME 10 yeazs at 20' 6 months nominal without applied power.

0'o 60' (32'o 140')

M to 85' (M'o 185')

5-95% non-condensing.

33 mm, 5-9 Hx: 1.0 G 9-150 Hx 15 g's for 11 msec 1.6 Amps (inchdes expansion memozy) 6 35 seconds per,day maximum 5.01% maximum Pzogzammer Sezial Auachment 435, 380 C 0912, JIS C 0911 435, 380 508, 1012 C222 No. 142, C222 2-230.40 C-37.90A-1978 805, 806, 871-877 15J Pazt A System designed to suppozt the VME standani C.l Table 3. Ordering Information CPU 782, 16 MHr 32 Bit Expandable, Floating Point 128 Kbyze, 32-Bit CMOS Expansion Memozy 256 Kbyze, 32-Bit CMOS Expansion Memozy 512 Kbyte. 32-Bit CMOS Expansion Memory Lithium Bauezy IC697CPU782 IC697MEM731 IC697MEM733 IC697MEM735 IC697ACC701 GE Fanuc Automation North America, IncCharlottesville, Virginia

0 >1(

'4 4>,i t'i

2-.52 System Operation Sy 6FK-0265, gF; M

ECTION 7 Series 90-7Q PLC I/O System The Series 90-70 PLC I/O system provides the interface between the Series 90-70 PLC and user-supplied devices and equipment.

The I/O system supports both rack-type Model 70 I/O and the Genius I/O system. In addition to supporting these two I/O subsystems, the I/O system willalso support Subnet Global Memory and PCMs. A Genius I/O Bus Controller (GBC) module provides the interface between the Series 90-70 PLC CPU and a Genius I/O bus.

The I/O structure for the Series 90-70 PLC is shown in the following figure.

Th:

prc anc mo APPLICATION RAM

%AI

%AO

%R VO CONFIGURAT(QN DATA

}0 16 BITS~

I/0 SCANNER a42946 BCP MEMORY

%I

%T

%G

%s

%0

)+1 BIT+

IC(

ICE ICC.

IC<

IC6 IC6 IC6 IC6 IC6 IC6 IC6 IC6'C6 IC6!

IC6!

ICg 90.70 DISCRETE INPUT MODULE 90-70 DISCRETE OUTPUT MODULE 90-70 ANALOG VO MODULE BACKPLANE 90-70 ANALOG INPUT EXPANDER GENIUS BUS CONTROLI.ER IC69 IC69 IC69 IC69'ENIUS I/O BUS BSM HHM 66 GBC GENI IC69

'oi pot'of m~

'ar.

S6, HOST CPU COMPUTER Figure 2-5. Series 9Q-7Q PLC UO Structure

iP 1

~-k<

4, 1l 0

i

tlon 0265 System Operation GFK-0265 Model 70 IJO Modules 2 53 and the Dort

'ace There are five types of Series 90-70 PLC input/output modules, listed in the following table. This table provides the catalog number, applicable data sheet number, number of I/O points, module description, and configuration parameters for each module.

The configuration parameters listed are for every module of a type, unless otherwise noted.

Table 2-11. Model 70 I/O Module Types Catalog Number IC697MDL240 IC697MDL241 IC697MDL250 IC697MDL650 IC697MDL651 IC697MDL652 IC697MDL653 IC697MDL654 IC697MDL340 IC697MDL341 IC697MDL350 IC697MDL740 IC697MDL750 IC697MDL752 IC697MDL753 IC697MDL940 IC697AL6230 IC697ALG440 IC697ALG441 Data Sheet GFK-0375 GFK-0376 GFK-0084 GFK-0080 GFK-0377 GFK-0378 GFK-0379 GFK-0380 GFK-0082 GFK-0382 GFK-0081 GFK-0086 GFK-0085 GFK-03S1 GFK-0383 GFK-0384 GFK-0385 GFK-0386 GFK-0387 I/O Points 16 16 32 32 32 32 32 32 16 12 32 16 32 32 32 16 8 Ch 16 Ch 16 Ch Description 1

Discrete In ut Input 120 VAC oint o ated Input 240 VAC 16 Point Isolated Input 120 VAC 32 Point Input 24 VDC 32 Point Input TIL32 Point Input 12 VDC 32 Point Pos/Neg Logic Input 24 VDC 32 Point Pos/Neg Logic Input 48 VDC 32 Point Pos/Neg Logic Discrete Ou ut Output 120 VA oint Output 120/240 VAC 2A 12 Point Isol Output 120 VAC OSA 32 Point Output 24/48 VDC 2A 16 Point Output 24/48 VDC 0.5A 32 Point Output 12 VDC ODA 32 Point Output 5/48 VDC 0.5A 32 Point Neg Log Output Signal Relay Analo In ut a

-Input High Leve og annel,.

Expander Analog-Current 16 Channel Expander Analog-Voltage 16 Channel Configuration Parameters Intenupt Enable (all)

Intenupt Transition (all)

Filter Speed (all)

Logic Sense

~

Logic Sense 2

Logic Sense i Output Default (all)

Per Channel Con6g Board Con6ig.

Board Con6g.

IC697ALG320 GFK-038S 4 Ch Analo Ou ut Output Analog-o tage urrent 4 Channel Per Channel Con6g IC697APU700 GFK-0393 High Speed Counter Some of the I/O modules listed above may not be available at thc time this manual is printed.

For cuirent availability, consult your GE Fanuc PLC distributor or local GE Fanuc sales teptesentative.

Logic sense patameter only for discrete DC modules described as having +l-logic.

Rest of parameters.listed arc for all input modules.

Paruneier listed is for board on same line.

e 'b I

C'4

+L

2-94 System Operation S

GFK-0265 t'O Data Mapping iscrete inputs and outputs are stored as bits in the BCP Bit Cache memory. Analog I/O is stored in the application RAM allocated for that purpose.

Analog data is always stored in the demultiplexed state, with each channel requiring one word (16 bits).

G Default Conditions Upon power-up, Model 70 discrete input modules 'default to the first input on the module not interrupt-ing and the input filterbeing slow speed. The configuration utilityprovides the ability to specify that the first input may be an interrupt input and for the fil'ter speedto be fast or slow. Ifchanged by the. user, new defaults are applied when the board is configured by the CPU during the power-up process or whenever else the module may go through configuration.

Model 70 discrete output modules default to all outputs off.

The configuration utility provides the ability to specify whether the CPU transitions from RUN/ENABLED to RUN/DISABLED or STOP modes.

It also applies this default information when the system halts.

T:

bi CI Genius IlO Information relative to using Genius I/O in a Series 90-70 PLC system is presented in the following paragraphs..

For specific information on Genius I/O block types, configuration, and setup, refer to the Genius I/O System User's Manual, GEE-90486.

t:.

c."

~enius I/O Bus Configuration he Bus Controller used in the Series 90-70 PLC controls a single Genius I/O bus. 'ny type of Genius I/O block may be attached to the bus.

In the I/O fault table, the rack, slot bus, module, and I/O point number are given for a fault. Bus number one refers to the bus on the single-channel GBC.

C Genius I/O Data Mapping Genius I/O discrete inputs and outputs are stored as bits in the Bit Cache memory.

Genius I/O analog data is stored in the application RAM allocated for that purpose (%AI and %AQ).

Analog data is always stored one channel per one word (16 bit).

An analog grouped module consumes (in the input and output data memories) only th~-amount of data space required for the actual inputs and outputs.

For example, the Genius I/O 115 VAC Grouped Analog Block, IC660CBA100, has four inputs and two outputs; it consumes four words of Analog Input memory (%AI) and two words of Analog Output memory.

A discrete grouped module, each point of which is configurable with the Hand-Held Monitor (HHM) to be input, output, or output with feedback, consumes an amount in both discrete input memory (%I) and discrete output memory (%Q) equal to its physical size.

Therefore, the 8 I/O 115 VAC Discrete Grouped Block (IC660CBD100) requires 8 bits in the %I memory and 8 bits in the %Q memory, regardless of how the block is configured.

T SL Ig T

cl bi I/

t II "4'.

4gi, 4"~ (+4~,"<

Dn65 System Operation oFK-0265 he

e, 1e

r, or I

>p There are four Genius I/O blocks assigned to the analog memories:

o 6-Channel Analog Grouped Block.

i 6-Channel Thermocouple Block.

i 6-Channel RTD Block.

~ 4-Channel Strain Gauge/mV Analog Input Block.

The Thermocouple, RTD and Strain Gauge blocks are also referred to as Low-Level Analog Input blocks.

Analog Grouped Block The Analog Grouped block contains four analog input channels and two analog output channels.

When a block gets its turn on the Genius I/O Bus, it broadcasts the data for all four input channels in one broadcast control message.

Then, when the Bus Controller gets its turn, it sends the data for both output channels to the block in a directed control message.

~a ie Low-I.evel Analog Blocks Unlike the Analog Grouped block, the low-level analog blocks are input-only blocks.

All have six channels except the Strain-Gauge block,.which has four.

is

.'s Default Conditions

'Genius I/O blocks have a number of default. conditions that.may be set.using. the Genius I/O Hand-Held Monitor. These defaults include

~ Report faults.

~ Range select.

~ Analog input and output scaling.

~ Input filter time.

~ Alarm input mode.

~ Output hold last state.

~ Output default.

These defaults are stored in EEPROM in the block itself. The Series 90-70 PLC configuration utility supports.the changing of only a small subset of these defaults.

For more information, refer to the Genius I/O System User's Manual, GEK-90486.

Through the COMMREQ function block, the application program can request the Bus Controller to change any default condition on a specific block.

However, this change will only be accepted by the block ifit is not in CONFIG PROTECT mode. IfCONFIG PROTECT mode is set, only the Hand-Held Monitor can be used to change the defaults.

The format of the COMMREQ function block for Genius I/O is described in the Genius Bus Controller User's Manual, GFK-0398.

I l

P,*i i,

2-56 System Operation GFK-0265 Diagnostic Data Collection Diagnostic data in a Series 90-70 PLC I/O 'system is obtained in one of two ways:

1. Ifan I/O module has an associated Bus Controller, then the Bus Controller provides the module's diagnostic data for the CPU.

2. Ifan I/O module is a Model 70 I/O module, then the CPU's I/O Scanner subsystem generates the diagnostic bits based on the data provided by the I/O module.

Diagnostic data is not maintained by the Series 90-70 PI.C for foreign I/O (not GE Fanuc) modules.

Any diagnostic information provided by those boards must be specifically accessed by the application program using the VME Read and VME Write function blocks.

The diagnostic bits are derived from the diagnostic data sent from the I/O modules to their I/O controllers.

Diagnostic bits always indicate the current fault status of the associated module.

Bits are set when faults occur and are cleared when faults are cleared.

Discrete I/O Diagnostic Information Diagnostic information is maintained by the Series 90-70 PLC for each discrete I/O point. Two memory blocks are allocated in application RAMfor discrete diagnostic data.

One is associated with %I memory and the other with %Q memory.

One bit of diagnostic memory is associated with each I/O point. This bit indicates the validity of the associated I/O data. "Each discrete point has a fault,reference available that may be interrogated using two special. contacts:

a fault contact (-[FAULT]-)and a no-fault 'contact

(-[NOFLT]-). The PLC only collects this fault data if enabled to do so through the configuration software.

The following table shows the state of the fault and no-fault contacts.

Condition Fault Present Fault Absent fFAULTJ ON OFF

[NOFLTl ON Analog I/O Diagnostic Data Diagnostic information is made available by the PLC CPU for each analog channel associated with Model 70 analog input modules, Model 70 analog output modules, Genius analog blocks, and Subnet objects.

Two memory blocks are allocated for analog diagnostic data.

One is associated with %AI analog input memory and the other with %AQ analog output memory.

One byte of diagnostic memory is allocated for each analog I/O channel.

Since each analog I/O channel uses two bytes of %AI and

%AQ'emory, the diagnostic memory is half the size of the data memory.

The analog diagnostic data contains both diagnostics and process data with the process data being the High Alarm and Low Alarm bits. The diagnostic data is referenced with the -[FAULT]-and -[NOFLT]-

contacts.

The process bits are referenced with the -[HIALR]-and -[LOALR]-contacts.

The memory allocation for analog diagnostic data is one byte per word of analog input and analog output allocated by the user.

When an analog fault contact is referenced in the application program, the PLC does an Inclusive OR on all the bits in the diagnostic byte except the process bits. The alarm contact is closed if any diagnostic bit is ON and OFF, only ifall bits are OFF.

-~ a~p n

I II 0

System Operation 2-57 s

ie GFK-0265 G1obal Data Communications The Series 90-70 PLC supports the sharing of data between multiple PLC systems that share a common Genius.I/O bus.'his'mechanism provides a means for the automatic and repeated transfer of %G, %I,

%Q, %AI, %AQ, and %R data. No special application programtning is required to use global data since it is integrated into the I/O scan. AllGE Fanuc PLCs that have Genius I/O capability can send global data to a Series 90-70 PLC and can receive data from a Series 90-70 PLC. Logicmaster 90 configura-tion software is used to configure the receiving and transmitting of global data on a Genius I/O bus.

n 0

e

'y y

(e et Q

ld 1e 2-

)y if

3-1 Chapter Fault Explanation and Correction GFK-0265 This chapter is an aid to troubleshooting a Series 90-70 PLC system using Logicmaster 90 software. It explains the fault descriptions, which appear in the PLC fault table, and the fault categories, which appear in the I/O fault table.

Each fault explanation in this chapter lists the fault description for the PLC fault table'r the fault category for the I/O fault table. Find the fault description or fault category corresponding to the entry on the applicable fault table displayed on your programmer screen.

Beneath it is a description of the cause of the fault along with instructions to correct the fault.

Chapter 3 contains the following sections:

Section

'Title Fault Handling PLC Fault Table Explanations Description Describes the type of faults that may occur in the Series 90-70 PLC and how they are displayed in the fault tables.

Descriptions of the PLC and I/O fault table displays are also included, as'well as how to access additional fault informauon by pressing CIRL-F.

Provides a fault description of each PLC fault and instructions to correct the fault.

Page 3-2 3-8 I/O Fault Table Explanations Provides a description of each I/O fault and insuuctions to correct the fault.

3-24 t

Addhiontd information on the fault tables may be found in chapter 5, PLC Control and Srarus, in the Programming Software User's Manual, GFK-0263.

For information on system status/fault references, refer to chapter 2, section 3, Program Organi:ation and User Data.

t t

ig I*

" v,'l

~

E,%

~Pi

I'

3.4 Fault Explanation and Correction 6FK-0265 Fault Response

" Fault. response refers to the ability of a fault to have its fault action changed.

Those faults which can have their fault action changed are called configurable faults.

Those which cannot are called non-configurable, faults.

Non-configurable faults are either fatal or informational.

Also, non-configurable faults do not cause application available references to be set and cannot have alarm blocks associated with the detection of the fault. Some non-configurable faults also have other effects associated with them.

Generally, these effects control the changing of the CPU's execution mode

{STOP, RUN/DISABLED, RUN/ENABLED). An example of such an effect is the disabling of I/O when a NULLSystem Configuration is detected in the system.

PLC Fault Table The PLC fault table displays PLC faults such as password violations, PLC/configuration mismatches, parity errors, and communications errors.

For example:

It/0 ICPU

!~~

(

I I

ISETUP IFOLDER IUT LTv IPR NT ti~~>>

~ 2~~

3~v 4~+

5~>>"

" 6~ 7~ 8~ 9PggiQ~

~~-

Pac c'AU>T

'ASa='OP FAULT DISPLAvH): 00003 TOTAL FAULTS: 00003 "AULT LOCATION FAULT DESCRtPTtON TABLE LAST CLEARS: 04-24 13:13: 19 ENTRIES OVERFLOWED:

QQQQQ PLC DATE/TTME. 04-24 13'16'35 DAT-TiitE Y-D R: 8:

S 0.1 0.2 0.1 Low battery signal System configuration mismacch Application stack overflow 04-24 13:16:24 04-24 13:13:53 04-24 13: 13:20 To display a screen similar to the one shown above, press PLC Fault {F3) from the PLC Control and Status menu or from another PLC functions screen.

The programmer may be in any operating mode.

However, ifthe programmer is in Off-Line mode, no faults are displayed. In On-Line or Monitor mode, PLC fault data is displayed.

In On-Line mode, faults can be cleared {this may oe password protected).

Field Top Fault Displayed Total Faults Table Last Cleared Entries OverQowed PLC Time/Date Description The index of the PLC fault currently at the top of the fault display is shown on the Gzst line of this scree+

The total number of faults since the table was last deared.

The date and time faults were last cleared from the fault table. This information is maintained by the PLC.

The number of enuies lost because the fault table has overQowed since it was cleared.

The PLC fault table can contain up to 16 faults.

The current date and time. This is also maintained by the PLC.

P'

, I ffp$

a$

ion I

pault Explanation and Correction 3-5 2Q OFK 0265

an led so, rnl cts

'de

/0 For more information on the PLC fault table, refer to the chapter 5, PLC Control and Status, in the programming Software User's Manual, GFK-0263.

gP Fault Table The I/O fault table displays I/O faults such as circuit faults, address conflicts, forced circuits, and I/O bus faults.

For example:

I I/0 lcPU IKZEH I I

I IsETUP IFQLDER IUTILTY I PRINT tj~e>>

~

2j~e

~

3~5o>>

4~+

5j~o>>o, - ie 6~ 7~ 8~ 9gggtogoerg "s,

i/0 FAUa TOP FAULT DISPLAYS): 00002 TOTAL."AULTS: 00002 FAULT DESCRIPTION:

TABLE LAST CLEARED: 04-24 13:11:48 ENTRIES OVERFLOWED: 00000 PLC DATE/TIME: 04-24 13:22:06

AUL.

CIRC REF" RENCE LOCATION NO.

ADDR.

FAULT CATEGORY FAULT TYPE DATE TIME M-D H:

M:

S 0.6 0.5 XQ 00033 LOSS OF I/O MODUL" 04-24 13:21:36 00017 LOSS OF I/O MODULE 04-24 13:21:36 I

o'I I'l'o displ'ay a~screen similar to the 'one;shown above, press:.I/O,Fault (F4) from the PLC Control and

= Status menu or from another PLC functions, screen.

The programmer may be in any operating mode.

However, ifthe programmer is in Off-Line mode, no faults are displayed. In On-Line or Monitor mode, PLC fault data is'displayed.

In On-Line mode,.faults scan be cleared (this feature may be password protected).

Field Top Eault Displayed Total Faults Fault Description Table Last Cleared Entries Overflowed Description The index of the I/O fault currently at the top of the fault display is shown on the Grst line of this screen.

The total number of faults since the table was last cleared.

An explanation of the fault that is currently highlighted in the I/O fault uble.

The date and time faults were last cleared from the fault table. This information is maintained by the PLC.

The number ofentries lost because the fault uble has overflowed since it was cleared.

The I/O fault table can contain up to 32 faults.

PLC Time/Date The current date and time.

This is also maintained by the PLC.

For more information on the I/O fault table, refer to the chapter 5, PLC Control and Starus, in the Programming Software User's Manual, GFK-0263.

I 0

~3-6 Fault Explanation and Correction GFK-0265 Displaying User-Defined Faults User-defined faults can be logged in the PLC or I/O fault table.

When a user-defined fault occurs, it is logged in the appropriate fault table as "Application Msg(error code):" and may be followed by a descriptive message up to 24 characters.

Allcharacters in the descriptive message can be defined by the user.

Although the message must end with the null character (e.g., ASCII value 16x00), the null character does not count as one of the 24 characters. Ifthe message contains more than 24 characters, only the first 24 characters are displayed.

The following example PLC fault table contains a user-defined fault with error code 87.

)PRCGRM t

ABLES fgjggg

(

J

]LIB

)SETUP

)FOLDER IUTI:TY,PRINT igoewi} @asti 3goewg 4 fiick 5~is.

~

~ 8~iii. ii jggg 8~

~

9P@Tg] Qgoarr g PLC FAULT TABLE TOP, AULT DISPLAYED: 00001 TOTAL.FAULTS: 00001 FAULT LCCATION FAULT

.DESCRIPTION TABLE LAST CLEARED: 04-24 13:42:38 ENTRIFS OVERFLO'WED: 00000 PLC DATE/TIM": 04-24 13:43:06 DATE TIME M-D:":: M:

S 0.1 Applicatian Msg(87): This is a user fault 04-24 13:42:51 q ~

~

51 For more information on user-defined faults, refer to the chapter 5, PLC Control and Srarus, in the Programming Software User's Manual, GFK-0263.

I I Pt

~l P

pfg

a the tuQ Is>

ion:

~

pault Explanation and Correction 3-7 t

t265 gpK-0265 Accessing A.dditional Fault Information

'The'PLC Md I/O fault tables contain basic information. about the faults listed in each table. Additional information about a particular fault can be displayed by positioning the cursor on that fault in the

'ppropriate table and pressing the Zoom (F10) softkey. Information about the error code, default action, description of the error, and appropriate corrective action is displayed on a screen similar to this one for a Loss of I/O Module error.

I I

I IEXZT-1~ 2~ 3~ 4~ 5~ 6~ 7~ 3I~ 9~1'~

0.6 XQ 00033 LOSS OF 1/0 MODULE 04-24 13:21:36 02 482100 00067F7FFF7F 0303 GE 00 00 0200G0000000000000000000000000000000000000 Loss of r/0 Module The PLC operating software generates this error when it detects that a

Model 70 r/0 module is no longer responding to commands from the PLC CPU.

or when the configuration file indicates an r/0 module is to occupy a slot and no module exists in the slot.

Corrective Action 1.)

Replace the module.

2.)

Correct the configuration file.

3.)

Display 'he PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service,: giving them all the information contained in the fault entry.

NOTE 1

I A hexadecimal'dump of the fault. can also be displayed by pressing. CTRL-F. from, this. screen..

he The last entry, Correction,. for each fault explanation in this chapter lists the action(s) to be taken to

'correct the fault. Note that the corrective action'for some of the'faults includes the statement:

Display the PLC Fault Table on the Programmer.

Contact GE Fanuc Field Serv'ce, giving them all the 'nformation contained in the fault entry.

This sec'ond statement means that you must tell Field Service both the information readable directly from the fault table and the hexadecimal information you see when you press CTRL-F. Field Service personnel will then give you further instructions for the appropriate action to be taken.

For more information on interpreting faults, refer to Appendix B, Interpreting Fault Tables Using I-ogicmaster 90 Sofiware.

'I wg ~A i

1>>

, t+

3-8 Fault Explanation and Correction GFK-0265 SECTION 2 PLC Fault Table Explanations Each fault explanation contains" a fault description and instructions to correct the fault.

Many fault descriptions have multiple causes.

In these

cases, the error code, displayed with the additional fault information obtained by pressing CTRL-F, is used to distinguish different fault conditions sharing the same fault description.

The error code is the first two hexadecimal digits in the fifthgroup of numbers, as shown in the following example.

01 000000 01030100 0902 0200 000000000000 Error Code (first two hex digits in fi th group)

Some faults can occur because random access memory on either the PLC CPU board or the expansion memory board has failed. These same faults may also occur because the system has been powered off and the battery voltage is (or was) too low to maintain memory.

To avoid excessive duplication of instructions'when corrupted memory may be a cause of,the error, the correction simply states:

Perform the corrections for Cor upted Memory.

This means:

l. If the system has been powered off, replace the battery.

Battery voltage may be insufficient to maintain memory contents.

2. Replace the expansion memory board. --Integrated. circuits on, the, memory board may be failing.

3. Replace the PLC CPU board.

The integrated circuits on the PLC CPU board may be failing.

ffg "C

in Fault Explanation and Correction 3-9 t;FK-OZ65 The fallowing table enables you to quickly find a particular fault explanation in this section.

Each entry is listed as it appears on the programmer screen.

)n

<jf of Fault Description

'Loss of, or Missing, Rack Loss of, or Missing, Option Module Addition of, or Extra, Rack Reset of, Addition of, or Extra, Option Module System Configuration Mismatch System Bus Error PLC CPU Hardware Failure Module Hardware Failure Option Module Software Failure Program Block Checksum Failure Low Battery Signal Constant Sweep Time Exceeded PLC System Fault Table Full I/O Fault Table Full Application Fault Non-Configurable Faults System Bus Failure No User Program on Power-Up Corrupted User Program on Power-Up Window Completion Failure Password Access Failure Null System Configuration for RUN Mode PLC CPU System Software Failure Too Many Bus Controllers Communications Failure During Store Run Mode Store Failure Page Number 3-10 3-11 3-12 3-12 3-13 3-15 3-15 3-16 3-16 3-17 3-17 3-18 3-18 3-18 3-19 3-19 3-20 3-20 3-20 3-21 3-21 3-21 3-22 3-23 3-23 3-23

ty t~(

1 J.

)k

3-10 ault Explanation and Correction 6FK-0265 vnfigurable Faults onfigurable faults can have their fault action (fatal or diagnostic) changed.

The CFU uses the fault action specified by the configurator utility; this may be the default action or a fault action chosen by the user.

In this section, the default fault action is listed for configurable faults.

Loss of, or Missing, Rack The Fault Group Loss of, or Missing Rack (Group 1) occurs when the system cannot communicate with an expansion rack because the BTMin the main rack failed, the BRM in the expansion rack failed.

power failed in the expansion rack or the expansion rack was configured in the configuration file but did not respond during power-up.

The default fault action for this group is Fatal.

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

1 Rack Lost The PLC operating software (System Configurer) generates this error when the main rack can no longer communicate with an expansion rack. The error is generated for each expansion rack that exists in the system.

{1)

Power off the system.

Verify that both the BTM and the BRM are seated properly in their respective racks and that all cables are properly connected and seated.

(2)

Replace the cables.

(3)

Replace the BRM.

(4)

Replace the BTM.

2 Rack Not Responding The PLC operating softwate (System Con6gurer) generates this error when the configurarion file is stored Rom the programmer indicates that a particular expansion tack should be in the system, but none responds for that rack number.

{1)

Check rack number jumper behind power supply, first on missing rack and then on all other racks, for duplicated rack numbets.

(2)

Update the configurauon file if a rack should not be present.

(3)

Add the rack to the hardware configuration ifa rack should be present and one is not.

(4)

Power off the system.

Verify that both the BTM and the BRM are seated properly in their respective racks and that,,all cables are properly connected and seated.

(5)

Replace the cables.

(6)

Replace the BRM.

(7)

Replace the BTM.

~ t

)l~

E C P

65 Fault Explanation and Correction GFK-0265 3-11

'e tlt

'ae Loss of, or Missing, Option Module The Fault Group Loss of, or Missing Option Module (Group 4) occurs when a GEnet, PCM, BTM, or "BRM fails to respond.

The failure may occur at power-up ifthe module is missing or during operation if the module fails to respond; The default fault action for this group is-Diagnostic.

te

'd ud Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

3 Bus Transmitter Module Found in Expansion Rack The PLC openting software (System Con6guter) generates this error when a Bus Transmitter Module is found in an expansion rack.

Power off the system and remove the BTM &om the expansion rack.

16b Analog Expander located to the left of tbe Base Converter module.

An Analog Expander module has been placed in a rack to the left of its Base Converter module.

Power off the system.

Move the Analog Expander module to the rigbt of the Base Converter module.

19 Lost Analog Expander module

'Base Converter module'bas lost communications with'the Analog Expander module.

(1)

Verify wiring linking Base Converter module vfith tbe Analog Expander module.

(2)

Replace the Analog Expander module.

(3) If all Analog Expanders lost, replace the Base Converter module.

2C, 2D Option Module Soft Reset Failed PLC CPU unable to re-establish communications with option module af'ter soft reset.

(1)

Try soft reset a second time.

(2)

Replace the option module.

(3)

Power off the system.

Verify that both the BTM and BRM are seated properly in their respective racks and that all cables ate properly connected and seated.

(4)

Replace the cables.

(5)

Replace the BRM.

(6)

Replace tbe BTM.

(7)

Report failure to GE Fanuc PLC Field Service.

FF

.Option Module Communications Failed PLC CPU generates this error when communications to the option module has failed.

(1)

Check the bus for abnormal activity.

(2)

Replace the intelligent option module to which the request was directed.

(3)

Check the parallel prognmmer cable for proper attachment.

All Others Module Failure During Configuntion Tbe PLC openting software (CPU VMECommunications) genentes this etror when a module fails during power-up or con6guntion store.

(1)

Power off the system.

Replace the module located in that rack and slot.

(2) Ifthe board is located in an expansion rack, verify BTM/BRMcable connections are tight and the modules are seated properly; verify the addressing of the expansion rack.

(3)

Replace the BTM.

(4)

Replace the BRM.

(5)

Replace the nck.

V I't Qt

+

ll/I t

4O,

.Px;

3-12 Fault Explanation and Correction GFK-0265 Addition of, or Extra, Rack v

~~,,

I The Fault'Group Addition of, or Extra Rack (Group 5) occurs when a configured expansion rack with

'which the PLC CPU could not communicate comes on-line or is powered on, or an unconfigured rack is'ound.

The default fault action for this group is Diagnostic.

Error Code:

Name:

Correction:

1 Extra Rack (1)

Check rack jumper behind power supply for correct setting.

(2)

Update the configuration file to include the expansion rack.

~

(3)

Remove the expansion rack Rom the hardware configuration.

Note:

No correction necessary ifrack was just powered on.

Reset of, Addition of, or Extra, Option Module The Fault Group Reset of, Addition of, or Extra Option Module (Group 8) occurs when an option module (PCM, BTM, etc.) comes on-line, is reset, or a module is found in the rack but none is specified in the configuration.

The default fault action for this group is Diagnostic.

Error Code:

Name:

Correction:

Error Code:

Name:

==

Description:==

Correction:

1 Extra Option Module (1)

Update the configuration file to include the module.

'2) "Remove the module. from the system.,

2 Module Restazt Complete Restan of module is complete.

None Error Code:

3 Name:

LANInterface Restart Complete, Running Utility

".Description:

'Ihe LANInterface module has restaxted and is running a utility program.

Correction:

'efer to the LANInterface Module Manual, GFK-0533.

IR

',Ts Cy F '

'~S

p'ault Explanation and Correction 3-13 th is oFK-0265 j $ystem Configuration Mismatt b The Fault Group Configuration Mismatch (Group 11) occurs when the module occupying a slot is different from that specified in the configuration file. The default fault action is Fatal.

When the I/O Scanner generates the mismatch because of a Genius block, the second byte in the Fault Extra Data field contains the bus address of the mismatched block.

on ed Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

= Error Code:

Name:

==

Description:==

Correction:

Genius I/O Block Number Mismatch The PLC operating software (I/O Scanner) generates this fault when the configured and physical Genius I/O blocks have different model numbers.

(1)

Replace the Genius I/O block with one coriesponding to configuied module.

(2)

Update the configuration file.

4 I/O Type Mismatch The PLC operating software (QO Scanner) generates this fault when the physical and configuied I/O types of Genius grouped blocks are different.

(1)

Remove the indicated Genius module and install the module indicated in the configuration file.

(2):. Update-the Genius module.desciiptions in the configuration file to agree with what is physically installed.

7 Daughter Board Mismatch The PLC operating software (Service Request Processor) generates this error when the con6gura-tion file indicates one size memory daughter (expansion) board should be on the PLC,CPU, and a different size is actually present.

(1)

Replace the module.

{2)

Replace the daughter board with the size indicated in th'e configuration file.

(3)

Update the configuration file to agree with the size of the daughter board actually installed on the PLC CPU.

8 Analog Expander Mismatch

'he PL'C'operating'software (Service Request Processor) generates this enor when the configured and physical Analog Expander modules have different model numbers.

(1)

Replace the Analog Expander module with one corresponding to configured module.

(2), Update the configuration file.,

9 Genius I/O Block Size Mismatch The PLC operating softwate (Service Request Processor) generates this error when block configura-tion size does not match the configure size.

Reconfiguie the block.

A Unsupported Feature Configured feature not supported by this revision of the module.

(1)

Update the module to a revision that supports the feature.

(2)

Change the module configuiution.

~ I CW I> ~

AP C

j+

f P

e

,3-14 Fault Evplanation and Correction GFK-0265 Error Code; Name:

Description; lCorrection:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

B Revision A of BTM Not in Right-Most Slot The BTM (Revision A version) is not the right-most module in the nck.

(1)

Move tbe BTM to tbe right of all other modules in the rack.

(2)

Upgnde the BTM to a newer version (Revision B, or higher).

E LANDuplicate MAC Address This LANInterface module bas the same MACaddress as another device on tbe LAN. The module is off the network.

(1)

Change tbe module's MAC addtess.

(2)

Change the other device's MAC address.

F LAN Duplicate MAC Address Resolved Previous duplicate MACaddress has been resolved. The module is back on the network. This is an informauonal message.

None required.

10 LANMAC Address Mismatch MAC address programmed by softswitch utility does not match configuration stored from Logicmaster 90 software.

Change MAC address on soAswitcb utility or in Logicmaster 90 configuntion software.

11 LANSoftswitch/Modem mismatch Configuntion of LAN module does not match modem type or configuntion prognmmed by softswitch utiTity.

(1)

Correct configuration of modem type.

(2)

Consult LAN Interface manual for configuntion setup.

17 Invalid Memory Reference Memory references in the logic prognm exceed that which is available.

Update the configuration file and store it to the PLC.

All Others Module and Configuration Do Not Match The PLC openting software (System Configurer) generates this fault when the module occupying a slot is not of the same type that the configuntion file'indicates should be in that slot.

(1)

Replace the module in the slot with one of the type that the configuration filindicates is in that slot.

(2), Update the configuration file.

'ty I

'P' l

1

,1

Fault Explanation and Correction 3-k5 oFK-0265 vsterII >us Error

, The Fault Group System Bus Error (Group 12) occurs when the PLC CPU receives the on confiyuable interrupt bus error from the bus systerri.

The default fault action is Diagnostic.

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:.

==

Description:==

Correction:

4 Unrecognized VME Intemtpt Source The PLC operating software (Operating System) generates this error when a module generates an interrupt not expected by the CPU (unconfigured or unrecognized).

(1)

Ensure that all modules configured for interrupts have conesponding interrupt declatations in the program logic.

(2)

Ensure that no third-party VME module is generating interrupts on the IRQ6 and IRQ7 lines.

All Others System Bus Error The PLC operating software (Operating System) generates this fault when it has detected an error signal on the VME backplane, such as a parity error.

(1)

Ensure that all expansion rack cables are properly connected and seated.

(2)

Take action to minimize system noise.

PI.C CPU Hardware Failure The Fault Group PLC CPU Hardware (Group 13) occurs when the PLC CPU detects a hardware failure, such as a RAMfailure or a communications port failure. When the failure is a RAMfailure, the address of the failure is stored in the first four bytes of the Fault Erma Data field.

When a PLC CPU Hardware failure occurs, the PLC OK LED willflash on and offto indicate that the failure was not serious enough to prevent programmer communications to retrieve the fault information.

The default fault action for this group is Fatal.

Error Code:

Name:

==

Description:==

Correction:

6Eh Time-of-Day Clock Not Battery-Backed The battery-backed value of the time-of-day clock has been lost.

{I)

Replace the battery.

Do not remove power from the main rack until replacement is complete.

Reset the time-ofay clock using Logicmaster 90 software.

(2)

Replace the module.

error Code:

All Others Correction:

Replace the module.

Fg II 4 4j7$

~ k ff 8

ll I

't

'lap l

+th g4 s

g>4 t)>>

Eh E

3-16 Fault Explanation and Correction GFK-0265 Module Hardware Failure The Fault Group Module Hardware Failure (Group 14) occurs when the PLC CPU detects non-fatal

- hardware failure on any module in the system; e.g., a serial port failure on a PCM. The default fault action for this group is Diagnostic.

Error Code:

Name:

==

Description:==

Correction:

lAO Missing 12 Volt Power Supply A power supply that supplies 12 volts is required to operate the LAN Interface module.

(1)

Install/replace a GE Fanuc 100 watt power supply.

(2)

Connect an external VME power supply that supplies 12 volts.

Error Code:

1C2 - IC6 Name:

LANInterface Hardware Failure

==

Description:==

Refer to the LAN Interface Module Manual, GFK-0533, for a description of these errors.

Error Code:

Name:

==

Description:==

Correction:

All Others Module Hardware Failure A module hardware failure has been detected.

Replace the affected module.

Option Module Software Failure The Fault Group Option Module Software Failure (Group.16) occurs when a non-recoverable software failure occurs on a PCM. It is also generated when the identification data read from a module indicates that the module is a GE Fanuc module but the module type is not a supported GE Fanuc type.

The default fault action for this group is Fatal.

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

1 Unsupported Board Type The PLC operating software (System Configurer) generates this fault when the identification data read from a board indicates that:the board is a GE Fanuc board but the type of board is not one of the GE Fanuc board types.

(1)

Upload the configuration file and verify that the software recognizes the board type in the file.

Ifthere is an error, correct it, download the corrected configuration file and retry.

(2)

Display the PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service, giving them all the information contained in the fault entry.

2 3 COMMREQ Frequency Too High COMlvlREQs are being sent to a module faster than it can process them.

Change the PLC program to send COMMREQs to the affected module at a slower rate, or monitor the completion status of each COlvQvlREQ before sending the next.

4 More Than One BTM in a Rack There is more than one BTM present in the racL Remove one of the BTMs &om the rack; there can only be one in a CPU rack.

Error Code:

191, 195 Name:

LANInterface Software Failure

==

Description:==

Refer to the LAN Interface Module Manual, GFK-0533, for a description of these errors.

Error Code:

All Others Name:

'ption Module Softwate Failure

==

Description:==

Software failure detected on an option module.

Correction:

(1)

Reload software into the indicated module.

(2)

Replace the module.

>I g

~d

, 1 ~

~

t I

~

0 ~

~

~ ~ '

~

I I I I

I

~ '

~

I ~ '

~

I I

~

I I'

I

~

~ I I

~

I I

~

I

~

I

~ '

~

i

~

~ ~

~

a

~

0 ~

e

~

I I

~ ~

~

~ ~

I I

~

~ I

~

I

~ '

I

~

I

~

I I I I

I

~

~ ~

I ~

~

~ ~

~

V ap' P.

p K) g

~*'

3-18 Fault Explanation and Correction GFK-0265 "onstant Sweep Time Exceeded The Fault Group Constant Sweep Time Exceeded

{Group 19) occurs when the PLC CPU operates in Constant Sweep Time mode and it detects that the sweep has exceeded the constant sweep timer. The fault extra data contains the name of the program in eight bytes.

The default fault action for this group is Diagnostic.

Error Code:

'0 Correction:

(I)

Increase constant sweep time.

(2)

Remove logic Gom application program.

PI,C System Fault Table Full The Fault Group PLC System Fault Table Full {Group 20) occurs when the PLC CPU places the 16th

'entry in the PLC fault table.

To avoid loss of additional faults, clear the earliest entry from the table.

The default fault action for this group is Diagnostic.

Error Code:

0 Correction:

Clear the PLC fault table.

I/O Fault Table Full The Fault Group I/O Fault Table Full {Group 21) occurs when the PLC CPU places the 32nd entry in the l/O fault table. To avoid loss of additional faults, clear the earliest entry from the table. The default fault action for this goup is Diagnostic.

Error Code:

0 Correction:

Clear the I/O fault table.

t f)"

I 1f

.J l~ g

I pn pault Explanation and Correction 3-19 265

'll

'he

)up Op@-0265 gpplication Fault The Fault Group Application Fault (Group 22) occurs when the PLC CPU detects a fault in the user program.

The default fault'ction for this group is Diagnostic.

6th le.

Error Code:

Name:

==

Description:==

Correction; Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

1 Indirect Address Out of Range The PLC operating software generates this etror when one of the parameters to a function block is an indirect reference (i.e., the panmeter is an addxess within that memory type which contains the parameter value) and the contents of the indirect reference ate out of range for the memoty type.

For example, consider a system with 500 %R registers defined. This fault would be generated ifthe parameter address were %R00100, and tbe contents of %R00100 were greater than 500 or zero.

The Fault Extra Data field contains ia tbe first two bytes the offset address of where the caH was

made, the segment selector and oflset (reference) in the next four bytes, and the name of the prognm block in which the function caH resides in the next eight bytes.

(1)

Conect tbe indirect reference.

(2)

Increase the number of registers available, ifpossible.

2 Software Watchdog Timer Expired The PLC operating software generates this error when tbe watchdog timer expires.

The PLC CPU stops executing the user program aad enters STOP mode.

The only recovery is to cycle power to the PLC CPU.

Examples causing timer expiratiom Looping, via jump, very loag prognm, etc.

(1)

Determine what caused the expiration (logic execution, external event,,etc.)

and cortect.

(2)

Use the system service function block to restart the watchdog timer.

5 COMMREQ Wait Mode Not Supported The module receiving tbe'OMMREQ does not support wait mode COMRKEQs.

Use no-wait mode COMMREQs.

y in

'ault Error Code:

Name:

==

Description:==

Correction:

6 COMMREQ Bad Task ID The task selected by the COMMREQ does not exist on tbe option module.

Correct the task ID.

Error Code:-

7 Name:

Application Stack Overflow

==

Description:==

'rogram block call depth has exceeded the PLC capability.

Correction:

Adjust application program to reduce nesung.

Error Code:

8-D Name:

LANInterface Application Faults

==

Description:==

Refer to the LAN Interface Module Manual, GFK-0533, for a description of these errors.

=Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

OE External Block Run-Time Error A non-user generated error occurred during execution of aa external block.

Decode the hexadecimal CTRL-F data displayed by Logicmaster 90 software into ASCII text to determine the exact error condition.

Then, correct the specific problem in the external block.

OF SORT Interrupt Error A SORT function executed in a timed or I/O interrupt at the same time a SORT functioa was executing in the main prognm.

Do aot use the SORT function in both an intexrupt aad in the main program.

Ion-Configurable Faults T"e fault action of Non-Configurable Faults cannot be changed.

Fatal faults cause the PLC to enter a

<<nn of STOP mode at the end of the sweep in which the error occurred.

Diagnostic faults are logged and corresponding fault contacts are set. Informational faults are simply logged in the PLC fault table.

h gt f

k Pi 1'Mpf'f +

H~!

y>Ie~ e 4

i ~

3-20 Fault Explanation and Correction GFKW265 System Bus Fai1ure The, Fault".Group System Bus Failure (Group 128) occurs when the PLC CPU software receives the non-configurable interrupt bus failure &om the bus system. The default fault action for this group is Fatal.

Error Code:

Name:

==

Description:==

Correction:

1 Bus Grant Failure The PLC operating software (Openting Software) generates this error when the PLC CPU was unable to obtain control of the VME bus when required.

(1)

Ensute that any non-GE Fanuc boards=.which can become bus masters are relinquishing control of the VME bus when requested to do so by the PLC CPU.

(2)

Replace the PLC CPU module.

No User Program on Power-Up The Fault Group No User Program on Power-Up (Group 129) occurs when the PLC CPU powers up with its memory preserved but no user program exists in the PLC. The PLC CPU detects the absence of a user'program.on-power-up; the" controller, stays in STOP. mode,;,performing, the STOP. mode sweep until a valid program is 'downloaded.

The default fault action for this group is Informational.,

Correction:

Download an application program before attempting to go to RUN mode.

Corrupted User Program on Power-Up The Fault Group Corrupted User Program on Power-Up (Group 130) occurs when the PLC CPU

~

'detects corrupted. user,RAM.'he'-PLC CPU.will'remain in STOP mode until a valid user program and configuration file are downloaded.

The default fault action for this group is Fatal.

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

1 Corrupted User RAM on Power-Up The PLC operating software (Openting Software) genentes this etTor when it detects corrupted user RAM on power-up.

(1)

Reload the configuration file, user'rognm, and references (ifany).

(2)

Replace the battery on the PLC CPU.

(3)

Replace the expansion memory board on the PLC CPU.

(4)

Replace the PLC CPU.

2 Illegal Boolean OpCode Detected The PLC openting software (Openting Software) generates this error when it detects a bad instruction in the user program.

(1)

Restore the user program and references, ifany.

(2)

Replace the expansion memory board on the PLC CPU.

(3)

Replace the PLC CPU.

Error Code:

6 Name:

Cottupted Remote I/O Scanner EEPROM

==

Description:==

The configuration in the, Remote I/O Scanner EEPROM was found to be corrupted at power-up.

Correction:

Restore the Remote I/O Scanner configuntion.

I Jl 0

4' 4(~

'I

a

~ r Falt Explanation and Correction 3~21 uFI:.OZ65 grindow Completion Failure The Fault Group Window Completion Failure (Group 131) is generated by the end-of-sweep process-

., so ftware in the PLC. The fault extra data contains the name of the task that was executing when the error occurred. The default fault action for this goup is Informational.

Error Code:

Name:

==

Description:==

Correction:

0 Window Completion Failure The PLC operating software generates this error when the PLC is opennng in Constant Sweep Time mode and the constant sweep time was exceeded before the progrunmer window could complete processing for its allotted time.

Inctease the constant sweep timer value.

up of

" Password Access Failure Th Fault Group Password Access Failure (Group 132) occurs when the PLC CPU receives a request to change to a new privilege level and the password included with the request is not valid for that level.

The default fault action for this group is Informational.

Error Code:

0 Correction:

Reuy the request with the conect password.

PU md

. full System Configuration for RUN Mode The Fault Group. Null System Configuration for RUN Mode (Group 134) occurs when the PLC transitions from STOP to one of the RUN modes and a configuration file is not present.

The transition to RUN is permitted, but no I/O scans occur.

The effect of this fault is to perform the function of a Suspend I/O. The default fault action for this group is Informational.

Error Code:

0

-Correction:

Download a configuntion file.

ad

/

V

ra

'r~

f

3~22i Fault Explanation and Correction GFK.0265 IIN T C CPU System Software Failure Faults in the Fault Group PLC CPU System Software Failure (Group 135) are generated by the operating software of the Series 90-70 PLC CPU.

They occur at many different points of system operation.

When a Fatal fault occurs, the PLC CPU immediately transiuons into a special Error Sweep mode.

The only'activity permitted when the PLC is in this mode is communications with the programmer.

The only method of clearing this condition is to cycle power on the PLC.

The default fault action for this group is Fatal.

T:

d; bt dc Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

Error Code:

Name:

==

Description:==

Correction:

14, 27 Corrupted PLC Program Memory The PLC openting software genentes these errors when certain PLC openting software problems occur.

These should not occur in a production system.

(1)

Display tbe PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service, giving them all tbe information contained in the fault entry.

(2)

Perform the corrections for corrupted memory.

52 Backplane 'Communications Failed The PLC operating software (Service Request Processor) generates this error when it attempts to comply with a request that requires backplane communicanons and receives a rejected mail response.

(1)

Check the bus for abnormal activity.

(2)

Replace tbe intelligent option module to which the request was directed.

(3)

Check panHel programmer cable for proper attachment.

5A User Shut Down Requested The PLC openting software (function blocks) genentes this informational alarm when SVCREQ

¹13 (User Shut Down) executes in the application prognm.

None requited.

Infomation-only alarm.

)

Error Code:

7B Name:

Remote I/O Scanner Communications Heattbeat Failure

==

Description:==

Refer to tbe Remote I/O Scanner User's Manual, GFK-0579, for a description of this error.

Error Code:

Name:

==

Description:==

Correction:

All Others

,PLC CPU Internal System Enor An internal system error has occurred that should not occur in a production system.

Display the PLC fault table on tbe prognmmer.

Contact GE Fanuc PLC Field Service, giving them all the information contained in tbe fault entry.

4 V

'C(

I, h

r

on Fault Explanation and Correction 3-23 he llIl ep he nit gFK-0265 Tpp iVVany Bus Controllers

-:The"Fault Group Too Many Bus Controllers (Group 136) occurs when the the I/O Scanner portion of the PI.C oPerating software detects that more than the maximum number (32) of bus controllers have been defined.

The PLC CPU itself is a bus controller for the Model 70 I/O present in the system.

The default fault action for this group is Fatal.

NOTE Genius bus controllers which are configured for redundant and non-redundant blocks count as two bus controllers.

0 Correction:

(1)

Determine which modules are bus contxollers and remove the extra ones.

(2)

Delete a bus controller horn the configuration file and store the file to the PLC CPU.

(3) Ifbus controllers have been moved fiom one slot in the tack to a different slot and this error did not occur before the move, cycle power on the rack. No module should be inserted with power applied to rack.

(4)

Display the PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service, giving

~ them all the information contained in the fault entry.

Communications Failure During Store The Fault Group Communications Failure During Store (Group 137) occurs during the store of program blocks and other data to the PLC. 'he stream of commands and data for storing program blocks and data starts with.a special start-of-sequence command and terminates with an end-of-sequence command. Ifcommunications with the programming device performing the store is interrupted or any other failure occurs which terminates the load, this fault is logged." As long as this fault is present in the system, the controller will not transition to RUN mode.

This fault is not automatically cleared on power-up; the user must specifically order the condition to be cleared.

The default fault action for this group is Fatal.

Error Code:

0 Correction:

Clear the fault and retry the download of the program or configuration file.

Run Mode Store Failure

'rror Code:

==

Description:==

Correction:

Error Code:

==

Description:==

Correction:

l Communications was lost, or power went out during a run mode store.

The new program was not activated and was deleted.

Perfomi the run mode store again.

This fault is diagnostic.

Communications was lost, or power went out during the cleanup of old blocks during a run mode store.

The new program is installed, and the remaining blocks were cleaned up.

None required.

This fault is informational.

Error Code:

3

==

Description:==

Communications was lost, or power went out in the middle of a tun mode store.

~,. Correction:

Delete and restore the program.

This error is fatal.

II A.

P lt ~

~

\\ y

~

I t

r,k 4

4l Qkt

3-24 Fault Explanation and Correction SECT<ON 3 I/O Fault Table Explanations GFK-0265 I.;

The'I/O fault table reports data about faults in three classifications.

In descending order, these fault classifications are:

~ Fault category.

~ Fault type.

~ Fault description.

All faults have a fault category, but a fault type and fault group may not be listed for every fault.

Additional information, referred to as Fault Specific Data, can be accessed by pressing CTRL-F while the I/O fault table is displayed on the programmer screen.

This section is organized by-fault category.

The following table enables you to quickly find a particular fault explanation in this section.

Each entry is listed as it appears on the programmer screen.

Fault Description Circuit Fault Discrete Fault Analog Fault Low-Level Analog Fault GENA Fault Loss of IOC Addition of IOC Loss of I/O Module Addition of I/O Module Extn I/O Module Loss of Block Addition of Block Extn Block I/O Bus Fault Module Fault

.IOC Software Fault IOC Hardware Failure Forced and Unforced Circuit Block Switch Page Number 3-27 3-28 3-29 3-30 3-30 3-31 3-31 3-31 3 32 3-32 3-32 3-33 3-33 3-33 3-34 3-34 3-35 3-35 3-35 The following table describes the information provided with each fault category.

P J'.

~u d

il l

t

Fault Explanation and Correction t

3-25 5

gFK-0265 Table 3-2. Fault Category Descriptions Fault Category Circuit Fault Loss of IOC Addition of IOC Loss of I/O Module Addition of I/O Module Extra I/O Module Loss of Block Addition of Block Extra Block I/O Bus Fault Global Memory Fault I'ault Type Discrete Fault Analog Fault Low-Level Analog Fault GENA Fault Remote I/O Scanner Fault Fault Not Specified Bus Fault Bus Outputs Disabled Fault Descri ptloa Loss of User Side Power Short Circuit in User Wiring Sustained Overcunent Low or No Current Flow Switch Temperature Too High Switch Failure Point Fault Output Fuse Blown Input Channel Low Alarm Input Channel High Alarm Input Channel Under Range Input Channel Over Range Input Channel Open Wite Output Channel Under Range Output Channel Over Range Invalid Data Expansion Channel Not Responding Input Channel Low Alarm Input Channel High Alarm Input Channel Under Range Input Channel Over Range Input Channel Open Wite Wiring Error Internal Fault Input Channel Shorted Invalid Data GENA Circuit Fault Remote I/O Scanner Circuit Fault Communications Lost Fault Specific Data Circuit Configuration

'ircuit Configuration

Circuit Configuration ~

Circuit Configuration

Circuit Configuration ~

Circuit Configuration ~

Circuit Configuration

'ircuit Configuration ~

Circuit Configuration

Circuit Configuration ~

Circuit Configuration

Circuit Configuration ~

Circuit Configuration

Circuit Configuration

Circuit Configuration

'ircuit Configuration

'ircuit Configuration ~

Circuit Configuration ~

'ircuit Configuration Circuit Configuration ~

Circuit Configuration ~

Circuit Configuration

Circuit Configuration

'ircuit Configuration ~

GENA Fault Byte 2 Byte 1:

Circuit Type Byte 2: I/O Type Timeout Unexpected State Unexpected Mail Status VME Bus Error Subnet Group Number Global Variable Name

"" Refer to table on next page.

, 3-26 Fault Explanation and Correction GFK-0265 Fault Category Fault Type Fault Descriptloa Table 3-2. Fault Category Descriptions

- Continued Fault Specific Data Module Fault IOC Software Fault IOC Hardware Failure Forced Circuit Unforced Circuit Refer to table below.

4.

Headend Fault EPROM or NVRAMFailure Calibration Memory Failure Shared Ram Failure Configuration MisMatch Watchdog Timeout Output Fuse Blown Block Configuration

Discrete/Analog Indication>>

Block Configuration Discrete/Analog Indication*

Three types of fault specific data occur in more than one fault category; they are block configuration, circuit configuration, and analog/discrete indication.

The codings are shown in the following table.

Value I

2 Description Circuit Configuration Circuit is an input.

Circuit is an output.

Circuit is an output with feedback.

Block Configuration Block is configured for inputs only.

Block is configured for outputs only.

Block is cotifigured for inputs and outputs (grouped block).

Discrete/Analog Indication Block is a discrete block.

Block is an analog block.

I

>>II wl II

pault Explanation and Correction 3-27 GFK-0265

'ICuit Fau1t The'ault-Category Circuit Fau)t has four fault types.

Three of the four fault types have fault descriptions.

Fault specific data is available for all faults.

Circuit fault applies specifically to Genius I/O modules.

"The default fault action is Diagnostic.

The following table describes the circuit fault category.

Table 3-3. Circuit Fault Category Descriptions Fault Category Circuit Fault Fault Type Discrete Fault Analog Fault Low-Level Analog Fault Remote Fault Fault Description Loss of User Side Power Short Circuit in User Wiring Sustained Overcuzzent Low or No Current Flow Switch Temperature Too High Switch Failure Point Fault Output Fuse Blown Input Channel Low Alarm Input Channel High Alarm Input Channel Under Range Input Channel Over Range Input Channel Open Wire Output Channel Under Range Output Channel Over Range Invalid Data Expansion Channel Not Responding Input Channel Low Alarm Input Channel High Alarm Input Channel Under Range Input Channel Over Range Input Channel Open Wire Wiring Error Internal Fault Input Channel Sbozted Invalid Data Remote I/O Scanner Fault Fault Specific Data Circuit Configuration C'ucuit Configuntion Circuit Configuration Circuit Configuration Circuit Configuntion Circuit Configuntion Circuit Configuration Circuit Configuntion Circuit Configuntion Circuit Configuration Circuit Configuration Circuit Configuntion Circuit Configuntion Circuit Configuration Circuit Configuration Circuit Configuntion Circuit Configuration Cizcuit Configuration Circuit Configuration Circuit Configurauon Circuit Configuration Circuit Configuntion Circuit Configuntion Circuit Configuzation Circuit Configuntion Circuit Configuration

rr u',)

4 f~<

3-28 Fault Explanation and Correction 6FK-0265 Discrete Fault Discrete Fault has eight fault descriptions.

More than one condition may be present in a particular reporting of the fault.

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Loss of User Side Power The Genius Bus Controller generates this error when there is a power loss on the field wiring side of a Genius I/O block.

Correct the power failure.

Short Circuit in User Wiring The Genius Bus Controller generates this error when it detects a short circuit in the user wiring of a Genius block. A short circuit is defined as a current level greater than 20 amps.

Fix the cause of the short circuit.

Sustained Overcurrent The Genius Bus Controller generates this error when it detects a sustained curtent level greater than 2 amps in the user wiring.

Fix the cause of the over curtent.

Low or No Current Flow The Genius Bus Controller generates this error when there is very low or no current flow in the user clrcult Fix the cause of the condition.

Switch Temperature Too High The Genius Bus Controller generates this error when the Genius block reports a high temperature in the Genius Smart Switch.

(I)

Ensure that the block is installed to provide adequate circulation.

(2)

Decrease the ambient temperature surrounding the block.

Switch Failute The Genius Bus Controller genetates this error when the Genius block reports a failure in the Genius Smart Switch.

Replace the Genius I/O block.

Point Fault The PLC operating system'generates this error when it detects a failure of a single I/O point. on a Genius I/O module.

Replace the Genius I/O block.

Output Fuse Blown The PLC operating system generates this error when it detects a blown fuse on a Genius I/O output block.

(I)

Determine and repair the cause of the fuse blowing, and replace the fuse.

(2)

Replace the block.

i gl pP'<<

1 c

t, p't

I

~

I

~

~ ~

~

e 0

~

0 I

~

~ I

~

OI. II

~

I

~

~ '

O'

~

~ ~

~

~ \\

I I I I

~

~ I I' I I

~

~ I

~

I '

~

I I

~ I OI. I.

~ I ~

~

I

I I

I

~ '

I

~

I I

~ I I

I I I '

I

~

~ I I

~

~ I I

I ~

I

I I

~ ~

~

I I

~

I I

I'

~

~ I I Il I

~ '

I

~ ~

I '

~

I

~

I

~ I

~

~ I I

~

I'

~.'

~

~ ~

~

I I

I '

~

I '

~

~ ~

I

~

I I

I

~ I I

~

I

~ ~

~ I

~

I ~

I '

I ~

~

~ ~ I

~

I

~

~ '

I I

~

~ I I

I

~

I '

~

I

~ I

~

I

~

~ '

~

~ I I

~ '

I IO I

I

~

~ '

~

I I

~ I

~

I ~

I I

I ~

I I ~

I '

~ I I

~

I '

~ I I

~

I I I I

~

I I

~

I

~

I I ~ '

~

I

~ '

~

~ '

~

I ~

I

~

I

~

I '

~ I

I 8'4

)

~

k4 a r pj's,s i"I t

t

~ 4 A'w JA I

I"

~RtW 1 i

IF 4 <<l 1)

3-30 Fault Explanation and Correction GFK-0265 Low-Level Analog Fault Low-Level Analog Fault has nine fault descriptions.

More than one condition may be present in a particular reporting of the fault.

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

Description:

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Input Channel Low Alarm The Genius Bus Controller generates this error when the Genius analog module reports a low alarm on an input channel.

Cotrect the condition causing the low alarm.

Input Channel High Alarm The Genius Bus Controller generates this error when the, Genius. analog module reports a high alarm on an input channel.

Correct the condition causing the high alarm.

Input Channel Under Range

'Ihe Genius Bus Controller generates this error when the Genius analog module reports an under-range condition on an input channel.

Conect the problem causing the condition.

Input Channel Over Range The Genius Bus Conuoller generates this error,.when the Genius analog module reports an over-range condition on an input channel.

Correct the problem causing the condition.

Input Channel Open Wire

- The Genius Bus Controller generates this error when the Genius analog module detects an open wire condition on an input channeL Correct the problem causing the condition.

Wiring Error Tbe Genius Bus Controller generates this enor when, the Genius analog module detects an improper RTD connections or thermocouple reverse juncuon fault.

Correct the problem causing the condition.

Internal Fault The Genius Bus Controller generates this error when the Genius analog module reports a.cold

, junction sensor. fault on a thermocouple block or an internal error in an RTD block.

Correct the problem causing the condition.

Input Channel Shorted Zhe Genius Bus Controller generates this error when itdetects an input channel shorted on a Genius RTD or Strain Gauge Block.

Conect the problem causing the condition.

Invalid Data The Genius Bus Controller generates this error when it detects invalid data from a Genius analog input block.

Correct the problem causing the condition.

GENA Fault The GENA Fault has no fault descriptions associated with it. GENA Fault Byte 2 is the first byte of the fault specific data.

==

Description:==

Correction:

The Genius I/O operating software generates this error when it detects a failure in a GENA block attached to the Genius I/O bus.

Replace tbe GENA block.

qt l pl 141 f'

'QS

ton Fault Explanation and Correction 3-31 Q65

'a a oFK.0265

) t,oss Of KOC The'Fault'Category Loss of IOC has no fault types or fault descriptions associated with it. The default fault action is Fatah Name:

==

Description:==

Correction:

Loss of or Missing IOC The PLC operating softwate genentes this error when it cannot communicate with an I/O Control-ler and an entry for the IOC exists in the configuntion file.

(1)

Verify that the module in the slot/bus address is the correct module.

(2)

Review the configuration file and verify that it is correct.

(3)

Replace the module.

(4)

Display the PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service, giving them aH the infomtation contained in the fault entry.

A.dditioo of IOC The Fault Category Addition of IOC has no fault types or fault descriptions associated with it. The default fault action for this category is Diagnostic.

Name:

==

Description:==

Correction:

Addition of IOC The PLC operating software genentes this error when an IOC which has been faulted returns to opention or when an IOC is found in the system and the configuntion file indicates that no IOC is to be in that slot.

(1) 'o 'action is'necessary iffaulted module is 'in a remote nck and is returning due to a remote nck power cycle.

(2)

Update the configuration file or remove the module.

Loss of UO Module The Fault Category Loss of I/O Module applies to Model 70 I/O discrete and analog modules; There are no fault types or fault descriptions associated with this category.

The default fault action is Diagnostic.

he Name:

==

Description:==

Correction; Loss of I/O Module The PLC openting software genentes this error when it detects that a Model 70 I/O module is no longer responding to commands from the PLC CPU, or when the configuntion file indicates an I/O module is to occupy a slot and no module exists in the slot.

(1)

Replace the module.

(2)

Correct the configuntion file.

(3)

Display the PLC fault table on the prognmmer.

Contact GE Fanuc PLC Field Service, giving them all the information contained in the fault enny.

'h pr'~4.

3~32 ddition of I/O Module Fault Explanation and Correction GFK-0265 The Fault Category Addition of IIO Module applies to Model 70 discrete and analog I/O modules.

There are no fault types or fault descriptions associated with this category.

The default fault action is Diagnostic.

Name:

==

Description:==

'orrection:

Addition of I/O Module The PLC operating software genentes this error when an I/O module which had been faulted returns to operation.

(1)

No action necessary ifmodule was removed or replaced, or remote rack was power cycled.

(2)

Update the configuration file or remove the module.

Extra I/O Module The Fault Category Extra I/O Module applies only to Model 70 I/O modules.

There are no fault types or fault descriptions associated with this category.

The default fault action is Diagnostic.

Name:

==

Description:==

Correction:

Extn I/O Module The PLC operating software generates this error when it detects a Model 70 I/O module in a slot which the configuration file indicates should be empty.

(1)

Remove the module.

(It may be in the wrong slot.)

(2)

Update and restore the configuntion file to include the extn module.

Loss of Block The Fault Category Loss of Block applies to Genius blocks.

There are no fault types or fauit descriptions 'associated with this category.

The default fault action is Diagnostic.

Name:

Descrip tion:

Cqzrection:

Name:

==

Description:==

Correction:

Loss of Block The PLC openting software generates this error when it receives a Loss of Block fault from a Genius Bus Controller, but the reason for the loss is unspecified.

(1)

Verify power and wiring to the block.

(2)

Replace the block.

Loss of Block - A/D Communications Fault The Genius I/O operating software genentes this error when it detects a loss of communications with a Genius I/O block.

(1)

Verify power and,serial bus wiring to the block.

(2)

Replace the block:

e

~ a 1

I p

Fault Explanation and Correction 3-33 opK-0265 gtldition of'Block The Fault'ategory Addition of Block applies only to Genius blocks.

There are no fault types or fault descriptions associated with this category.

The default fault action is Diagnostic.

Name:

==

Description:==

Correction:

Addition of Block

'Ihe Genius operating software generates this error when it detects that a Genius block which stopped communicating with the controller starts communicating again.

Informational only. None required.

Extra Block The Fault Category Extra Block applies only to Genius I/O blocks.

There are no fault types or fault descriptions associated with this category.

The default fault action is Diagnostic.

Name:

Extra Block

==

Description:==

The PLC operating software generates this error when it detects a Genius I/O block on the bus at a

serial bus address which the configuration file should not have a block.

Correction:

(l)

Remove or ieconfiguie the block. (It may be at the wrong serial bus address.)

(2)

Update and restore the configuration file to include the extra block.

I/O Bus Fault The Fault Category I/O Bus Fault has two fault types associated with it. The default fault action is Diagnostic.

Name:

==

Description:==

Correction:

Name:

prescription:

Correction:

Name:

Descriptioni Correction:

Bus Fault The Genius Bus Controller operating software generates this error when it detects a failure with a Genius I/O bus.

(1)

Deteanine the reason for the bus failure and correct it.

(2)

Replace the Genius Bus Controller.

Bus Outputs Disabled The Gemus Bus Controller operating software generates this error when it times out waiting for the PLC CPU to perform an I/O scan.

(1)

Replace tbe PLC CPU.

(2)

Display tbe PLC fault table on the programmer.

Contact GE Fanuc PLC Field Service, giving them all the information contained in tbe fault entry.

SBA Conflict The Genius Bus Controller detected a confiict between its serial bus address and that of another device on the bus.

Adjust one of the conQicting serial bus addresses.

A~

"'l('A>

I 3-34 Fault Explanation and Correction GFKW265 Module Fault The Fault Category Module Fault has one fault type, headend fault, and eight fault descriptions.

No fault specific data is present.

The default fault action for this category is Diagnostic.

Name:

Con6guration Memory Failure

==

Description:==

The Genius Bus Controller generates this error when it detects a failure in a Genius block's EEPROM or NVRAM.

Correction: 'eplace the Genius block's electronics module.

Name:

==

Description:==

Correction:

Name:

==

Description:==

Correction:

Name:

'Description:

Correction:

Calibration Memory Failure Tbe Genius Bus Controller generates this error when it detects a failure in a Genius block's calibration memory.

Replace tbe Genius block's electronics module.

Shared RAM Fault The Genius Bus Controller generates this error when it detects an error in a Genius block's shared RAlvL Replace the Genius block's electronics module.

Watchdog Timeout The PLC operating system generates this error when it:detects that a Model 70 input module watchdog timer has expired.

Replace the Model 70 input module.

Name:

==

Description:==

Correction:

Name:

Module Fault

==

Description:==

An internal failure has been detected in a module.

Correction:

Replace the affected module.

Output Fuse Blown The PLC operating system generates this error when it detects a blown fuse on a Model 70 output module.

(1)

Determine and repair tbe cause of the fuse blowing, and replace the fuse.

(2)

Replace the module.

IOC'Software Fault The Fault Category IOC Software Fault applies to any type of I/O Controller. There are no fault types or fault descriptions associated with it. The default fault action is Fatal.

Name:

-=

Description:

Correction:

Datagram Queue Full, Read/Write Queue Full Too many datagrams or read/write requests have been sent to the Genjtts Bus Controller.

Adjust tbe system to reduce the request rate to the Genius Bus Controller.

Name:

Response Lost

==

Description:==

The Genius Bus Controller is unable to respond to a received datagram or read/wnte request.

Correction:

Adjust the system to reduce the request rate to the Genius Bus Controller.

t~

+1 II-4'1

g

~

ction.'ault Explanation and Correction 3-35

<42 GFK-0265

'QC Hardware Failure The Fault Category IOC Hardware Failure has no fault types or fault descriptions., The default fault action is Diagnostic.

k's k's

==

Description:==

Correction:

The Genius operating software generates this error when it detects a hardware failure in the Bus Communication hardware or a baud rate mismatch.

(1)

Verifythat the baud rate set in the configuration Qle for the Genius Bus Controller agtees with the baud rate ptogrmimed in every block on the bus.

(2)

Change the configuration Qle and restore it, ifnecessary.

(3)

.Replace the Genius Bus Controller.

(4)

Selectively remove each block Rom the bus until the offending block is isolated and replace it.

ared ule a(put Forced and Unforced Circuit The Fault Categories Forced Circuit'and Unforced Circuit report point conditions and therefore are not technically faults.

They have no fault types or fault descriptions.

These reports occur when a Genius I/O point was forced or unforced with the Hand-Held Monitor..The default fault action is Informational.

Fault Specific Data contains data as shown below.

Byte Number Descri ption Block Configuration Analog/Disctete lnformauon

-'ypes Block Switch The Fault Category Block Switch has no fault types or fault descriptions.

The default fault action is Diagnostic.

Name:

Descrip tion:

Correction:

Block Switch The PLC genentes this ear when a Genius block on redundant Genius buses switches from one bus to another.

(1)

No action is required to keep the block operating.

(2)

The bus that the block switched fiom needs to be repaired.

(a)

Verify the bus wiring.

(b)

Replace the I/O controller.

(c)

Replace the Bus Switching Module (BSM).

4 III r

t

ML17291B094

Contents

Text

SUMMARY

Description:

Description:

Navigation menu

ML17291B094

Text

SUMMARY

Description:

Description:

Navigation menu

Search