ML24155A222
| ML24155A222 | |
| Person / Time | |
|---|---|
| Site: | Prairie Island  |
| Issue date: | 05/28/2024 |
| From: | Huber G Northern States Power Company, Minnesota, Xcel Energy |
| To: | Office of Nuclear Reactor Regulation |
| Shared Package | |
| ML24155A220 | List: |
| References | |
| Download: ML24155A222 (1) | |
Text
Xcel Energy Prairie Island Nuclear Generating Plant Methodology Evaluation Report for Elimination of Response Time Testing Prairie Island Reactor Trip System Rev. 1 Issue Date: May 28, 2024
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page i Methodology Evaluation Report for Elimination of Response Time Testing Prairie Island Reactor Trip System Approvals APPROVALS Function Name and Signature Date Preparer George Huber Reviewer Amartej Luthra Approver George Huber Digitally signed by GWH Signature Date: 2024.05.28 11:38:19 -04'00' Amartej S Luthra DN: cn=Amartej S Luthra, email=amartej.s.luthra@sargentlundy.com, c=US Date: 2024.05.28 11:03:28 -05'00' Digitally signed by GWH Signature Date: 2024.05.28 12:16:15 -04'00'
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page ii Methodology Evaluation Report for Elimination of Response Time Testing Prairie Island Reactor Trip System Certification I hereby certify this plan, specification, or report was prepared by me or under my direct supervision and that I am a duly Licensed Professional Engineer under the laws of the State of Minnesota.
Print Name:
George W. Huber, Jr.
Signature:
Date See Signature License No: 53608 Digitally signed by GWH Signature Date: 2024.05.28 12:17:08 -04'00'
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 1 of 19
- 1.
SUMMARY
DESCRIPTION Prairie Island Nuclear Generating Plant (PINGP) Technical Specifications (TS) define REACTOR TRIP SYSTEM (RTS) RESPONSE TIME as: The RTS RESPONSE TIME shall be that time interval from when the monitored parameter exceeds its RTS trip setpoint at the channel sensor output until opening of a reactor trip breaker. The response time may be measured by means of any series of sequential, overlapping, or total steps so that the entire response time is measured. PINGP TS Surveillance Requirement SR 3.3.1.16 is, Verify RTS RESPONSE TIME is within limits, and is applied to the following Reactor Trips in accordance with TS Table 3.3.1-1:
- Function 2.a, Power Range High Neutron Flux
- Function 2.b, Power Range Low Neutron Flux
- Function 3.a, Power Range High Positive Rate
- Function 3.b, Power Range High Negative Rate***
- Function 5, Source Range High Neutron Flux***
- Function 6, Overtemperature Delta Temperature
- Function 7, Overpower Delta Temperature
- Function 8.a, Pressurizer Low Pressure*
- Function 8.b, Pressurizer High Pressure**
- Function 10, Reactor Coolant Low Flow*
- Function 13, Steam Generator Lo-Lo Level**
- Not in Technical Specifications but currently tested due to NRC Commitment
- Not in Tech Specification and not currently tested
- 2. SYSTEM DESIGN AND OPERATION The RTS and Reactor Protection System (RPS) initiate a unit shutdown, based on the values of selected unit parameters, to protect against violating the core fuel design limits and Reactor Coolant System (RCS) pressure boundary during Anticipated Operational Occurrences (AOOs) and to assist the Engineered Safety Feature Actuation System (ESFAS) in mitigating accidents.
Response Time Testing (RTT) verifies that the individual channel or train actuation response times are less than or equal to the maximum values assumed in the accident analysis. The RTT acceptance criteria are under licensee control. Individual component response times are not modeled in the accident analyses. The analysis models the overall or total elapsed time from the point at which the parameter exceeds the trip setpoint value at the sensor to the point at which the equipment reaches the required functional state (e.g., control and shutdown rods fully inserted in the reactor core).
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 2 of 19 Prairie Island was constructed with a Westinghouse Nuclear Instrumentation System (NIS) and Relay Reactor Protection System (RRPS) which is directly applicable to components described in TSTF-569 Revision 2 Revise Response Time Testing Definition. and WCAP 14036-P-A, Revision 1, Elimination of Periodic Protection Channel Response Time Tests.
The Prairie Island Process Protection System (PPS) was originally supplied with Foxboro H-Line equipment. This equipment was replaced with Curtiss-Wright Scientech NUS Modules which were reverse engineered replacements for the original H-Line Modules. The NUS Modules are used to retrofit both Foxboro H-Line and Hagan 7100 Modules and use similar circuitry. The H-Line equipment was not included in WCAP-14036-P-A as it preceded Hagan 7100 systems. The NRC implemented a program making response time testing (RTT) a requirement in 1975, whereas the Prairie Island Units started operation in 1973 and 1974.
Prairie Island Nuclear Generating Plant currently utilizes Westinghouse DB-50 Reactor Trip Breakers. Similar to WCAP-14036-P-A the Reactor Trip Breakers are NOT included in this methodology and will remain subject to periodic response time testing.
- 3. METHODOLOGY FOR EVALUATING THE ELIMINATION OF RESPONSE TIME TESTING FOR PINGP PPS MODULES For the Nuclear Instrumentation and Relay Reactor Protection System, TSTF-569 Revision 2 Attachment 1 Methodology 2 applies directly to Prairie Island. The bounding response times for NIS and RRPS as identified in WCAP-14036-P-A will be evaluated in accordance with the NRC approved methodology as discussed in Attachment 1 to TSTF-569.
The Prairie Island Process Protection System was not previously evaluated by TSTF-569, Revision 2, nor WCAP-14036-P-A. However, due to similarity between Foxboro H-Line/Curtiss-Wright Scientech NUS and the Hagan 7100 Line of equipment, NSPM proposes to use a methodology similar to that described in TSTF-569, Revision 2,, Methodology 2 (hereafter referred to as Methodology 2).
Methodology 2 applies to protection channels for Westinghouse plants. Prairie Island is a Two Unit Westinghouse 2 Loop Pressurized Water Reactor. The Foxboro H-Line or Curtiss-Wright Scientech NUS Line equipment is the electronic signal processing hardware between the primary sensor and the relay trip logic.
3.1. Actions for this Methodology:
- 1) Analyze the system modules for their function in providing the protection function.
System Modules which do not contribute to the protection functions such as modules used only for test or for interface with non-safety systems will be excluded.
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 3 of 19 Instrument Block Diagrams for the Process Protection System at Prairie Island were reviewed, and modules identified that perform a protection function. These components are identified on Attachments 1-5. Note that all 4 Protection Channels for both Units 1 and 2 utilize similar components. Markups are provided for Channel I (RED) for Unit 1 only. The markups also include the NUS (or Foxboro) Model Number for the applicable module. Components that do not provide a Reactor Trip Function are crossed out with an X. Note that sensors are marked N/A because they are not within the PINGP definition of RTS RESPONSE TIME.
- 2) An FMEA will be performed on the modules that perform a protection function to determine whether individual component degradation has no impact on the response time or whether the individual components may contribute to the system response time degradation. The FMEA should include the following:
- a. Identify any components on the cards and modules that are sensitive to response time
- b. Evaluate the impact on response time if the component fails or degrades
- c. Determine whether the degraded component can be detected via a channel calibration
- d. Identify the components that impact a channel calibration, but not the response time.
Xcel Energy contracted Curtiss-Wright Scientech to perform a Failure Modes and Effects Analysis (FMEA) on Component Types identified as performing a protection function above. The FMEA is documented in Attachment 6.
The conclusions of the FMEA are:
a) Similar to WCAP-14036-P-A the Curtiss-Wright FMEA identified capacitors and resistors as the dominant response time sensitive components a conservative increase of 50% in capacitance was used to determine the maximum change in response time for capacitor degradation. Resistors were assumed to degrade to as much as 200% of the nominal resistance, which is a conservative increase based on engineering judgement.
b) The Curtiss-Wright FMEA evaluated the impact on response time if components fail or degrade.
c) The Curtiss-Wright FMEA determined that many failures result in a change detectable during a channel calibration while others may affect the response time of the component.
d) The Curtiss-Wright FMEA identifies components affecting channel calibration, but not the response time.
mV/I Amplifier (RTL501):
Analysis predicted a response time increase of 27.94ms above a baseline of 14.39ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 4 of 19 calibration. The measured baseline response times were 56.0ms for a rising transient and 35.5ms for a falling transient. During testing, changes in the resistance values of R13.3, R13.4, RN1C, RN1D, R51 and R52 combined to add 49ms to the modules falling transient response. The modules rising transient response increased by 47ms. However, all tests (including the baseline) were performed using an RTL500 module. The RTL501 module does not include the R52/C22 filter. The contribution of that filter alone was estimated at 36.6ms.
Changes in the capacitance values of C2, C4, C11, C15, C20 and C21 added 17ms to the modules rising response time and 13ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1. From Table 5-1 a bounding time of 65ms will be used.
Time Domain Module (TMD500): Similar to WCAP-14036-P-A (p.4-1), time domain modules are dynamic modules which are calibrated statically (zero and gain) and dynamically (lead and lag time constants). Because any degradation in components leading to changes in response time would be identified during dynamic calibration, failures of these modules were excluded from the FMEA.
Similar to WCAP-14036-P-A (p.4-4 used response time of 7100 Function Generator), a conservative bounding response time of 50 msec was applied to these modules.
Loop Power Supply (LPS500): Because the loop power supply (LPS500) has no signal input, it does not have response time characteristics like those of the other modules. The only response time that can be used to characterize the LPS500 is one related to the ability of the module to achieve a stable regulated output following a load change. However, with respect to the rest of the instrument loop, it does not matter whether that response time is long or short.
The time required for the LPS500 to transition from one stable output to another stable output after a load change would have no impact upon the time required for any of the other modules in the loop to respond to changes in their input signals. The output of the LPS500 is continuously monitored with respect to its effects on the associated loop and it does not depend upon any type of transient input. Since there is no critical failure mechanism of the LPS500 that will not be detectable, it will not be further evaluated in this report. The Foxboro 610AC-O Loop Power Supplies used in RCS Flow Loops are simpler versions of the NUS LPS500 Loop Power Supplies and will similarly have no impact on response time of the associated loop. Similar to WCAP-14036-P-A (p.4-5 used response time of 7100 Power Supply), a conservative bounding response time of 5msec was applied to these modules.
Summator (MTH500):
Analysis predicted a response time increase of 5.4ms above a baseline of 3.0ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 2.765ms for a rising transient and 3.215ms for a falling transient. During testing, changes in the resistance values
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 5 of 19 of R8 and RN7 combined to add 2.675ms to the modules falling transient response. The modules rising transient response increased by 2.215ms.
Changes in the capacitance values of C3.1, C54, C14 and C58 added 4.735ms to the modules rising response time and 5.525ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1. From Table 5-1 a bounding time of 12ms will be used.
Function Generator (SGU501):
Analysis predicted a response time increase of 51.20ms above a baseline of 26.51ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 41.0ms for a rising transient and 14.8ms for a falling transient. Note that these values are determined by the test parameters since the configuration of the module produces a gull-wing output. The same parameters were used for subsequent testing to determine the changes due to postulated failures and not to changes in the test itself. During testing, changes in the resistance values of F1.1, R14.1 R8, and RN6 combined to add 9.8ms to the modules falling transient response. The modules rising transient response increased by 49.6ms.
Changes in the capacitance values of VR1.1, R15.1, C3.1, C103, C403, C32, C33, C6 and C29 added 49.8ms to the modules rising response time and 13.6ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1. From Table 5-1 a bounding time of 141ms will be used.
Comparator (SAM503, DAM503):
Analysis predicted negligible change to the response time due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 385s for a trip and 88.5s for a reset. During testing, changes in the resistance values of R104, R105, R107 and R108 combined to add 28s to the modules trip time. The modules reset time increased by 1s. A change in the capacitance value of C106 added 45.5s to the modules trip time and 0.7s to the modules reset time. The baseline and worst-case fault response times are summarized in Table 5-1. From Table 5-1 a bounding time of 1ms will be used.
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 6 of 19 Table 5-1 is from NUS-G091FA CWND FMEA for Series 500 Modules Time Response Assessment Rev. 1 (see Attachment 5 for more information)
- 3) If the individual component potentially impacts the system response time, perform testing to determine the magnitude of the response time degradation.
If required to be performed, the testing, which verifies and further quantifies the results of the FMEA should confirm the following:
- a. Measure the response time of the calibrated production modules and provide response time base-line data
- b. Measure the response time and obtain calibration data for the card or module if the component identified to have an impact on response time is degraded
- c. Measure the response time of a simulated protection channel from input to output with the component degraded.
OR Determine a bounding response time limit for the system or component if the individual component does not impact the system response time. The results of the FMEA must conclude that component degradation will not increase the response time beyond the bounding response time without the response time degradation being detected by other periodic surveillance tests, such as channel checks and channel calibrations. This is an alternative to the action of Step 3. Steps 1 and 2 are still required.
- a. The Curtiss-Wright FMEA documents Baseline response time for each module type used in Prairie Islands Process Protection System.
- b. Degraded components were substituted in each module type to identify impact on response time and confirm ability to identify degradation (or not) during channel calibration. Impact on response times is documented in the Curtiss-Wright FMEA.
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 7 of 19
- c. Curtiss-Wright provided a bounding response time for each type of module used in the Prairie Island Process Protection System based on testing using degraded components. This bounding response time was combined with other modules/components in the loop to determine the response time for the overall protection channel which is documented below.
3.2. Bounding Response Times from FMEA The FMEA performed by Curtiss Wright Scientech (Attachment 6) identified Bounding response times for individual modules utilized in the PINGP RPS (Total Response time rounded up to the nearest millisecond). WCAP-14036-P-A (p.4-21) identified bounding response times of 1msec for NIS Isolation Amplifier (qu, ql) in section 4.6 and 200msec for Relay Logic in section 4.9 (p.4-25). The summation of response times for individual modules within a loop were utilized to determine a Bounding Time Delay for each RPS Reactor Trip Function using Attachments 1 through 4.
Low Pressurizer Pressure The Low Pressurizer Pressure Reactor Trip Loop is shown on Attachment 1.
Pressurizer Pressure Signal is reliant on Loop Power Supply PQ-429 (NUS Model LPS500). The Pressurizer Pressure signal is processed through PM-429B (NUS Model TMD500). The signal is compared to Trip Setpoint by module PC-429E (NUS Model SAM503 Comparator). The output of the comparator is combined with other channels in a 2 out of 4 coincidence in the Relay Reactor Protection System for the total response time.
Low Pressurizer Pressure: PQ-429 (5msec) + PM-429B (50msec) + PC-429E (1msec) + Relay Logic (200msec) = 256msec High Pressurizer Pressure The High Pressurizer Pressure Reactor Trip Loop is shown on Attachment 1.
Pressurizer Pressure Signal is reliant on Loop Power Supply PQ-429 (NUS Model LPS500). The signal is compared to Trip Setpoint by module PC-429A (NUS Model SAM503 Comparator). The output of the comparator is combined with other channels in a 2 out of 3 coincidence in the Relay Reactor Protection System for the total response time.
High Pressurizer Pressure: PQ-429 (5msec) + PC-429A (1msec) + Relay Logic (200msec) = 206msec Overtemperature Delta Temperature The Overtemperature Delta Temperature (OTdT) Trip receives input from Pressurizer Pressure (Attachment 1) the only component contributing to Time Response is the Power Supply (PQ-429 NUS Model LPS500). The remainder of the OTdT Loop is shown on Attachment 2. Thot and Tcold temperature inputs are applied through TT-401A and TT-401B (NUS Model RTL501 mV/I converter) simultaneously so only a single time delay is assumed. Next the derivation of Delta-
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 8 of 19 T and Tavg occurs simultaneously by TM-405R and TM-401BB (NUS Model TMD500 Time Domain Modules) so only a single time delay is assumed. The Upper and Lower Neutron Flux Signals are provided from the NIS system through an Isolation Amplifier simultaneously so only a single time delay is assumed. The flux signals then are processed by TM-401T (NUS Model SGU501 Function Generator).
The Tavg, Pressurizer Pressure and Delta-Flux Signals are combined by module TM-401B (NUS Model TMD500 Time Domain Module) to develop the OTdT Setpoint. The OTdT Setpoint is compared to the Delta-T Signal by TC-405C/D (NUS Model DAM503 Comparator) to initiate a Channel Trip Signal. The output of the comparator is combined with other channels in a 2 out of 4 coincidence in the Relay Reactor Protection System for the total response time.
OTdT: PQ-429 (5msec) + TT-401A(B) (65msec) + TM405R (TM-401BB) (50msec) +
TM-401B (50msec) + TM401T (141msec) + TC-405C/D (1msec) + qu(l)
(1msec) + Relay Logic (200msec) = 513msec Overpower Delta Temperature The Overpower Delta Temperature (OPdT)Trip Loop is shown on Attachment 2.
Thot and Tcold temperature inputs are applied through TT-401A and TT-401B (NUS Model RTL501 mV/I converter) simultaneously so only a single time delay is assumed. Next the derivation of Delta-T and Tavg occurs simultaneously by TM-405R and TM-401BB (NUS Model TMD500 Time Domain Modules) so only a single time delay is assumed. The Tavg Signal is provided to TM-401O (NUS Model TMD500) to develop f(Tavg). F(Tavg) is processed through summer TM-401V (NUS Model MTH500 Summator) to develop the OPdT Setpoint. The OPdT Setpoint is compared to the Delta-T Signal by TC-405A/B (NUS Model DAM503 Comparator) to initiate a Channel Trip Signal. The output of the comparator is combined with other channels in a 2 out of 4 coincidences in the Relay Reactor Protection System for the total response time.
OPdT: TT-401A(B) (65msec) + TM405R (TM-401BB) (50msec) + TM-401O (50msec) + TM401V (12msec) + TC-405A/B (1msec) + Relay Logic (200msec) = 378 msec Low Low Steam Generator Level The Low Low Steam Generator Level Reactor Trip Loop is shown on Attachment 3.
Steam Generator Level Signal is reliant on Loop Power Supply LQ-461 (NUS Model LPS500). The signal is compared to Trip Setpoint by module LC-461A/B (NUS Model DAM503 Comparator). The output of the comparator is combined with other channels in a 2 out of 3 coincidences in the Relay Reactor Protection System for the total response time.
Low Low Steam Generator Level: LQ-461 (5msec) + DAM503 (1msec) + Relay Logic (200msec) = 206msec
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 9 of 19 Low Reactor Coolant Flow The Low Reactor Coolant Flow Reactor Trip Loop is shown on Attachment 4.
Reactor Coolant Flow Signal is reliant on Loop Power Supply FQ-411 (Foxboro Model 610AC-O). The signal is compared to Trip Setpoint by module FC-411 (NUS Model SAM503 Comparator). The output of the comparator is combined with other channels in a 2 out of 3 coincidence in the Relay Reactor Protection System for the total response time.
Low RC Flow: FQ-411 (5msec) + SAM503 (1msec) + Relay Logic (200msec) =
206msec Power Range High Neutron Flux The Power Range High Neutron Flux Trip is shown on Attachment 5. From WCAP-14036-P-A section 4.6 and 4.9 applicable Bounding Response Times are: Summing and Level Amplifier NM-310 (1ms), Bistable Relay Driver NC-306 (65ms) and Relay Logic (200ms). 1ms + 65ms + 200ms = 266ms Power Range Low Neutron Flux The Power Range Low Neutron Flux Trip is shown on Attachment 5. From WCAP-14036-P-A section 4.6 and 4.9 applicable Bounding Response Times are: Summing and Level Amplifier NM-310 (1ms), Bistable Relay Driver NC-305 (65ms) and Relay Logic (200ms). 1ms + 65ms + 200ms = 266ms Power Range High Positive Rate The Power Range High Positive Rate Trip is shown on Attachment 5. From WCAP-14036-P-A section 4.6 and 4.9 applicable Bounding Response Times are: Summing and Level Amplifier NM-310 (1ms), Lag Network NM-311 (135ms) Bistable Relay Driver NC-303 (65ms) and Relay Logic (200ms). 1ms + 135ms + 65ms + 200ms = 401ms Power Range High Negative Rate The Power Range High Negative Rate Trip is shown on Attachment 5. From WCAP-14036-P-A section 4.6 and 4.9 applicable Bounding Response Times are: Summing and Level Amplifier NM-310 (1ms), Lag Network NM-311 (135ms) Bistable Relay Driver NC-301 (65ms) and Relay Logic (200ms). 1ms + 135ms + 65ms + 200ms = 401ms As this trip function has no specified Response Time it will be eliminated.
The Prairie Island Updated Safety Analysis Report Section 14.3.1, [Transient Analysis]
Calculation Methods and Input Parameters, identifies Time Delay for Reactor Trip Signals assumed in the safety analysis.
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 10 of 19 When comparing the Bounding Response Time from WCAP-14036-P-A for the Power Range High Positive Rate Trip to the USAR Time Delay and adding 100ms for the Reactor Trip Breaker time to operate a 1ms non-conservatism was identified.
Westinghouse was contracted to evaluate the Power Range High Positive Rate Trip time delay and determined that 0.6s is acceptable [Ref. NSPM-TANL-TM-AA-000005, Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2 - for License Amendment Request - Rev.
0]
The USAR time delay is compared to the bounding time delay from the FMEA in the following table:
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 11 of 19 Reactor Trip Function Time Delay (USAR) seconds FMEA Bounding Time Delay*
seconds Function 2.a, Power Range High Neutron Flux 0.45 0.266 Function 2.b, Power Range Low Neutron Flux 0.45 0.266 Function 3.a, Power Range High Positive Rate 0.60**
0.401 Function 3.b, Power Range High Negative Rate N/A N/A Function 5, Source Range High Neutron Flux N/A N/A Function 6, Overtemperature Delta Temperature 6.0 0.513 Function 7, Overpower Delta Temperature 6.0 0.378 Function 8.a, Low Pressurizer Pressure 1.0 0.256 Function 8.b, High Pressurizer Pressure 1.0 0.206 Function 10, Low Reactor Coolant Loop Flow 1.2 0.206 Function 13, Low Low Steam Generator Level 1.5 0.206 N/A indicates Not Credited in Accident Analysis
- Response time of the Reactor Trip Breaker of <100msec is not accounted in the Bounding Time Delay above.
- NSPM-TANL-TM-AA-000005, Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2 - for License Amendment Request - Rev. 0 3.3. Conclusion Based on the results of Failure Modes and Effects Analysis and the results of testing with degraded components, justification is established for relaxing the periodic response time test of the protection channel for reactor trip functions processed by the RTS equipment. In place of periodic test data, generic bounding response times were developed for protection rack response time components for use in the determination of total function response time as required by Technical Specifications.
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 12 of 19
- 4. Attachments:
- XH-1-541 Instrument Block Diagram Pressurizer Pressure Rev.78 - XH-1-543 Instrument Block Diagram Delta-T Tavg Rev.76 - XH-1-549 Instrument Block Diagram Steam Generator Level Rev. 77 - XH-1-553 Instrument Block Diagram Reactor Coolant Flow Rev. C - XH-1-708 Power Range N-41 Functional Block Diagram Rev. 10 - NUS-G091FA CWND FMEA for Series 500 Modules Time Response Assessment Rev. 0 - NSPM-TANL-TM-AA-000005, Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2 - for License Amendment Request - Rev. 0
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 13 of 19
- XH-1-541 Instrument Block Diagram Pressurizer Pressure Rev.78
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 14 of 19
- XH-1-543 Instrument Block Diagram Delta-T Tavg Rev.76
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 15 of 19
- XH-1-549 Instrument Block Diagram Steam Generator Level Rev.77
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 16 of 19
- XH-1-553 Instrument Block Diagram Reactor Coolant Flow Rev. C
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 17 of 19
- XH-1-708 Power Range N-41 Functional Block Diagram Rev. 10
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 18 of 19
- NUS-G091FA CWND FMEA for Series 500 Modules Time Response Assessment Rev. 1
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 1 of 46 Failure Modes & Effects Analysis For Series 500 Modules, Time Response Assessment Prairie Island Nuclear Generating Plant NUS-G091FA Revision 1 CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment CURTISS-WRIGHT Rev.1 Page 2 of 46 NUS-G091FA Issue Record Issued for use-DEC 16 2022 NLH Reason for Revision: Original Issue Rev. 0 Prepared by / Date K. A. Ve*uvy Reviewed by / Date Dave/
Reviewed by QA / Date Vcwrtiv3rowrv 12/16/22 14DEC22 12 22 Issued for use-l- 1 *1.-23 A!L H Reason for Revision: Incorporated customer feedback. Removed QA signature.
Rev. 1 Prepared by / Date Reviewed by / Date
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 3 of 46 Table of Contents
1.0 INTRODUCTION
....................................................................................................................................... 5 1.1 Scope.............................................................................................................................................. 5 1.2 Approach......................................................................................................................................... 6 1.3 General Analyses............................................................................................................................ 7 2.0 EQUIPMENT............................................................................................................................................. 7 2.1 mV/I Amplifier.................................................................................................................................. 7 2.2 Summator........................................................................................................................................ 9 2.3 Function Generator....................................................................................................................... 11 2.4 Comparator Module....................................................................................................................... 14 3.0 ANALYSIS............................................................................................................................................... 15 3.1 Assumptions.................................................................................................................................. 15 3.2 mV/I Amplifier................................................................................................................................ 15 3.2.1 Failure Mechanisms............................................................................................................ 15 3.2.2 Failure Effects..................................................................................................................... 16 3.2.3 Overall System.................................................................................................................... 18 3.3 Summator...................................................................................................................................... 18 3.3.1 Failure Mechanisms............................................................................................................ 18 3.3.2 Failure Effects..................................................................................................................... 19 3.3.3 Overall System.................................................................................................................... 21 3.4 Function Generator....................................................................................................................... 21 3.4.1 Failure Mechanisms............................................................................................................ 21 3.4.2 Failure Effects..................................................................................................................... 21 3.4.3 Overall System.................................................................................................................... 23 3.5 Comparator Module....................................................................................................................... 23 3.5.1 Failure Mechanisms............................................................................................................ 23 3.5.2 Failure Effects..................................................................................................................... 24 3.5.3 Overall System.................................................................................................................... 26 4.0 TEST........................................................................................................................................................ 26 4.1 Process......................................................................................................................................... 26 4.2 mV/I Amplifier................................................................................................................................ 26 4.2.1 Equipment Tested............................................................................................................... 26 4.2.2 Setup................................................................................................................................... 26 4.2.3 Baseline.............................................................................................................................. 27 4.2.4 Resistance.......................................................................................................................... 27 4.2.5 Capacitance........................................................................................................................ 29 4.2.6 Final Time Response.......................................................................................................... 29 4.3 Summator...................................................................................................................................... 30 4.3.1 Equipment Tested............................................................................................................... 30 4.3.2 Setup................................................................................................................................... 30 4.3.3 Baseline.............................................................................................................................. 30 4.3.4 Resistance.......................................................................................................................... 31 4.3.5 Capacitance........................................................................................................................ 32 4.3.6 Final Time Response.......................................................................................................... 32 4.4 Function Generator....................................................................................................................... 33 4.4.1 Equipment Tested............................................................................................................... 33 4.4.2 Setup................................................................................................................................... 33 4.4.3 Baseline.............................................................................................................................. 34 4.4.4 Resistance.......................................................................................................................... 35 4.4.5 Capacitance........................................................................................................................ 38 4.4.6 Final Time Response.......................................................................................................... 38 4.5 Comparator Module....................................................................................................................... 40 4.5.1 Equipment Tested............................................................................................................... 40 4.5.2 Setup................................................................................................................................... 40 4.5.3 Baseline.............................................................................................................................. 41 CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 4 of 46 4.5.4 Resistance.......................................................................................................................... 42 4.5.5 Capacitance........................................................................................................................ 43 4.5.6 Final Time Response.......................................................................................................... 43
5.0 CONCLUSION
S...................................................................................................................................... 44 5.1 mV/I Amplifier (RTL501)................................................................................................................ 44 5.2 Summator (MTH500)..................................................................................................................... 44 5.3 Function Generator (SGU501)...................................................................................................... 45 5.4 Comparator (SAM503, DAM503).................................................................................................. 45 5.5 Summary....................................................................................................................................... 45
6.0 REFERENCES
........................................................................................................................................ 46 List of Figures Figure 2-1:
Input Section in MBA-E156PA-1...........................................................................................9 Figure 2-2:
Input Stage in SGU501...................................................................................................... 12 Figure 3-1:
RTL501 Functional Block Diagram.................................................................................... 16 Figure 3-2:
MTH500 Functional Block Diagram................................................................................... 18 Figure 3-3:
MTH500 Driver Simplified Circuit....................................................................................... 20 Figure 3-4:
SGU501 Functional Block Diagram................................................................................... 21 Figure 3-5:
Comparator Functional Block Diagram.............................................................................. 23 Figure 4-1:
RTL500 Baseline Time Response..................................................................................... 27 Figure 4-2:
RTL500 Failed Resistors Time Response......................................................................... 29 Figure 4-3:
All RTL500 Failed Components Time Response.............................................................. 30 Figure 4-4:
MTH500 Baseline Time Response.................................................................................... 31 Figure 4-5:
MTH500 Failed Resistors Time Response........................................................................ 32 Figure 4-6:
All MTH500 Failed Components Time Response............................................................. 33 Figure 4-7:
SGU501 Baseline Time Response, Rising Input............................................................... 34 Figure 4-8:
SGU501 Baseline Time Response, Falling Input.............................................................. 35 Figure 4-9:
SGU501 Failed Resistors Time Response, Rising Input................................................... 37 Figure 4-10:
SGU501 Failed Resistors Time Response, Falling Input.................................................. 37 Figure 4-11:
All SGU501 Failed Components Time Response, Rising Input....................................... 39 Figure 4-12:
All SGU501 Failed Components Time Response, Falling Input........................................ 39 Figure 4-13:
DAM503 Baseline Time Response, Rising Input............................................................... 41 Figure 4-14:
DAM503 Baseline Time Response, Falling Input.............................................................. 41 Figure 4-15:
DAM503 Failed Resistors Time Response, Rising Input................................................... 42 Figure 4-16:
DAM503 Failed Resistors Time Response, Falling Input.................................................. 43 Figure 4-17:
All DAM503 Failed Components Time Response, Rising Input........................................ 44 Figure 4-18:
All DAM503 Failed Components Time Response, Falling Input....................................... 44 List of Tables Table 2-1:
Summer Gain Jumper Settings.................................................................................................... 13 Table 5-1:
Response Times.......................................................................................................................... 45 CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 5 of 46
1.0 INTRODUCTION
1.1 Scope To eliminate Response Time Testing (RTT) of applicable instrument loops, Xcel Energy, at the Prairie Island Nuclear Generating Plant (PINGP), Units 1 and 2, has chosen to determine by analysis and testing the effects of equipment failure on total response time for a protective function. Given a maximum response time for each of the instruments within a loop, and knowledge of the instrument interactions, Xcel Energy can establish a maximum response time value for the instrument loop. By demonstrating that no instrument within the loop can fail in a manner that, without being detected, will increase the total loop response time beyond some allowed maximum, Xcel Energy can effectively eliminate the need for RTT of the loop.
Xcel Energy has elected to use program elements presented to the Nuclear Regulatory Commission (NRC) by the Westinghouse Owners Group (WOG) in WCAP-14036-P-A [Ref. 6.1]. At PINGP, the applicable instrument loops are in the Reactor Protection System (RPS). Based upon the limits bounding the applicable instrument loops, Xcel Energy can establish bounding response time values(1) for individual modules within the loops.
Module types that were included in the analysis, by function, are low signal (mV/I) amplifiers, comparators, summators, loop power supplies, multiplier/divider modules, and function generators. These correlate with the modules provided to PINGP as follows:
mV/I Amplifier RTL500, RTL501 Summator MTH500 Function Generator SGU501 Comparator Module DAM502, SAM503, DAM503 Power Supply LPS500 Multiplier/Divider CMM500 The WCAP specifically excluded signal isolators because of their similarities to the summators. The OCA500 module is a signal isolator that can be excluded on a similar basis. It includes only an Input Section and an Output Section, both of which are almost identical to those in the MTH500. One of the ways in which they differ is that the summator can include as many as four channels in the Input Section, versus the single channel in an OCA500. The other way in which they differ is that the voltage-to-current (V/I) converter in the OCA500 Output Section is configured to receive a 0 to 5 VDC input, through a voltage divider, versus the 0 to 10 VDC entering the converter in the MTH500. This is achieved through specific jumper configurations, as well as through the addition of a single resistor in the OCA500. Neither would affect the module time response.
The WCAP also specifically excluded lead/lag modules by stating, The time response of dynamic function (i.e., lead-lag, etc.) cards is verified during periodic calibration testing and, therefore, these cards were not included in the program. The TMD500 modules can be excluded on a similar basis.
Of those modules listed above, others can also be excluded from analysis and test.
The RTL500 and DAM502 modules are not used in any system that requires RTT.
Because the loop power supply (LPS500) has no signal input, it does not have response time characteristics like those of the other modules. The only response time that can be used to characterize the LPS500 is one related to the ability of the module to achieve a stable regulated output following a load change. However, with respect to the rest of the instrument loop, it does not matter whether that response time is long or short. The time required for the LPS500 to transition from one stable output to another stable output after a load change would have no impact upon the time required for any of the other modules in the loop to respond to changes in their input signals. The output of the LPS500 is continuously monitored with respect to its effects on the associated loop and it does not depend upon any type of transient input. Since there is no critical failure mechanism of the LPS500 that will not be detectable, it will not be further evaluated in this report.
1 This is the amount of time by which module response time can increase due to component degradation before impacting system response times assumed in safety analyses.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 6 of 46 To date, PINGP has not received any CMM500 modules. The CMM500 is a variation of the MBA500.
As described in NUS-A045MA, Section 1.2.2, the CMM500 can be configured to perform any of several functions or combinations of functions. Component loading and circuit interconnections are determined by the functions required. Consequently, the CMM500 cannot be evaluated for any specific configuration. Evaluations for specific configurations can be added to this evaluation if required later.
The Westinghouse Hagan (7100 system) Multiplier/Divider discussed in the WCAP was designed to calculate either (IN1*IN2)/IN3 or SQRT(IN1*IN2), as determined by rear panel patching. These are only two of the possible functions for which the CMM500 can be designed.
1.2 Approach The basic approach of this FMEA will be first to identify those components that can directly affect the time response to a transient on the input of the module. Next, the FMEA will postulate worst-case credible failures of those components, based on certain assumptions, and determine the effect of each failure on the module overall response time.
Component failures will fall into one of the following categories:
- 1) Failure with an immediately detectable effect. Typically, these will be open-circuit or short-circuit failures that will cause the module output to make an immediate, detectable, and unexpected transition (e.g.,
on, off, full-scale high, full-scale low).
- 2) Failure that is not immediately detectable but would be detected during a standard instrument calibration. Typically, these will be open-circuit or short-circuit failures that will prevent the module from responding to changes on the input or will cause the module to respond improperly to those changes.
During steady-state operation, the failure will remain undetectable.
- 3) Failure that is not immediately detectable and will not be detectable during normal calibration but can affect the ability of the module to respond to a transient within a specified period.
This FMEA addresses the last of those.
Most of the postulated failures that can increase time delays in the Curtiss-Wright Nuclear Division -
Instrumentation and Control (CWND-I&C) modules are related to increases in capacitance or associated resistance values.(2) With respect to a discrete component, the analysis will postulate a change in the specified value for that component that is beyond its published tolerance, and then calculate the effect of that change on the circuit.
WCAP-14036-P-A, Section 4, states, The analysis identified capacitors and resistors as the dominant response time sensitive components a conservative increase of 50% in capacitance was used to determine the maximum change in response time for capacitor degradation. Resistors were assumed to degrade to as much as 200% of the nominal resistance, which is a conservative increase based on engineering judgement.
Initially during the analysis, only one component value will be varied. However, if the effects of a single component change in value most likely would not be detectable during calibration, it can be postulated concurrent with other failures.
Section 2.0 describes the basic functions of the applicable CWND-I&C equipment, to provide a foundation for subsequent analyses. Section 3.0 then builds on that foundation by characterizing postulated failure modes with respect to the individual components that could cause those failures.
Throughout this report, component identification may appear with a wildcard character representing the channel. For example, jumper W*04 may refer to both W104 and W204 when the discussion relates to both channels equally.
2 The time response of a circuit with resistance and inductance is L/R. The FMEA would be concerned only with those failures that could result in increases in inductance or decreases in resistance. However, no CWND-I&C product uses inductance in the signal path. Applicable CWND-I&C products use inductors for filtering around DC-DC converters.
Consequently, the analysis will postulate only increases in resistance in RC circuits that are directly in the signal path.
Integrated circuits may include inductance, but those will be otherwise addressed.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 7 of 46 1.3 General Analyses The Operational Amplifiers used most often in Series 500 modules are the Texas Instruments (TI) OPA(*)132.
These are high-speed, FET-input devices, with a published slew rate of +/-20V/µs. For a 10V step, this results in a delay of approximately 0.5µs. Also used are the slower TI OPA(*)277 high precision units, with a published slew rate of 0.8V/µs. There are no postulated failure modes that could significantly increase the response time of one of these devices without also affecting another measurable parameter. Consequently, they will not be considered in the overall time response analysis, except where they directly affect circuit performance (e.g., capacitance multiplier circuit).
All CWND-I&C modules at PINGP were produced in 2010 or later. Since 2007, the only Isolation Amplifiers used in Series 500 modules have been the NUSI-3656, which uses a TI ISO124 chip. The ISO124 uses signal modulation and demodulation on a high frequency carrier across an isolation boundary through matched 1pF galvanic isolating capacitors (capacitive). Most postulated failure modes are based on the relationship between the input signal frequency and the carrier frequency. This is not a factor for a slowly varying DC signal input, even with a step change. The published typical slew rate is 2V/µs. For a 10V step, this results in a delay of approximately 5µs. As with the Operational Amplifier, there are no postulated failure modes that could significantly increase the response time of one of these devices without also affecting another measurable parameter. Consequently, they will not be considered in the overall time response analysis.
One final device that is common in the signal paths of Series 500 modules is the TI XTR110 V/I converter. This device has insignificant capacitance and is specified by input and output resistance, versus impedance. The published slew rate is 1.3mA/µs. For a 40mA transition, this translates to approximately 31µs of delay. The P-Channel MOSFET used to regulate the output current will not significantly affect that delay time. Again, there are no postulated failure modes that could significantly increase the response time of one of these devices without also affecting another measurable parameter. Consequently, they will not be considered in the overall time response analysis.
2.0 EQUIPMENT 2.1 mV/I Amplifier There is only one model of RTL501 at PINGP. It is NUS-A255PA-3/13, with an extended 10 to 13 VDC output range and noise filtering on the output. It uses power supply PC board EIP-E043DD-25. The power supply PC board converts input power (85 to 132 VAC at 45 to 65 Hz or 110 to 170 VDC) to a regulated +/-13 VDC for the
+VCC and -VCC buses in the Output Section and to the +37 VDC needed to drive the high voltage output circuit.
The 13V buses also feed the 15V buses in the Input Section, through DC-DC Converter U99.(3) The power supply PC board is comprised of a fuse, surge protection varistors, LC filters and a modular switching power supply.
In addition to the power supply PC board, the RTL501 uses converter PC board NUS-B293PA-1 to accommodate the extended voltage output and an interface PC board to serve as a mounting platform for the SPAN, ZERO and COMP potentiometers, which are user-accessible through the front plate.
The converter PC board is divided into an Input Section and an Output Section. An ISO120BG precision isolation amplifier (U6) separates the two sections. For the remainder of this discussion, refer to the applicable schematics in NUS-A086MA [Ref. 6.2], Appendix C and NUS-A255MA [Ref. 6.3], Figure 1.
A major component of the Input Section is the RTL Personality Module (RPM). There are nine distinct RPMs available to accommodate a variety of input sensors. The RPM-13, which is used in all RTL modules at PINGP, accommodates a 3-wire resistance temperature detector (RTD). Ref. 6.2 Figure C-14 provides a simplified illustration of the function of the RPM-13.
A 1mA excitation current, which is supplied through the RPM to a remote RTD, develops across the RTD a small voltage drop that will be proportional to the temperature of the surrounding medium. A small voltage will also develop across the leads to and from the RTD (designated RL). With the positive terminal of U3 tied to 3
U99 is a 12V to 15V converter. The standard power supply output setting is 15V. A 15V converter input (i.e., the power supply voltage setting of the output section) would drive the converter output (i.e., the voltage of the input section) too high for proper operation of circuit components. A 13V converter input allows for proper operation.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 8 of 46 Common, the voltage sensed across the input of U3 will be that which is developed across the RTD plus one lead, and the output of U3 will be negative with respect to signal common. With the negative terminal of U2 tied to the negative terminal of U3, the voltage sensed across the input of U2 will be that which is developed across one lead, and the output of U2 will be positive with respect to signal common. U2 and U3 are TI INA114 precision, low power instrumentation amplifiers. Each amplifier multiplies its applicable input differential voltage by 20, a value that is set by the 2.632k resistance between pins 1 and 8. The signals entering U2 and U3 are filtered. This will be examined further in Section 3.2.
Configuration of the RTL501 modules was based on input from a 200 platinum (Pt) RTD ( = 0.00385). In all cases, the configuration range for the Pt RTD corresponded with a temperature range of 495 to 645 F. Using the Pt RTD as an example(4), a minimum resistance of 393.42 corresponds to a measurement of 495ºF and the maximum resistance of 452.80 corresponds to a measurement of 645ºF. Since it is desired for the sum of the U2 and U3 outputs to represent 0% of range in the applicable modules at the minimum resistance, the offset resistance should be set equal to the minimum resistance (i.e., 393.42 for this example). A 1mA current passing through a 393.42 resistor will develop a 393.42mV differential. The polarities of the U2 and U3 inputs are configured so that the output of U2 will exactly cancel the output of U3 when the offset resistance is set to the minimum resistance. The configuration will also cancel the lead resistances.
Offset is achieved through a bank of six fixed precision resistors and a potentiometer. Six jumpers in the resistor bank are used to insert or bypass a resistance. For this example, only the 40.2 and 20 resistors would be bypassed through the installation of jumpers W63 and W62, respectively. All other resistors would be used, resulting in a total resistance of (200+100+80.6+10) = 390.6. The 20 potentiometer R1 provides fine adjustment capability.
Assuming that the offset resistance is set to the required valued (i.e., 393.42 for this example), the output from (U3 - U2) at the maximum input resistance will be -[(452.80 - 393.42) x 20] mV, or -1.1876V. The summing node connects this to the inverting terminal of U5A. Since it is desired for this to represent 100% of range in the applicable modules, it will be necessary to introduce sufficient gain to drive the output of U5A (inverted) to approximately 5V. This is achieved by hexadecimal rotary DIP switches S3 and S4.
Continuing the example, the desired output would require a gain of -4.21. That would require a feedback resistance of 8.42k (when combined with the 2k input resistance). Setting the combination of S3 and S4 to 0x08 (equivalent to W18:IN and all others OUT) would provide 12.5k resistance through R25. To reduce that value, additional resistors would need to be added in parallel with R25. A parallel resistance of 25.80k would achieve the desired result. Setting S3/S4 to 0x0C (equivalent to W18:IN, W19:IN and all others OUT) would introduce R26 (i.e., 25.00k), yielding an equivalent resistance of 8.33k. That would be adequate to produce a gain of -4.17 from the gain stage of the circuit and supply 4.95V to the input of U6.
In addition to electrically isolating the Input Section from the Output Section, U6 also accommodates the necessary gain adjustment on the input signal. The default configuration sets the Output Section to operate on a 0 to 10 VDC range. So that the 4.95V input will correspond to a 9.75V output, U6 must provide additional gain of 1.97. The combination of R11, R97 and R98 provide for this adjustment. The full range of R11 will permit gain adjustments from 1.5 to 3.0.
The Output Section provides two basic functions. They are compensation and conversion. An RTD basically behaves according to the following formula:
RD
= R0 (1 + AT + BT2)
A and B are constants determined by the type of RTD (e.g., platinum), T is the temperature being measured (in C), R0 is the resistance of the RTD at 0C (e.g., 200), and RD is the resistance of the RTD at the measured temperature.
Because the second-order term introduces a non-linearity, the Output Section must compensate by introducing a corresponding value. For that reason, the voltage representing T at the output of U6 is supplied to U8. This analog computational unit then squares the input and normalizes it to 10V by using 10V reference source U12 to divide the squared value by 10. Accessible through the front plate, COMP potentiometer R5.1, 4
Values derived from https://www.pyromation.com/Downloads/Data/temperature-tables.pdf, page 114.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 9 of 46 in combination with a fixed resistor, compensates for the second-order term. The fixed resistor would be introduced by switch S5, which has been set to 5 in all RTL501 modules at PINGP.
The output of U6 was set for a minimum of 0V at the minimum input and a maximum of 9.75V at the maximum input. ZERO potentiometer R11.2 and SPAN potentiometer R5.2, both accessible through the front plate, are used to adjust, respectively, the zero point and the slope of the signal that is provided to the negative input of U7A (0 to -10 VDC). Consequently, if necessary, addition of a compensating voltage on the positive input of U7A would yield a linear signal, with respect to temperature, in the required range. This is the signal that will be applied to the input of U9.
The modified U9 circuit applies a gain based on the ratio of R57 to R44. The value of R57 in the PINGP modules is 5.36k, which extends the output to 13.3 VDC from 10 VDC. The V/I converter has been replaced with a high voltage operational amplifier and the low-pass filter has been removed. Although NUS-A255MA notes, in Section 4.2, that additional low pass filtering can be added by placing a capacitor in parallel with feedback resistor R57, none of the modules at PINGP include that capacitor. The output circuit is protected from external transients by varistors and a fuse.
2.2 Summator There is only one model of MTH500 at PINGP. It is MBA-E156PA-1 and uses power supply PC board EIP-E163DD-2, which is like the power supply PC board in the RTL modules, but is designed to accommodate several large capacitors, if a particular design requires them for time domain functions. As in the RTL modules, a +/-15 VDC output feeds the +/-VCC buses on the main PC board and a +37 VDC output provides a regulated voltage for the V/I converter in the Output Section.
The MTH500 module at PINGP is not a summer as much as it is a single-input unit with gain and bias capabilities (i.e., OUT = BIAS - (GAIN x IN) ). The main electronics are on a Version 2 Master Board Assembly (MBA). The design of the MBA is such that it can accommodate a wide variety of functions, from simple summation to more complex non-linear functions. Only seven of the 19 available sections are used in the MTH500 summer. The 12 unused sections include Low Gain Plus Bias, Calibrated Gain, Summer, Filter, Lead, Lag, High-Low Signal Selector, Calibration, Spare, Low Signal Cutoff, Multiply/Square, and Divide/Square Root.
The loaded sections are described below. For the remainder of this discussion, refer to the applicable schematics in NUS-A045MA [Ref. 6.4].
Jumper W3.1 is a 9-pin jumper bank in Channel 1 of the Input Section. MBA-E156PA-1 uses only Input 1. To accommodate a 1 to 5 VDC input, only jumper W3.1:C is installed. All other jumpers in the jumper bank are removed. As shown in Figure 2-1, the Input Section is configured to convert a 1 to 5 VDC external input into a 0 to 10 VDC signal before introduction to the next section. This requires an offset of -1V and an overall gain of 2.5. The overall gain is the product of the gains from the input stage (1.25) and the output stage (2).
Figure 2-1: Input Section in MBA-E156PA-1 CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 10 of 46 Connecting R17.1 to AR1.1 Pin 4 (i.e., P-) introduces the required offset. Because P-is approximately -9V, the ratio of R17.1 to R14.1 should be 9:1 to put the input of AR1.1 at 0V when the module input is 1V. This ratio also puts the input of AR1.1 at 3.6V for a 5V module input. Therefore, to achieve the desired input stage gain of 1.25 requires that the AR1.1 gain be set at 1.39. The values of R21.1 and R16.1 were selected to provide that gain(5), as well as to load the input demodulator (ID) output with at least 2M. In addition to providing the required 9:1 ratio, the values of R14.1 and R17.1 were selected to match the impedance seen by the inverting terminal. Low leakage diode CR1.1 ensures that the input will not become more negative than the P-supply.
This prevents a possible lockup condition.
To ensure that the load on the output demodulator (OD) is the same as the load on the input demodulator, R5.1 = R21.1 and R2.1 = R16.1. It is desirable to have an output stage range from 0 to 10V. With a 1.39 gain on a 3.6V input, the overall gain to produce 10V can be achieved with an output stage gain of 2.0. The values of R1.1, R3.1 and R7.1 were selected to provide the desired gain (with R7.1 at approximately mid-range) and to balance the impedances seen by the two amplifier input terminals (approximately 100k).
As described above, the expected input ranges from 0 to 3.6V and the desired output of this section is 0 to 10V.
The design of AR1.1 is such that the voltage at ID is the same as the voltage at OD, with respect to their applicable common points. Potentiometer R6.1 allows the user to compensate for minor variations in component values by setting the output of AR1.1 to 0V when the input to the module is 1V. Jumper W1.1 and test point TP1.1 allow the input channel to be tested in isolation from all other sections.
A program bank (PB), consisting of seven rows (A through G) and eleven numbered columns, permit the master board to be configured for a wide variety of functions. The point labelled OUT1 in Figure 2-1 represents points C3 and C7 of the PB. Both are designed to connect the output of AR1.1 to a chosen location. In the MTH500 summer, a jumper is installed between PB points C7 and C6, which is at INO of the Feedback Summer (FBS)
Section.
Jumpers and test points on the input and on the output of the LIM Section permit independent testing of the circuit. The FBS Section facilitates setting both GAIN and BIAS terms in the module transfer function (see above). Generally, the FBS Section performs the following function:
FBSOUT
= +/- (KSO x INO) +/- [(KSG + KSF) x INF] +/- KFB In MBA-E156PA-1, input INF is not used. The positive input of U5A is fixed at 0 through R30, R29 and R33, so that the section function reduces to the following:
FBSOUT
= +/- (KSO x INO) +/- KFB Two potentiometers, which are accessible from the mode panel, allow control of the gain (i.e., KSO) and the bias (i.e., KFB). The gain adjusted INO signal is supplied to a summing node through jumper W33, which can be set to subtract from (1-4,2-3) or add to (1-2,3-4) the summing node. Because the Code 05 (i.e., 1 - 5 VDC) input configuration does not permit negative inputs to the module, the value of INO will always be 0. Placing shunts W33:1-4,2-3 will pass the input signal directly to the summing node as a positive signal. In the PINGP configuration, the value of KFB from R31 will be negative where it joins the summing node. The combined signals pass to the inverting input of U6B, which will negate the sum and produce the following:
FBSOUT
= KFB - (KSO x INO)
PB points B4 and D11 are designed to connect the output of the FBS Section to a chosen location. In each of the MTH500 modules at PINGP, a jumper is installed between PB points D11 and E10, which is at the input of the Hi-Lo Limiter (LIM) Section.
Jumpers and test points on the input and on the output of the LIM Section permit independent testing of the circuit. The LIM Section performs the following function:
HI LIMIT for LIMIN > HI LIMIT LIMOUT
= LIMIN for HI LIMIT > LIMIN > LO LIMIT LO LIMIT for LO LIMIT > LIMIN 5
G = 1 + R16.1/R21.1 = 1 + 604k/1.54M = 1.39 CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 11 of 46 Potentiometers R9 and R10, which are accessible from the front plate, allow control of the LOW limit and HIGH limit, respectively. The user can deactivate each limit simply by turning the applicable potentiometer to its fully counterclockwise (low limit) or fully clockwise (high limit) position.
PB points C10 and E1 are both designed to connect the output of the LIM Section to a chosen location. In each of the MTH500 modules at PINGP, a jumper is installed between PB points C10 and C11, which is at the input of the Driver (DRV) Section.
Jumpers and test points on the input and on the output of the DRV Section permit independent testing of the circuit. The DRV Section is used to set the zero and span points for the output signal. The applicable potentiometers are accessible from the mode panel, where they are labelled KDZ and KDS respectively. The DRV Section provides filtering with a module roll-off frequency at approximately 63.7 Hz. This will be examined further in Section 3.3.
PB point B9 is designed to connect the output of the DRV Section to a chosen location. Alternatively, for a voltage output, the DRV Section would be directly connected to the Surge Suppression Section through removable jumper W2. In each of the MTH500 modules at PINGP, jumper W2 is removed, and a wire jumper is installed between PB points B9 and C9, which is at the input of the Current Loop (CUR) Section.
The CUR Section converts the 0 to 10V signal from the output of the DRV Section into a 10 to 50mA signal. V/I converter U1 requires specific jumper settings to accommodate the input and output ranges. Pin 3 is connected through jumper W6 to an internal +10V reference. Pin 5 (through jumper W4:1-2) and pin 9 are connected to common. Jumper W4:3-4 connects Pin 4 to the input. Jumper W87 is installed to extend the output range of U1 to 10 to 50mA. Jumper W3 connects the output of the CUR Section to the Surge Suppression (SUR) Section.
The SUR Section includes varistors for protection of the module from external transients. There is also a fuse on the output.
The master PC board uses five DC reference and operating voltages. These include +/-11V, +/-15V and +37V.
The +/-15V and +37V sources come directly from the power supply board. The +/-11V sources come from the Reference Voltages (REF) Section, which also produces a +10V source from the +15V bus. The +10V source can be used however needed by connecting to it through PB point A1 or G1. Neither is connected in the MTH500 modules at PINGP.
2.3 Function Generator There is only one model of SGU501 at PINGP. It is NUS-A258PA-1 and uses power supply PC board EIP-E163DD-1/1, which is like the power supply PC board in the MTH500 module but includes capacitor C1 in the Filter Section (see below). As in the RTL and MTH modules, a +/-15 VDC output feeds the +/-VCC buses on the main PC board and a +37 VDC output provides a regulated voltage for the V/I converter in the Output Section.
The SGU501 static gain unit includes the Version 2 GEN Board. The SGU501 uses only a few of the available circuits on the PC board, as described in the remainder of this section. As in other modules, test points and jumpers on the input and on the output of an individual circuit permit independent testing of the circuit. For the remainder of this discussion, refer to the applicable schematics in NUS-A075MA [Ref. 6.5].
The SGU501 Input Section has been modified from the standard configuration. The output stage is like that shown in Figure 2-1 above, but the input stage is configured as shown below in Figure 2-2. As in Figure 2-1, R2.1 = R16.1 and R5.1 = R21.1. However, the input stage values differ from those in the MTH500.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 12 of 46 Figure 2-2: Input Stage in SGU501 The M20 connector on the front plate uses terminals D+ and F-for one 0 to 10 VDC input (IN2) and terminals H+ and K-for a second 0 to 10 VDC input (IN3). Modifications to the PC board join the negative terminals together and drop each signal across a voltage divider circuit, such that the signal passed to AR1.1 is a filtered IN2 - IN3 with a range of -2 to +2 VDC and a 10 Hz cut-off frequency. The filter will be examined further in Section 3.4.
With the output stage of AR1.1 providing a gain of 2 (see Section 2.2), the input stage must provide a gain of 2.5 to produce an output in the range -10 to +10 VDC. This is achieved through the ratio of R16.1 to R21.1 as discussed in Footnote 5.
Unlike the MTH500, the GEN Board does not include a program bank. Traces on the PC board connect adjacent sections and removable jumpers determine the functions that are to be performed. The Input Section passes a signal that is designated INA.
What happens to signal INA will depend upon the function that is required. Only the gull wing function is used by the SGU501 module and only the normal gull wing with even wings configuration(6) is used in applications at PINGP. Other functions are available. For the gull wing function, signal INA feeds the Window Comparator (WIN) Section directly and the Pre-limiter (PLM) Section via jumper W5.4. However, jumper W5.1 bypasses the comparator portion of the WIN Section and is mutually exclusive with jumper W4.1. A potentiometer permits reduction of the signal if desired before it enters a unity gain buffer. The output of the WIN Section is a signal that is designated ABUF. The PLM Section is used to limit the output to a desired value when the input is within 6
In the normal gull wing configuration, varying the input from the negative extreme to the positive extreme will yield an output that varies from a maximum limit to a minimum limit and back to a maximum limit. The inverted gull wing varies from minimum to maximum and back to minimum. For even wings, the output at the negative input extreme is equal to the output at the positive input extreme.
CURTISS WRIGHT 2
W3. 2: A O
O 1N2+ O 0
R13. 2 4, 99k R 19, 2
AA R20. 2
- 2. 00k FI. 1
- 22. 6k R14. 1 562k W3. 1 C
oa 7
iN2-a AR1.1 VR 1, 1 zR R15. 1 0.018 0.47 5
COM IN3-O E20. 3
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AB El9. 3
- 3. Clk VR 1 3 AE (WHT) 0 R21.
1 976k R 13. 3
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- 1. 47M 0W
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 13 of 46 a certain range for applications in which the wings are not at the same output level. Its design is almost identical to that of the Limiter Section. The output of the PLM Section is a signal that is designated DBUF.
The signals ABUF and DBUF both feed the Breakpoint (BKP) Section. Only BKP1 and BKP4 are used in this configuration and, in the SGU501, only those breakpoint sections are loaded. If the PLM section were to be used for uneven wings, jumper W408 would supply DBUF to BKP4. Otherwise, as at PINGP, signal ABUF is supplied to both BKP1 (through W107) and BKP4 (through W407). The functions of BKP1 and BKP4 are identical. The first stage produces the following:
OUT
= ( 2 x BREAKPOINT ) - IN When initially setting the breakpoint, it is important to remember that the value measured at TP*02 must be half of the desired breakpoint as a percentage of the input span times the 10V full scale output of the Input Section.
For example, with a desired breakpoint at an input of 0.6V on a span of 0V to 2V, the value measured at TP*02 must be (30% X 10V)/2 = 1.50V. The first stage output is then applied to the gain pot. This pot, in combination with the Summer Section, will determine the slope of the line representing the output between flat areas on the gull wing. The gain at this stage will be less than or equal to one.
When input ABUF is positive, but less than twice the positive breakpoint, the output of U101B will be positive.
To block those signals before they get to the Summer Section and affect the output, W103 is installed to short around CR101, so that only negative signals pass. Similarly, when input ABUF is negative, but more positive than twice the negative breakpoint, the output of U401B will be negative. To block those signals before they get to the Summer Section and affect the output, W404 is installed to short around CR402, so that only positive signals pass.
The output of BKP1, via jumper W106:2-3, is a signal that is designated SUMA. The output of BKP4, via jumper W406:2-3, is a signal that is designated SUMD.
The signals SUMA and SUMD both feed the Summer (SUM) Section. Jumper W105:1-4,2-3 will pass SUMA to the summing node without inversion. In contrast, jumper W405:1-2,3-4 will invert SUMD before passing it to the summing node. These values will be added to the bias that is set using the LOW potentiometer on the front plate. The bias is typically used in this configuration to establish the starting point of the positive and negative ascending output segments. Amplifier U7B inverts the sum and applies an additional gain, as determined by the positions of jumpers W43, W49 and W67. Refer to Table 2-1 for an illustration of how the gain is applied.
Table 2-1:
Summer Gain Jumper Settings W43 W49 W67 Gain X
X X
1.05 X
0 X
2.05 0
X X
3.05 0
0 X
4.05 X
X 0
5.07 X
0 0
6.07 0
X 0
7.07 0
0 0
8.07 The output of the SUM Section is a signal that is designated SIG. The signal SIG is applied to the input of the Filter (FIL) Section. Because of filtering provided in the Input Section and in the Driver Section, it is possible to bypass this section by placing W44/45 in the BYP position. All modules used in the RPS at PINGP have the FIL Section bypassed. The output of the FIL Section, a signal that is designated FIL, passes directly to the Limiter (LIM) Section.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 14 of 46 Adjustments, configurations, interconnections, and functions of the SGU501 LIM, DRV, CUR, and SUR Sections are identical to those in the MTH500. In the normal gull wing configuration with even wings, the LIM Section sets the upper limit using the HIGH potentiometer on the front plate.
The REF Section of the SGU501, although like that in the MTH500, includes a few additional components.
Noise suppression capacitors C30 and C31 were added around operational amplifiers U3B and U3A, respectively. Also, to satisfy the need for +/-6V supplies in the BKP Section, Zener diode CR4 and resistor R45 were added onto the -15V bus, while CR5 and R46 were added onto the +15V bus.
2.4 Comparator Module There are two models of signal comparators used in the RPS at PINGP. They are the SAM503, EIP-E304DD-4 and the DAM503, EIP-E304DD-3. Both alarm modules use power supply PC board EIP-E043DD-1. As in the RTL, MTH and SGU modules, a +/-15 VDC output feeds the +/-VCC buses on the main PC board. Unlike with them, however, the +37 VDC supply, although available, does not pass to the main PC board. The power supply PC board is comprised of a fuse, surge protection varistors and a modular switching power supply.
Internally, the SAM503 and DAM503 units are practically identical. The DAM503 uses an EIP-E286PA-1 bionic DAM PC board and the SAM503 uses an EIP-E286PA-2 bionic DAM PC board. The main PC board allows for two independent channels from input to output, but also allows for variations. The output of a SAM503 is always on Channel 1, but the input can be on Channel 1, Channel 2, or both (deviation and difference modes). The DAM503 is similar but provides a second output channel.
Some parts of the PC board are common to both channels. These include the internal wetting voltage supply circuit, the DC component power supply, the power LED circuit, two jumpers between the input circuits and capacitor C1. In all units supplied to PINGP, the internal AC wetting voltage is used to drive one or more external loads. The same voltage is applied to both output channels, which are described below. Each channel is divided into three sections: Input, Control and Output. For the remainder of this discussion, refer to Figure 6 in EIP-M-DAM503 [Ref. 6.6].
By means of the two common jumpers introduced above (i.e., W1, W3), the Input Section can be configured for any of four different modes. These are Dual Input, Single Input, Deviation and Difference. These modes determine how the input signals will be compared to the applicable setpoint values in the Control Section.
Another combination of jumpers in each channel, with associated resistors, conditions the applicable input signal as necessary for introduction to an isolation amplifier, which separates the input and control sections.
The isolation amplifier accepts a +/-5 VDC input signal. There is only one isolation amplifier on the SAM503 PC Board. Jumper W*14 can be used to delay the applicable signal by creating an RC network with the parallel resistors at the input to the isolation amplifier. This jumper is not installed in any of the applicable modules in RPS System at PINGP.
Although diodes CR*01 and CR*02 limit the range of the input signal to the isolation amplifier, to prevent a possible lockup condition, a spike will be induced when either of the diodes is turned on or off. Capacitor C*04 minimizes the duration of the spike on the input signal. This will be examined further in Section 3.5.
With jumper W*03:1-2 installed, resistors R*04 and R*05 provide an input impedance of 100k to match an impedance internal to the isolation amplifier. They can also be used, by setting jumper W*03:2-3, to permit a module input range of +/-10 VDC.
Jumper W*00 can be used to introduce a small offset on the input signal. This is necessary for configurations in which the required setpoint value is near zero.
The output of the isolation amplifier is connected as a comparator. The setpoint and deadband pots within the Control Section provide the non-inverting input (reference). The inverting input (signal) is equal to the converted signal from the Input Section. If the signal is less than that of the reference, the output of the op-amp will be positive. This signal is fed back to the non-inverting input, thus driving the op-amp into positive saturation.
If the signal is greater than that of the reference, the output of the op-amp will be negative. The same positive feedback will drive the op-amp into negative saturation. Zener diodes limit the magnitude of feedback that is applied to the amplifier and C*06 slows the transient between extremes. The latter will be examined further in Section 3.5.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 15 of 46 Jumper W*11 sets the adjustment range, permitting an undersized range for difference mode. Jumper W*04 sets the offset to 0% or 20%; or, if the jumper is not installed, potentiometers R*09 and R*10 can be adjusted to provide a different offset value. Jumpers W*05 and W*17 determine whether the unit will trip on a rising signal or a falling signal.
When the output of the amplifier is positive, switching diode CR*04 blocks current flow through R*07 and deadband potentiometer R301(R401). In this configuration, the reference voltage is determined completely by the setpoint potentiometer and the setpoint circuit. When the output of the amplifier is negative (tripped), current flows through the voltage divider formed by R301(R401) and R*07, consequently changing the reference voltage by an amount that is determined by the position of R301(R401). This creates a deadband in the reset.
A negative voltage applied to the gate of Q*01 in the Output Section will turn it on. Correspondingly, the positive extreme will turn it off. When Q*01 is off, -VCC will be applied to the gate of Q*02, keeping it turned on. Inversely, when Q*01 turns on, the drain will be connected to common through the source and Q*02 will turn off. The position of jumper W*06 will determine which of the two MOSFETs drives a solid-state relay (NO versus NC).
Similarly, the position of jumper W*12 will determine how the corresponding LED on the front plate will indicate trip conditions. Since each channel of a Series 503 module has only a single LED, jumper W*09 for that channel will always be installed.
The solid-state relay (SSR) switches an external load. Diode bridge CR*10 permits the use of an AC wetting voltage, through jumper W*10. Jumpers W*07 and W*08 can be used to bypass the applicable diode bridge for a DC wetting voltage less than 5V. Jumper W*10 can also be set to provide an internal wetting voltage, as described above with respect to common components. Along with the MOSFETs, the SSR will be examined further in Section 3.5.
Additional information exclusive to the SAM503 can be found in NUS-A118MA [Ref. 6.7].
3.0 ANALYSIS 3.1 Assumptions
- 1) All conditions external to the module that is being evaluated are within normal parameters. For example, if a module is expecting to receive a 1 to 5 VDC input, then the input is assumed to be within that expected range.
- 2) As a continuation of Assumption 1, a failure mode is not considered credible if it can ONLY occur as the result of an abnormal condition that exists external to the module. For example, a short circuit failure of a varistor only occurs when the device is subjected to a surge pulse that is beyond its peak rating or when it is operated at a steady-state voltage that is well beyond the long-term rating. Both conditions violate Assumption 1.
- 3) Despite the capabilities of the GEN and MBA PC Boards, the module will always be in one of the configurations that are applicable to the evaluated Series 50x replacement modules. For example, the MBA PC board can be loaded to perform time-domain functions, but such functions are limited to the TMD, which is not covered by this evaluation.
- 4) Only a single component failure is postulated unless that failure could cause a second failure or would be undetectable during module calibration.
- 5) All modules are configured to fail safe on a loss of AC power to the module.
3.2 mV/I Amplifier 3.2.1 Failure Mechanisms The RTL501 unit is characterized by a linear relationship between a measured parameter and the output. In this application, an X% change in the measured parameter (i.e., temperature), within a specified range, will produce an output that is X% of the desired span. At PINGP, the input to each RTL501 is a non-linear three-wire 200 Pt RTD. Figure 3-1 shows a functional block diagram of the RTL501.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 16 of 46 Figure 3-1: RTL501 Functional Block Diagram The signal path from input to output includes several sections with components subject to failures that could affect overall module time response.
The RPM-13 and RCB sections together include cascading RC networks on the input to each of U2 and U3.
The SPAN section includes a filtering capacitor in parallel with the input span resistors in the feedback circuit of amplifier U5A.
The CAL section includes a filtering capacitor in parallel with the Span pot in the feedback circuit of amplifier U7B.
The SUM2 section includes a stabilizing capacitor in the feedback circuit of summing amplifier U7A.
Normally, it would help to stabilize the RC circuit that is installed on the output of U7A for voltage output configurations. Although the RC circuit is not installed in the RTL501 module, capacitor C20 is still present.
3.2.2 Failure Effects The presence of filters along the main signal path makes delay time inherent in the design. As discussed in NUS-A086MA [Ref. 6.2], the same Version 2 design is used in Series 500, 501, 850, 851, 852 and 900-550 modules. As discussed in NUS-A138QA [Ref. 6.8], the design was qualified using an RTL900-550 test specimen. Qualification Report NUS-A086QA [Ref. 6.9], Section 5.3.1.6 documents a module time response of 40ms with the 8Hz filter installed in the test specimen. The 8Hz filter would have contributed approximately 20ms to the total time. However, the filter circuit is not installed in the RTL501 module.
RPM-13 and RCB: R13.3, R13.4, RN1C, RN1D, C2, C4. Because the contribution of U3 to SUM1 is significantly greater than that of U2, only the portions of the RPM-13 and RCB blocks that provide input to U3 will be examined. R13.3 and R13.4 are 10.0k +/-1% metal film resistors. RN1 is a network resistor with 1.00k +/-1% for each metal film element. C2 and C4 are 330nF +/-10% capacitors. None of these components is associated with circuit gain. Based on optimum component values, the response time(7) of this circuit would be 7.3ms.
If the values of both elements of RN1 increase to 2k (200%), the circuit response time would increase to 8.1ms (baseline + 0.8ms). This failure would not be detected immediately or during calibration.
7 Calculated as the time for the output to complete 63% of the transition between initial and final values following a step input.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 17 of 46 If the values of both R13.3 and R13.4 increase to 20.0k (200%), the circuit response time would increase to 13.9ms (baseline + 6.6ms). This failure would not be detected immediately or during calibration.
If the value of C2 increases to 495nF (150%), the circuit response time would increase to 10.6ms (baseline + 3.3ms). This failure would not be detected immediately or during calibration.
If the value of C4 increases to 495nF (150%), the circuit response time would increase to 7.7ms (baseline + 0.4ms). This failure would not be detected immediately or during calibration.
Since none of these failures individually would be detected immediately or during calibration, it is possible to postulate them together, having occurred over time. With all failures, the circuit response time could increase to 21.8ms (baseline + 14.5ms). Note that the increase above the baseline is NOT the sum of the individual effects. That is because this is a two-stage filter; the output of the first filter, including the error, is the input to the second filter.
SPAN: Rx (as set), C11. The RTL501 modules at PINGP are calibrated for an input span of 60.33 by setting the S3/S4 switch to 0x0C (W18 and W19 inserted). The parallel combination of resistors R26 and R25 (12.5k) produces a feedback resistance of 8.33k, for a circuit gain of -4.17. Each of resistors R25 and R26 is metal film with a 0.1% tolerance on the value. C11 is a 1.0nF +/-10% capacitor. Based on optimum component values, the response time of this circuit in an RTL501 would be 8.33µs.
If the value of R25 increases to 25k (200%), the RTL501 response time would increase to 12.50µs (baseline + 4.17µs) and the circuit gain would increase by 50%. Because of the significant change in gain, this failure would be detectable during calibration, if not immediately.
If the value of R26 increases to 50k (200%), the RTL501 response time would increase to 33.33µs (baseline + 13.33µs) and the circuit gain would increase by 67%. Because of the significant changes in gain, this failure would be detectable during calibration, if not immediately.
If the value of C11 increases to 1.5nF (150%), the RTL501 response time would increase to 12.50µs (baseline + 4.17µs). The change would not affect circuit gain in either case and would, therefore, not be detected immediately or during calibration. However, with respect to the module time response, the relative effect of the change would be insignificant.
CAL: R39, R5.2, C15. R39 is a 3.16k +/-1% metal film resistor. R5.2 is the 2k +/-5% variable resistor mounted on the front plate (SPAN). C15 is a 0.1µF +/-10% capacitor. Based on optimum component values, with R5.2 set to 50% of its range(8), the response time of this circuit would be 416µs.
If the value of R39 increases to 6.32k (200%), the circuit response time would increase to 732µs (baseline + 416µs). However, the change would also result in a 76% increase in the circuit gain. Such a failure would be immediately detectable for most inputs and would certainly be detectable during calibration.
An increase in the value of R5.2 to 200% of its set value is the same as setting the potentiometer fully clockwise. The circuit response time would increase to 516µs (baseline + 100µs). However, the change would also result in a 24% increase in the static gain. Such a failure would be immediately detectable for most inputs and would certainly be detectable during calibration.
If the value of C15 increases to 0.15F (150%), the circuit response time would increase to 624µs (baseline + 208µs). The change would not affect circuit gain and would, therefore, not be detected immediately or during calibration. For consideration of the module total response time, this failure would contribute an additional 0.21ms.
8 At PINGP, the RTL501 modules require a gain of 1 (W5:IN for no offset). The 50% position sets a gain of 0.89.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 18 of 46 SUM2: C20. The SUM2 circuit was significantly modified for the RTL501. Ref. 6.3, Section 4.2 states the following:
Capacitor C20 is necessary for the stable operation of the output. The gain and phase lag introduced into the feedback loop of U7A by the output driver will cause U7A to oscillate without a compensating force. C20 slows down the response of U7A enough to keep the circuit in stable operation. As a side note, the jumper selectable RC filter, available on version 2 RTL modules, between the output of U7A and the input of U9 was omitted from the circuit because the filter inside the feedback loop destabilized the circuit.
C20 is a 0.1µF +/-10% capacitor. Feedback resistor R57 is 5.36k. Based on optimum component values, the response time of this circuit would be 107µs.
Increasing the value of C20 by 50% will increase the circuit response time to 161µs (baseline + 54µs).
Since there would be no change to the circuit gain, this failure would not be detected immediately or during calibration.
3.2.3 Overall System When introducing failures that result in increases to 200% of the initial resistor values and increases of 50% in the capacitor values, where the failures may not be immediately detectable or detectable during calibration, the time delay of this module would increase by 14.77ms from a baseline of 7.83ms.
3.3 Summator 3.3.1 Failure Mechanisms The MTH500 modules at PINGP receive only a single input, to which the module applies a user-adjustable gain and bias through potentiometers on the mode panel. There are also mode panel controls for high and low limits and driver zero and span before the signal passes to the Current Output (CUR) Section. Figure 3-2 shows a functional block diagram of the MTH500.
Figure 3-2: MTH500 Functional Block Diagram The signal path from input to output includes several sections with filters subject to failures that could affect overall module time response.
The IN section includes a filtering capacitor in parallel with the output stage gain potentiometer and resistor in the feedback circuit between pins 14 and 15 of isolation amplifier AR1.1.
The FBS section includes filtering capacitors in the feedback circuits of amplifiers U5B and U6B.
However, in the PINGP configurations, with W33:1-4,2-3, amplifier U5B does not contribute to the circuit output and can be ignored for this analysis.
The DRV section includes a low pass filter on the input to U7B and a filtering capacitor in the feedback circuit.
CURTISS-WRIGHT I
IN h BS
/
DRV CUR
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 19 of 46 3.3.2 Failure Effects The presence of filters along the main signal path makes delay time inherent in the design. As discussed in NUS-A045MA [Ref. 6.4], the specified response time for an MBA500 series module is Less than 70 msec from the application of a step change at the input to a change in the output (resistive load) of 63% of the final value.
(Filter and time functions bypassed or not in circuit.)
IN: R3.1, R7.1, C3.1. R3.1 is a 174k +/-1% metal film resistor. R7.1 is a 50k +/-10% variable resistor.
C3.1 is a 1.0nF +/-10% ceramic capacitor. Based on optimum component values, with R7.1 set to 52% of its range(9), the response time of this circuit would be 200µs.
If the value of R3.1 increases to 348k (200%), the circuit response time would increase to 374µs (baseline + 174µs). Note, however, that there will be a more significant effect on static gain. The desired gain of 2.00 in the output stage would increase to 2.87. Depending on the value of the input, this might not be immediately detectable; but it would be detected during calibration since R7.1 would not be able to compensate.
An increase in the value of R7.1 to 200% of its set value (i.e., 52k) would increase the circuit response time to 226µs (baseline + 26µs). The change would also result in a 6.5% increase in the static gain. Such a failure might not be immediately detectable but would certainly be detectable during calibration.
If the value of C3.1 increases to 1.5nF (150%), the circuit response time would increase to 300µs (baseline + 100µs). This would have no effect on the static gain and would, therefore, not be detectable either immediately or during calibration.
FBS: RN6A, RN6B, C54. RN6 is a network resistor with 100k +/-1% for each metal film element. C54 is a 1.0nF +/-10% ceramic capacitor. Based on optimum component values, the response time of this circuit would be 200µs and the static gain would be 2.1.
If the value of each element of RN6 increases to 200k (200%), the circuit response time would increase to 400µs (baseline + 200µs) and the static gain would double to 4.2. Depending on the value of the input, this might not be immediately detectable; but it would be detected during calibration.
If the value of C54 increases to 1.5nF (150%), the circuit response time would increase to 300µs (baseline + 100µs). This would have no effect on the static gain and would, therefore, not be detectable either immediately or during calibration.
DRV: R8, RN7A, C14, C58. R8 is a 100k +/-10% variable resistor. RN7 is a network resistor with 100k +/-1% for each metal film element. C14 is a 0.1µF +/-10% ceramic capacitor. C58 is a 1.0nF +/-10%
ceramic capacitor. To effectively evaluate this circuit requires some simplifying assumptions. Referring to Figure 3-3, (1) R8A and R8B represent the two segments of variable resistor R8 and (2) the Common connected to RN7B pin 4 represents the optimum setting of ZERO potentiometer R7 in combination with R55 and RN7C. Decoupling capacitors and power for U7B are not shown.
9 As discussed in Section 2.2, the output stage circuit is designed to produce an optimum gain of 2.00. R7.1 provides for adjustability in the range 1.24 to 2.24. Since the value of R3.1 is 174k and the value of R1.1 is 200k, the optimum setting of R7.1 is 26k, or 52%.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 20 of 46 Figure 3-3: MTH500 Driver Simplified Circuit Although the input stage gain is linear with rotation of R8, the time response is non-linear, which can be seen in the following formula:
U7B+
= [(R8B)/(R8A + R8B + sR8AR8BC14)]
- IN Assuming R8A = R8B = R50 yields the following:
U7B+
= [(R50)/(2R50 + sR502C14)]
- IN U7B+
= [1/(2 + sR50C14)]
- IN U7B+
= (1/2) * {1/[1 + s(0.5*R50)C14]}
- IN Based on the assumption, the input stage gain is half the input, and the time constant is (25k
- 0.1µF),
or 2.5ms. Clockwise rotation of R8 would increase the gain and reduce the time constant.
Counterclockwise rotation of R8 would reduce the gain, but also reduce the time constant. That is, the 50% setting of R8 yields the maximum time response.
With RN7A = RN7B, the static gain of the output stage is 2, which will compensate for the input stage gain of 0.5. With a second stage time constant of 100µs, the overall circuit time response is 2.55ms.
If the values of both elements of RN7 increase to 200k (200%), the circuit response time would increase to 2.61ms (baseline + 0.06ms) and the static gain would not be affected. This failure would not be immediately detected and might not be detected during calibration.
If the value of C58 increases to 1.5nF (150%), the circuit response time would increase to 2.58ms (baseline + 0.03ms) and the static gain would not be affected. This failure would not be detected immediately or during calibration.
If the value of R8 increases to 200k (200%), equivalent to an increase of 50k for each segment, the circuit response time would increase to 5.05ms (baseline + 2.50ms) and the static gain would not be affected. This failure would not be immediately detected and might not be detected during calibration.
If the value of C14 increases to 0.15F (150%), the circuit response time would increase to 3.80ms (baseline + 1.25ms) and the static gain would not be affected. This failure would not be detected immediately or during calibration.
Since none of these failures individually would be detectable during calibration, it is possible to postulate them together, having occurred over time. With all failures, the circuit response time would increase to 7.66ms (baseline + 5.11ms) and the circuit gain would not be affected. Note that the increase above the baseline is NOT the sum of the individual effects. That is because this is a two-stage filter; the output of the first filter, including the error, is the input to the second filter.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 21 of 46 3.3.3 Overall System When introducing failures that result in increases to 200% of the initial resistor values and increases of 50% in the capacitor values, where the failures may not be immediately detectable or detectable during calibration, the time delay of this module would increase by 5.34ms from a baseline of 2.95ms.
3.4 Function Generator 3.4.1 Failure Mechanisms These units are characterized by a non-linear relationship between the calculated difference of two inputs and a single output. The relationship is a gull wing. Figure 3-4 shows a functional block diagram of the SGU501.
The signal path from input to output includes several sections with filters subject to failures that could affect overall module time response.
The IN1 section includes cascading RC networks on the input to AR1 and another filter on the output.
The BP1 and BP4 sections include filtering capacitors in parallel with the feedback resistors of U101B and U401B, respectively.
The SUM section includes filtering capacitors in parallel with the feedback resistors of U6A and U7B.
The DRV section includes a low pass filter on the input to U4A and a filtering capacitor in the feedback circuit.
Figure 3-4: SGU501 Functional Block Diagram 3.4.2 Failure Effects The presence of filters along the main signal path makes delay time inherent in the design. NUS-A122SA
[Ref. 6.10] specifies the SGU501 response time, with the FIL section bypassed, of Less than 70 msec for step input to reach 63% of final value.
IN1: F1.1, VR1.1, R14.1, R15.1. Referring to Figure 2-2, F1.1 is a 22.6k +/-1% metal film resistor, VR1.1 is a 0.47µF +/-10% ceramic capacitor, R14.1 is a 562k +/-1% metal film resistor, and R15.1 is a 18nF +/-10%
ceramic capacitor. Based on optimum component values, the response time of this two-pole circuit would be 22.3ms. None of the postulated failures will have any impact on static gain.
If the value of F1.1 increases to 45.2k (200%), the circuit response time would increase to 33.1ms (baseline + 10.8ms). This failure would not be detected immediately or during calibration.
If the value of VR1.1 increases to 0.705µF (150%), the circuit response time would increase to 27.8ms (baseline + 5.5ms). This failure would not be detected immediately or during calibration.
CURTISS-WRIGHT I
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 22 of 46 If the value of R14.1 increases to 1.124M (200%), the circuit response time would increase to 32.7ms (baseline + 10.4ms). This failure would not be detected immediately or during calibration.
If the value of R15.1 increases to 27nF (150%), the circuit response time would increase to 27.6ms (baseline + 5.3ms). This failure would not be detected immediately or during calibration.
Since none of these failures individually would be detectable during calibration, it is possible to postulate them together, having occurred over time. With all failures, the circuit response time would increase to 66.8ms (baseline + 44.5ms). Note that the increase above the baseline is NOT the sum of the individual effects. That is because this is a two-stage filter; the output of the first filter, including the error, is the input to the second filter.
IN1: R3.1, R7.1, C3.1. This circuit is identical to that described in Section 3.3.2. Component labels are also identical. As discussed in that section, the failure of C3.1 would add 100µs to the baseline response time without being detected.
BP1: RN101, C103. RN101 is a network resistor with 100k +/-1% for each metal film element. C103 is a 1.0nF +/-20% ceramic capacitor. Based on optimum component values, the response time of this circuit would be 100µs. Since RN101 is in both the input and feedback circuits, the static gain would be unaffected by any postulated changes to RN101 that affect both elements.
If the values of both elements of RN101 increase to 200k (200%), the circuit response time would increase to 200µs (baseline + 100µs). This failure would not be detected immediately or during calibration.
If the value of C103 increases to 1.5nF (150%), the circuit response time would increase to 150µs (baseline + 50µs). This failure would not be detected immediately or during calibration.
Since neither of these failures individually would be detectable during calibration, it is possible to postulate them together, having occurred over time. With both failures, the circuit response time would increase to 250µs (baseline + 150µs).
BP4: RN401, C403. This circuit is identical to that described for BP1 except for component labels.
Although the combination failures described would add 150µs to the baseline response time without being detected, the output will be affected by either BP1 or BP4, but not both.
SUM: RN7, C32. This circuit is identical to that described for BP1 except for component labels. Since this inverting circuit is in series with BP1 or BP4, as applicable with input in the corresponding region, the combination failures described would add 150µs to the baseline response time without being detected.
SUM: RN11, R67, R68, C33. Since the settings of jumpers W43, W49 and W67 are application specific, this evaluation will assume that all are removed, and that the circuit is applying the maximum gain possible. RN11 is a network resistor with 100k +/-1% for each metal film element. R67 is a 105k +/-1%
metal film resistor. R68 is a 402k +/-1% metal film resistor. C33 is a 1nF +/-20% ceramic capacitor. Based on optimum component values, the response time of this circuit would be 807µs and the static gain would be 8.07.
If the value of each element of RN11 increases to 200k (200%), the circuit response time would increase to 1.107ms (baseline + 300µs) and the static gain would increase to 11.07. Such a failure might not be immediately detectable but would certainly be detectable during calibration.
If the value of R67 increases to 210k (200%), the circuit response time would increase to 912µs (baseline + 105µs) and the static gain would increase to 9.12. Such a failure might not be immediately detectable but would certainly be detectable during calibration.
If the value of R68 increases to 804k (200%), the circuit response time would increase to 1.209ms (baseline + 402µs) and the static gain would increase to 12.09. Such a failure might not be immediately detectable but would certainly be detectable during calibration.
If the value of C33 increases to 1.5nF (150%), the circuit response time would increase to 1.211ms (baseline + 404µs) and the static gain would not be affected. This failure would not be detected immediately or during calibration.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 23 of 46 DRV: R8, RN6, C6, C29. This circuit is nearly identical to that described in Section 3.3.2. Only component labels are different (see Figure 3-3 and replace RN7 with RN6, C14 with C6, C58 with C29). All postulated failures would add 5.11ms to the baseline response time without being detected.
3.4.3 Overall System When introducing failures that result in increases to 200% of the initial resistor values and increases of 50% in the capacitor values, where the failures may not be immediately detectable or detectable during calibration, the time delay of this module would increase by 50.56ms from a baseline of 25.66ms.
3.5 Comparator Module 3.5.1 Failure Mechanisms The SAM503 and DAM503 units are bistable comparators. That is, each output is characterized by either of two states, which are based upon the relationship between an input and a specified setpoint. Some of the modules will be configured for a rising signal trip (S)(10), while others will be configured for a falling signal trip (R). All include an internally generated wetting voltage, which can be used to energize an external load on a trip signal (3) through a solid-state relay (SSR). Alternatively, it can be used to power the external load during normal conditions, with the SSR removing that power in response to a trip signal (4).
Figure 3-5 shows a functional block diagram of the comparator modules. The signal is analog from input to comparator, but digital from comparator to output. The following sections include components subject to failures that could affect overall module time response.
The IN1/IN2 section includes capacitors on the input to U*01.
The COMP* section includes a filtering capacitor in the feedback path for U*01.
The TRIP* section includes two MOSFETs.
The OUT* section includes an SSR.
Figure 3-5: Comparator Functional Block Diagram 10 The characters enclosed within parentheses correspond to the applicable configuration codes, which are defined in References 6.6 and 6.7.
CURTISS WRIGHT I
I CCMP1 TRIP1 0UT1 INTERNAL WETTING DAM ONLY IN2 COMP2 TRIP2 0UT2 DD2 SF:2
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 24 of 46 3.5.2 Failure Effects EIP-M-DAM503 [Ref. 6.6] states the following for the DAM503:
Less than 5 msec. from the time at which the input first reaches its nominal value to the time at which the output reaches 63% of its final value. All filters disabled. Each output channel independently jumper selectable for greater than 8.4 msec or greater than 20 msec. A maximum of 8.4 msec for a 1 to 5.020+/-0.020 Vdc input step with a 4.980+/-0.020 Vdc trip setpoint and no input filtering to produce a 63% change in the output.
NUS-A118MA [Ref. 6.7] includes the same specification for the SAM503.
IN1/IN2: C*04, C*05. Capacitor C*04 is a 0.1µF +/-10% ceramic capacitor. C*05, a 2.2µF +/-20% tantalum capacitor, was originally intended to suppress ripple from the isolation amplifier internal -V power supply(11), which is required for near-zero setpoints (O). None of the modules at PINGP have been configured for near-zero setpoints. Consequently, C*05 will have no effect on the input signal. When C*02 or C*03 is used for filtering, C*04 reduces the delay. For example, with W*14:2-3, C*03 would introduce a 10ms delay. However, C*04 will reduce that to 6ms. C*04 will have little effect when W*14 is out, as in the applications at PINGP.
COMP*: R*07, R*08, C*06. If the control circuit is in the Reset state, the output of U*01 will be near the positive rail and the value at the gate of Q*01 will be fixed at a positive value determined by CR*11 and CR*06. Q*01, with a threshold voltage range between -2V and -4V will be turned off and capacitor C*06 will be charged to the difference between the setpoint voltage and the clamped voltage. For U*01, the value at pin 13 (+) represents the setpoint and the value at pin 14 (-) represents the input. When pin 13 is more positive than pin 14, the output is at the positive rail. If pin 14 becomes more positive than pin 13, the output transitions to near the negative rail. That is, for a rising trip configuration (S), input and setpoint are both positive (W*05:1-2); for a falling trip configuration (R), input and setpoint are both negative (W*05:2-3).
For the Code S configuration, the initial charge on C*06 is small since both the setpoint and the clamped voltage are positive. During the transition, CR*06 turns off and CR*04 and CR*05 both turn on, with an abrupt shift in the voltage at the gate of Q*01. C*06 opposes the rapid transition as it reverses polarity and charges to the drop across the now forward-biased CR*04. However, this has no influence on the module response time, which is solely dictated by the time for U*01, the diodes, and Q*01 to change states. The transition from tripped to reset is slower than the transition from reset to tripped, as the former is influenced by the smaller R*08 and the latter is influenced by the larger R*07. However, both are on the order of microseconds.
For the Code R configuration, the initial charge on C*06 is large since the setpoint is negative and the clamped voltage is positive. The abrupt changes of state in the diodes have only a small effect on the voltage at the gate of Q*01 and C*06 has a much greater influence. However, with optimum values for R*07 and C*06, the time to reach the Q*01 threshold voltage is less than 750µs. Doubling the value of R*07 increases that time by approximately 50µs; increasing the value of C*06 by 50% adds 500µs. As in the Code S configuration, the transition from tripped to reset is on the order of microseconds even when doubling the value of R*08.
TRIP*: Q*01, Q*02. In the 503 series modules, these two devices are connected such that when Q*01 turns on, Q*02 turns off, and vice-versa. The Source connections on both are tied to Common.
Consequently, when the device is turned on, the respective Drain connection will be pulled up to Common (i.e., logic high). In contrast, when the device is turned off, the Drain will be pulled down by -VCC (i.e.,
logic low). As described in Section 2.4, pulling the Gate positive with respect to the Source will turn off the 11 The Burr-Brown 3656 isolation amplifier used a rectified and filtered signal from the windings of a miniature toroid transformer for its -V power supply. This required the external tantalum capacitor for further suppression of ripple. The CWND-I&C NUS-C017PA-1 isolation amplifier uses the inverted output of a Texas Instruments REF102AU for its -V power supply. The filtering capacitor is no longer required but has not be eliminated from the design.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 25 of 46 device and pulling the Gate negative with respect to the Source will turn it on. The Gate on Q*01 receives the signal from U*01 to Trip or Reset, as appropriate. The Gate on Q*02 is connected to the Drain of Q*01. Therefore, when the input to Q*01 is logic low, Q*01 is turned on and the input to Q*02 is logic high, which causes Q*02 to turn off. Normally, one of these two devices will control the behavior of both SSR*
(through W*06) and the front panel LED (through W*12); which device is determined by the required configuration. Q*01 will control for an NO Output (3) or Q*02 will control for an NC Output (4). If jumper W*12 is set for opposite logic, Q*01 will drive one device and Q*02 will drive the other.
Control Failure: These devices have a single Gate Threshold Voltage (GTV). The state is determined by whether the difference between Gate and Source is above or below that voltage. In both trip and reset states, the magnitude of the turn-on voltage exceeds the maximum 4.0V and the magnitude of the turn-off voltage is sufficiently below the minimum 2.0. Thus, there are two control failure scenarios. In one, a control voltage greater than the GTV fails to turn on the device. In the other, a control voltage less than the GTV fails to turn off the device. Since both failures are characterized by the absence of a state change, they would not be immediately detectable. However, both would be detected during calibration.
Inadvertent Failure: Because these are MOSFETs, two more failures should be considered. One specification for this device is a maximum drain to source leakage current when VGS = 0V and VDS is at rated voltage. Although the device is never operated near its rated voltage, it is credible to postulate excessive leakage current, even to the extent that the device fails to maintain the off state. Another specification for this device is maximum static drain-to-source on-resistance when VGS = -10V and ID is at rated current. Again, the device is never operated near its rated current, but it is credible to postulate excessive resistance, even to the extent that the device fails to maintain the on state. Since both failures are characterized by a state change, they would be immediately detectable.
Time Response: Additional specifications for this device are turn-on delay time, rise time, turn-off delay time and fall time. All of these are measured in nanoseconds, with only typical values specified.
These are all functions of the shape, size, and materials of construction. It is not credible to postulate changes to these parameters without an external influence. Consequently, no credible failure of this device can affect the response time of the module.
OUT: SSR*. This device controls the output by essentially switching it on or off. Use of MOSFET technology gives the relay a very low on-state resistance across the output terminals. The maximum turn-on voltage is 3.5V and the minimum turn-off voltage is 1.0V. In this application, the negative control terminal (4) is tied to -VCC and the positive control terminal (3) is connected to the drain of Q*01 or Q*02, depending upon the position of jumper W*06. When Q*01 or Q*02, as applicable, turns on, SSR terminal 3 is pulled to Common. This will apply VCC across the control terminals and turn on the SSR. In the opposite state, SSR terminal 3 will be set to -VCC.
Control Failure: For this binary-state controlled device, in which the turn-on voltage far exceeds the maximum and the turn-off voltage is sufficiently below the minimum, there are two control failure scenarios. In one, a control voltage greater than the turn-on voltage fails to turn on the device. In the other, a control voltage less than the turn-off voltage fails to turn off the device. Since both failures are characterized by the absence of a state change, they would not be immediately detectable.
However, both would be detected during calibration.
Inadvertent Failure: Because of the MOSFET output, two more failures should be considered. One specification for this device is a maximum off-state leakage current at rated voltage. Although the device is never operated near its rated voltage, it is credible to postulate excessive leakage current, even to the extent that the device fails to maintain the off state. Another specification for this device is maximum on-state resistance at rated current. Again, the device is never operated near its rated current, but it is credible to postulate excessive resistance, even to the extent that the device fails to maintain the on state. Since both failures are characterized by a state change, they would be immediately detectable.
Time Response: Two additional specifications for this device are maximum turn-on time (100µs) and maximum turn-off time (1.0ms). These are both functions of the shape, size, and materials of construction in the input section of the device. It is not credible to postulate changes to these CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 26 of 46 parameters without an external influence. Consequently, no credible failure of this device can affect the response time of the module.
3.5.3 Overall System When introducing failures that result in increases to 200% of the initial resistor values, increases of 50% in the capacitor values, and increases to 200% of the relay actuation time, where the failures may not be immediately detectable or detectable during calibration, the time delay of the SAM503 and DAM503 modules are not subject to any failures that would significantly change the module response times. The baseline response times will be determined by test.
4.0 TEST 4.1 Process Section 3.0 described several postulated failures based on the assumptions introduced in WCAP-14036-P-A
[Ref. 6.1]. Some of those failures could have a significant impact on module response times. However, many of the postulated failures would result in changes to other parameters that would make the failure detectable either immediately or during scheduled surveillance without response time testing.
A sample of each module type will be functionally tested, configured, and calibrated, followed by a baseline time response test. Simulations of failures will be performed as follows:
Doubling the value of a resistor requires that it be replaced on the circuit board. However, the process of physically modifying the board can itself affect the calibration. In most of the applications discussed above, changing the resistance would have an impact on characteristics other than response time.
This can be verified by externally placing an equivalent resistor in parallel with the mounted resistor to reduce the value of the resistor by 50%. If it can be verified that such a change would affect the static calibration, no further action will be required. If the change would remain undetected, the board will be physically modified by installing a resistor of twice the value of the original. The new resistor would remain on the board until the completion of all subsequent testing. After all resistors have been either replaced or eliminated, the board will be recalibrated and subjected to a new time response test.
Increasing the value of a capacitor by 50% can be accomplished without making any physical changes to the board. One or more external capacitors equal in value to half that of the mounted capacitor placed in parallel with the mounted capacitor will achieve the desired result. Since it is unlikely that a change in capacitance would be detectable during scheduled surveillance without response time testing, capacitors will be tested after all resistors have been either replaced or eliminated from further testing. A time response test will be performed after each change to capacitance; but the modified capacitor assembly will be left in place, rather than being removed, for the succeeding test. The final time response test will include all postulated failures.
4.2 mV/I Amplifier 4.2.1 Equipment Tested Failure simulation testing used the RTL500-3/13 (NUS-A138PA-3/13) module with serial number 1002980.
Although not used in any system that requires RTT, the RTL500 model is like the RTL501 model, with its high-range voltage output, in most respects. The presence of a filter in the CUR section of the RTL500 makes its data, including baseline measurements, more conservative than would be those of the RTL501.
4.2.2 Setup The specimen was configured for an NR-226 input in the range 50F (239.70) to 150F (266.81). The NR-226 RTD works with Foxboro modules to linearize the measurement as it enters a Wheatstone bridge. The RTL500 series modules use a different mechanism for processing RTD inputs. Consequently, the fixed resistance of 217.66 of the NR-226 between pins M20-F and M20-U would have no effect on the input of an RTL500 series module. Therefore, the fixed resistance was not installed for testing. However, the non-linearity inherent in the NR-226 bulb cannot be compensated fully by the RTL500 series compensation circuit. Initial CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 27 of 46 calibration settings, with SW5:2 set and the COMP potentiometer fully clockwise (i.e., maximum compensation),
established the following:
Input (+/-0.0125 )(12) 239.70 246.21 252.89 259.76 266.81 Desired Output (mA) 10.00 20.00 30.00 40.00 50.00 Measured Output (mA) 10.00 19.87 29.86 40.07 50.00 4.2.3 Baseline For voltage measurements of the output, a 100+/-2 load was installed between pins M20-W and M20-X. To simulate a transient for the response time test, a 6.5k load switched in parallel to a 260.00 load generated a transient from 260 to 250. The time from the start of the transient to the time at which the output reached 63% was defined as the module response time. The rising transient resulted in a measured response time of 56.0ms and the falling transient resulted in a measured response time of 35.5ms. In the test specimen, jumper W28 was installed, establishing an 8.8 Hz filter(13) with an 18ms delay in the output. The baseline results are shown in Figure 4-1.
Figure 4-1: RTL500 Baseline Time Response 4.2.4 Resistance RPM-13 and RCB R13.3 and R13.4: To access these resistors, the cover of the NUS-B120PA-13 personality module was removed. A 10k resistor was clipped into position between RPM-13 pins 7 and 16 (parallel to R13.3) and a calibration check was performed. As expected, there was no change to the calibration.
The 10k resistor was moved into position between RPM-13 pins 13 and 14 (parallel to R13.4) and a calibration check was performed. As expected, there was no change to the calibration. Both resistors were replaced with 20k resistors in the personality module. A calibration check verified that the modification itself did not affect calibration.
RN1C and RN1D: These are part of a Vishay M8340105K1001FG resistor network. There is no access to internal elements. Element C is electrically between RPM-13 pin 16 and U3 pin 2. Element D is electrically between RPM-13 pin 14 and U3 pin 3. A 1k resistor was clipped into position parallel to each element and a calibration check was performed. As expected, there was no change to the 12 Resistance values provided by PINGP based on use of an NR-226 bulb with a Foxboro module.
13 As discussed in Section 3.2.2, this filter is not installed in the RTL501.
CURTISS WRIGHT Agilent Technologies 6
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 28 of 46 calibration. The resistor network was replaced with 2k resistors per element. A calibration check verified that the modification itself did not affect calibration.
SPAN Rx (as set): As required for a span of 27.11, parallel resistors R26 and R28 are used to produce a feedback resistance of 20k. The failure of R26 was easy to simulate since the value of R27 is 50k.
Moving switch S4 to position 0x03 replaced R26 with R27 in the feedback loop. A calibration check verified that there was a significant effect on calibration. Although the effect of doubling the value of R28 (i.e., 11% change in circuit gain) would not be as significant as doubling the value of R26 (i.e.,
67% change in circuit gain), the effect would still be detectable. No change to this circuit was required for response time testing.
CAL R39 and R5.2: A 3.16k resistor was clipped into position across the leads of R39 and a calibration check was performed. As expected, there was a detectable change in the output. Because R39 and R5.2 are both in series in the U7B feedback path, it is possible to conclude that a failure of R5.2 will also be detectable. No change to this circuit was required for response time testing.
SUM2 R50: A 4.02k resistor was clipped into position across the leads of R50 and a calibration check was performed. As expected, there was a detectable change in the output.
R51(14): A 121 resistor was clipped into position across the leads of R51 and a calibration check was performed. As expected, there was no detectable change in the output. The resistor was replaced with one of 243 resistance. A calibration check verified that the modification itself did not affect calibration.
CUR R52: A 121 resistor was clipped into position across the leads of R52 and a calibration check was performed. As expected, there was no detectable change in the output. The resistor was replaced with one of 365 resistance (see CUR in Section 4.2.5). A calibration check verified that the modification itself did not affect calibration.
Time Response Test (Resistance Only): With the changes documented above to the RPM-13, RCB, SUM2 and CUR sections, the module was subjected to a time response test. As shown in Figure 4-2, the response time for a rising transient increased by 47.0ms, and for a falling transient increased by 49.0ms. It is important to note that much of this increase was due to the change in R52, which alone contributed 36.6ms. The RC filter created by R52 and C22 is not installed in the RTL501 module.
14 This is a wire jumper in the RTL501 module and has no potential failure mode that would affect response time.
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 29 of 46 Figure 4-2: RTL500 Failed Resistors Time Response 4.2.5 Capacitance RPM-13 and RCB C2: Two 0.33µF capacitors in series (0.165µf equivalent, +50%) were clipped into position between RPM-13 pins 14 and 16. This added 8.5ms rising and 6.5ms falling to the response time.
C4: Two 0.33µF capacitors in series (0.165µf equivalent, +50%) were clipped into position between U3 pins 2 and 3. This added 8.5ms rising and 6.5ms falling to the response time.
SPAN C11: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between U5 pins 1 and 2. This added 0.0ms rising and 1.5ms falling to the response time.
CAL C15: One 0.05µF (+50%) capacitor was clipped into position between R36 and TP8. This added 0.0ms rising and 0.0ms falling to the response time.
SUM2 C20: R50 and R51 are connected at one end. A 0.05µF (+50%) capacitor was clipped into position between the opposite end of each. This added 0.0ms rising and 2.0ms falling to the response time.
C21: One 0.5µF (+50%) capacitor was clipped into position between TP12 and TP14. This added 0.0ms rising and -1.5ms falling to the response time.
CUR C22: This circuit is designed to provide filtering using resistor R52 and the solid tantalum capacitor C22. The normal time constant with W28 installed is 121
- 150µF = 18.15ms. Increasing the capacitance by 50% is the same as increasing the resistance by 50%. Since the value of R52 required an increase to 200% of its optimum value (see Section 4.2.4), raising its value to 300% of its optimum would be the same as increasing the capacitance by 50%.
4.2.6 Final Time Response As noted in the CUR section above (Section 4.2.4), all changes were complete with the change to C21.
Consequently, the response times documented for C21 represent the final response time for a module with all postulated failures. The contributions of changes to the values of C2 and C4 (i.e., 17ms rising, CURTISS WRIGHT
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 30 of 46 13ms falling) were greater than anticipated in the analysis of Section 3.2.2 (i.e., 6.93ms). The final time response results are shown in Figure 4-3.
Figure 4-3: All RTL500 Failed Components Time Response Although the baseline response time to a falling transient is near that anticipated by the analysis when the 18ms filter time is removed, the much longer rising transient response time is more conservative. For the RTL501, a baseline response time of 38ms should be used. After also removing the 37ms contribution from the RC network that is not installed in the RTL501, the change in response time due to component degradation would be 27ms (total = 65ms), which is approximately that anticipated in the analysis.
4.3 Summator 4.3.1 Equipment Tested Failure simulation testing used the MTH500-05/00/00/00-08-08-03 (MBA-E156PA-1) module with serial number 1003038(15).
4.3.2 Setup The specimen was configured as described in PINGP specification J100-0008-013 Attachment 12, with Input
- 2 replaced by an internally generated signal. Input was provided by a 1-5V power source installed between pins M20-D and M20-F. For voltage measurements of the output, a 197 load was installed between pins M20-W and M20-X. Initial calibration settings established the following:
Input (+/-0.01 V) 1.00 2.00 3.00 4.00 5.00 Desired Output (+/-0.2 V) 7.92 5.92 3.92
< 2.00
< 2.00 Actual Output (V) 7.803 5.836 3.869 1.902 1.306 Actual Output (mA) 39.61 29.62 19.64 9.65 6.63 4.3.3 Baseline To simulate a transient for the response time test, the input power source was switched from 1V to 3V. The time from the start of the transient to the time at which the output reached approximately 63% was defined as the Rising input module response time. Falling input response time was also tested with the input power source switched from 3V to 1V. The baseline responses are shown in Figure 4-4 as Rising 2.765ms and Falling 3.215ms, which are close to the value anticipated by the analysis.
15 Except for this one Revision 0 module, all modules provided to PINGP were Revision 1. However, it is like those later modules in all respects pertaining to response time.
CURTISS WRIGHT 0;
Agilent Technologies Q
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 31 of 46 Figure 4-4: MTH500 Baseline Time Response 4.3.4 Resistance IN R3.1 and R7.1: A 174k resistor was clipped into position across the leads of R3.1, and a calibration check was performed. As expected, there was a detectable change in the output. Because R3.1 and R7.1 are both in series in the AR1.1 output stage feedback path, it is possible to conclude that a failure of R7.1 will also be detectable. No change to this circuit was required for response time testing.
FBS RN6A and RN6B: Since these two elements of a resistor network are in series and are both postulated to fail in the same manner, a 200k resistor was clipped into position between U6 pins 6 and 7. During a calibration check, there was a detectable change in the output. Consequently, no change to this circuit was required for response time testing.
DRV R8: The value applied to the non-inverting input of U7B is IN
- R8LOWER/R8. If the value of R8 changes, so does the value of R8LOWER. Consequently, the gain would remain the same. The trimmer was replaced by one with 200k total resistance for response time testing. A static calibration of the DRV circuit was performed with the new trimmer installed.
RN7: There are three elements to this resistor network. Because of its location on the board, it is not possible to simulate the failure of each element without replacing the network. The simplification in Figure 3-3 ignores the RN7C element and resistor R55 by setting the value of RN7B terminal 4 to zero. Instead, that value would be 0.091 times the value at the wiper of R7. Doubling the value of RN7C would reduce that to 0.048 times the value at the wiper, which would only be changed during calibration. Since the ratio of RN7A to RN7B would remain the same, the overall gain would not change. Consequently, the small zero shift may not be detectable during calibration. The Vishay M8340104K1003FG resistor network was replaced with four individual 200k resistors.
Time Response Test (Resistance Only): With the changes documented above to the DRV section, the module was subjected to a time response test. As shown in Figure 4-5, the response times increased for a rising input to 4.98ms, a change of +2.215ms, and for a falling input to 5.89ms, a change of +2.675ms.
CURTISS WRIGHT
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 32 of 46 Figure 4-5: MTH500 Failed Resistors Time Response 4.3.5 Capacitance IN C3.1: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between one lead of R3.1 and test point TP1.1. This contributed 0.38ms (rising input) and 0.05ms (falling input) to the response times.
FBS C54: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between U6 pins 6 and 7. This contributed -0.20ms (rising input) and 0.06ms (falling input) to the response times.
DRV C14: One 0.05µF (+50%) capacitor was clipped into position between U7 pin 5 and TP-COM. This contributed 2.34ms (rising input) and 2.70ms (falling input) to the response times.
C58: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between U7 pin 6 and TP51. This contributed 0.00ms (rising input) and 0.04ms (falling input) to the response times.
4.3.6 Final Time Response All changes were complete with the change to C58. Consequently, the response times documented for C58 represent the final response time for a module with all postulated failures. A rising input response time of 7.50ms (change of +4.735ms) and a falling input response time of 8.74ms (change of +5.525ms) are shown in Figure 4-6. This is consistent with the value anticipated in the analysis.
CURTISS WRIGHT 0;
Agilent Technologies 0:
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 33 of 46 Figure 4-6: All MTH500 Failed Components Time Response 4.4 Function Generator 4.4.1 Equipment Tested Failure simulation testing used the SGU501-06/06/00-08-08 (NUS-A258PA-1) module with serial number 1003044(16).
4.4.2 Setup The specimen was configured for Gull Wing #1 (upper limits equal) as described in NUS-A258GA [Ref. 6.11].
Specifically, the module was calibrated for the following:
OUT = 50mA, when IN -4.780V, where IN = IN1 - IN2 OUT = (IN x -11.142mA/V) - 3.259mA, when -4.780V < IN < -1.190V OUT = 10mA, when -1.190V IN 0.729V OUT = (IN x 5.000mA/V) + 6.355mA, when 0.729V < IN < 8.729V OUT = 50mA, when IN 8.729V 16 Except for this one Revision 0 module, all modules provided to PINGP were Revisions 2 and 3. However, it is like those later modules in all respects pertaining to response time.
CURTISS WRIGHT
\\Cv Agilent Technologies
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 34 of 46 These initial calibration settings established the following baseline:
IN1 (+/-0.01 V) 0.00 2.50 5.00 7.50 10.00 IN2 (fixed at 0.00 V)
Desired Output (+/-0.20 mA) 10.00 18.86 31.36 43.86 50.00 Actual Output (mA) 10.00 18.85 31.35 43.85 50.00 IN1 (fixed at 0.00 V)
IN2 (+/-0.01 V) 0.00 1.25 2.50 3.75 5.00 Desired Output (+/-0.20 mA) 10.00 10.67 24.60 38.52 50.00 Actual Output (mA) 10.01 10.65 24.58 38.51 50.00 4.4.3 Baseline To simulate a transient for the response time test, the value of IN2 was fixed at 2.5V and the value of IN1 was stepped from 0V to 10V. The output was dropped across a 100 resistor (101.7 measured). The effect was a transition from IN = -2.5V (OUT = 2.46V) to IN = 7.5V (OUT = 4.46V). The time from the start of the transient to the time at which the output reached approximately 63% (3.72V rising, 3.20V falling) was defined as the module response time, the baseline time responses of which are shown in Figure 4-7 and Figure 4-8.
Rise time was 41.0ms and fall time was 14.8ms. As the input passes through the zero point, the different breakpoint circuits are activated and deactivated. This causes the output to dip in response to the rising input and overshoot in response to the falling input. Consequently, the response times will not be consistent between the two measurements and will be affected by the distance of the starting and ending values from the zero point. For example, transitions between IN = -2.5V and IN = 2.5V would produce different results.
Figure 4-7: SGU501 Baseline Time Response, Rising Input CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 35 of 46 Figure 4-8: SGU501 Baseline Time Response, Falling Input 4.4.4 Resistance IN1 F1.1: A 22.6k resistor was clipped into position across the leads of F1.1, and a calibration check was performed. As expected, there was no detectable change in the output.
R14.1: A 562k resistor was clipped into position across the leads of R14.1, and a calibration check was performed. As expected, there was no detectable change in the output.
R3.1 and R7.1: A 174k resistor was clipped into position across the leads of R3.1, and a calibration check was performed. As expected, there was a detectable change in the output. Because R3.1 and R7.1 are both in series in the AR1.1 output stage feedback path, it is possible to conclude that a failure of R7.1 will also be detectable. No change to this circuit was required for response time testing.
BP1 RN101: These two elements of a resistor network are configured such that the circuit gain is determined by the ratio of one to the other. If both are postulated to fail in the same manner, the gain would remain unchanged. However, two other elements of the network are in the SUM circuit. A 100k resistor was clipped into position between TP105 and the top end of R67 (across RN101D, the active element). During a calibration check, there was a detectable change in the output.
Consequently, no change to this circuit was required for response time testing.
BP4 RN401: This is like RN101 in that the elements in the SUM circuit will affect the module gain.
Consequently, no change to this circuit was required for response time testing.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 36 of 46 SUM RN7: This is like RN101 and RN401, in that two elements are configured such that the circuit gain is determined by the ratio of one to the other. However, those two elements are related only to the fixed bias setting. Since the signal from BP4 passes through RN401C (100k), a change to the value of RN7B would affect the gain. A 100k resistor was clipped into position between U6 pins 1 and 2.
During a calibration check, there was a detectable change in the output when IN2 0. Consequently, no change to this circuit was required for response time testing.
RN11: A 200k resistor was clipped into position across the W43 pins, a 100k resistor was clipped into position across the W49 pins, and a calibration check was performed. As expected, there was a detectable change in the output. Consequently, no change to this circuit was required for response time testing.
R67: A 105k resistor was clipped into position across the leads of R67, and a calibration check was performed. As expected, there was a detectable change in the output. Consequently, no change to this circuit was required for response time testing.
R68: W67 was removed, a 402k resistor was clipped into position across the W67 pins, and a calibration check was performed. As expected, there was a detectable change in the output.
Consequently, no change to this circuit was required for response time testing. W67 was returned.
DRV R8: The value applied to the non-inverting input of U4A is IN
- R8LOWER/R8. If the value of R8 changes, so does the value of R8LOWER. Consequently, the gain would remain the same.
RN6: There are three elements to this resistor network. Because of its location on the board, it is not possible to simulate the failure of each element without replacing the network. The simplification in Figure 3-3 ignores the RN7C (RN6C) element and resistor R55 (R38) by setting the value of RN7B (RN6B) terminal 4 to zero. Instead, for the SGU501, that value would be 0.091 times the value at the wiper of R7. Doubling the value of RN6C would reduce that 0.048 times the value at the wiper, which would only be changed during calibration. Since the ratio of RN6A to RN6B would remain the same, the overall gain would not change.
Time Response Test (Resistance Only): One end of resistor F1.1 was lifted and a second 22.6k resistor was connected in series. One end of resistor R14.1 was lifted and a second 562k resistor was connected in series. Trimmer R8 was replaced by one with 200k total resistance for response time testing. The small zero shift from a change to RN6 may not be detectable during calibration. The resistor network with 100k per element was replaced with three individual 200k resistors. After these changes, the module was recalibrated and then subjected to the time response test described for the baseline. As shown in Figure 4-9 and Figure 4-10, the response times increased by 49.6ms (rising input) and 11.6ms (falling input).
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 37 of 46 Figure 4-9: SGU501 Failed Resistors Time Response, Rising Input Figure 4-10: SGU501 Failed Resistors Time Response, Falling Input CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 38 of 46 4.4.5 Capacitance IN1 VR1.1: One 0.22µF and one 0.015µF capacitors in parallel (0.235µF equivalent, +50%) were clipped into position between one lead of F1.1 and test point AB. The response times increased by 21.0ms (rising input) and 5.2ms (falling input).
R15.1: Two 0.018µF capacitors in series (0.009µF equivalent, +50%) were clipped into position between one lead of R14.1 and test point AB. The response times increased by 22.8ms (rising input) and 6.4ms (falling input).
C3.1: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between one lead of R3.1 and test point TP1.1. The response times increased by 3.0ms (rising input) and 0.4ms (falling input).
BP1 C103: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between U101 pins 6 and 7. The response times increased by 0.6ms (rising input) and -0.2ms (falling input).
BP4 C403: One 500pF capacitor (+50%) was clipped into position between U401 pins 6 and 7. The response times increased by -0.4ms (rising input) and 0.2ms (falling input).
SUM C32: One 500pF capacitor (+50%) was clipped into position between U6 pins 1 and 2. The response times increased by 1.8ms (rising input) and 0.2ms (falling input).
C33: One 500pF capacitor (+50%) was clipped into position between one side of R67 and TP11. The response times increased by 0.2ms (rising input) and 0.4ms (falling input).
DRV C6: One 0.05µF (+50%) capacitor was clipped into position between U4 pin 3 and TP COM The response times increased by 4.8ms (rising input) and 1.2ms (falling input).
C29: Two 1000pF capacitors in series (500pF equivalent, +50%) were clipped into position between U4 pin 2 and TP6. The response times increased by 3.2ms (rising input) and 0.8ms (falling input).
4.4.6 Final Time Response All changes were complete with the change to C29. Consequently, the response time documented for C29 represents the final response time for a module with all postulated failures. As shown in Figure 4-11 and Figure 4-12, module response times increased from the baseline by 99.4ms (rising input) and 25.2ms (falling input).
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 39 of 46 Figure 4-11: All SGU501 Failed Components Time Response, Rising Input Figure 4-12: All SGU501 Failed Components Time Response, Falling Input CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 40 of 46 4.5 Comparator Module 4.5.1 Equipment Tested Failure simulation testing used the DAM503-03 (EIP-E304DD-3) module with serial number 1002926(17).
4.5.2 Setup The specimen was configured as follows:
B - Single Input W1:1-2,4-5 (input on Channel 1); W3(X)
E - Independent Outputs W4(O); W5(O)
G - AC Hot Switched W9:1-2,3-4 Channel 1(/)
L - 5V W101(O); W102(O); W103:1-2 5 - Direct Connection W115:1-2,3-4 N - Setpoint > 40mV W100(O)
P - Normal Function Polarity W113:1-2,3-4 T - Total Adjustable Range (0-5V)
W111(X) 2 - 20% Offset W104:1-2 S - Trip on Rising Signal W105:1-2; W117:1-3,2-4 4 - Solid-State NC Trip W106:2-3; W109(X); W112:2-4 W - AC/DC > 5V Output Range W107(O); W108(O) 9 - Solid State Dry Contacts(18)
W110:2-3 Y - HIGH Terminal Switched W116:1-3,2-4 Channel 2(/)
H - Shorted W201(O); W202:1-2; W203:1-2 5 - Direct Connection W215:1-2,3-4 N - Setpoint > 40mV W200(O)
P - Normal Function Polarity W213:1-3,2-4 T - Total Adjustable Range (0-5V)
W211(X) 2 - 20% Offset W204:1-2 R - Trip on Falling Signal W205:2-3; W217:1-2,3-4 3 - Solid-State NO Trip W206:1-2; W209(X); W212:3-4 W - AC/DC > 5V Output Range W207(O); W208(O) 9 - Solid State Dry Contacts(18)
W210:2-3 Y - HIGH Terminal Switched W216:1-3,2-4 17 Except for this one Revision 5 module, all modules provided to PINGP were Revisions 6 through 12.
However, the main board parts list EIP-E286PA has been Revision 9 in most of the modules provided to PINGP. Later revisions (10 and 11) did not affect any components related to response time.
18 This setting is convenient for time response testing and does not represent a setting at PINGP.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 41 of 46 Other Jumpers Factory Settings W7(X), W8(X), W10(X), W11(O), W12(X) 50ms Response Time(19)
W114(O), W214:1-2 Each channel was calibrated for a trip setpoint of 3.000 VDC (50%) with a 20 mVDC dead band.
4.5.3 Baseline Each output was connected in series with a 600 resistor and a fixed 5 VDC power source. To simulate transients for the response time test, the input power source was switched from 1V to 5V or 5V to 1V. As shown in Figure 4-13 (yellow = input, green = output), Channel 1 (left) trips (output rise to logic 1) approximately 385µs after the rising input crosses the trip point. Channel 2 (right) resets (output rise to logic 1) with a delay of 30.1ms.
Figure 4-13: DAM503 Baseline Time Response, Rising Input On the falling transient, Channel 1 (left) resets (falls to logic 0) after 88.5µs and Channel 2 (right) trips (falls to logic 0) after a 29.8ms delay.
Figure 4-14: DAM503 Baseline Time Response, Falling Input 19 This is not a setting used at PINGP. Since the response time is jumper selectable, it is included here in the Channel 2 configuration for information only. The Channel 1 configuration represents that used in the PINGP RPS modules.
CURTISS WRIGHT Agilent Technologies WED OCT 05 11:33:07 2022 Agilent Technologies WED OCT 05 09:09:18 2022
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 42 of 46 These results are as expected for 100% transients with 50% setpoints. For Channel 2, the delay time is based on RC = 100k X 0.47µF = 47ms. Theoretically, the input would reach 50% at approximately 33ms.
4.5.4 Resistance IN1/IN2 R*04: A 200k resistor was clipped into position across the leads of R104. The Channel 1 trip and reset points were then checked for any shift. As expected, there was no detectable change in the trip or reset point. Resistors R104 and R204 were both replaced with resistors of 402k resistance. A calibration check verified that the modification itself did not affect calibration.
R*05: A 200k resistor was clipped into position across the leads of R105. The Channel 1 trip and reset points were then checked for any shift. As expected, there was no detectable change in the trip or reset point. Resistors R105 and R205 were both replaced with resistors of 402k resistance. A calibration check verified that the modification itself did not affect calibration.
COMP R*07: A 200k resistor was clipped into position across the leads of R107. The Channel 1 trip and reset points were then checked for any shift. As expected, there was no detectable change in the trip or reset point. Resistors R107 and R207 were both replaced with resistors of 402k resistance. A calibration check verified that the modification itself did not affect calibration.
R*08: A 1k resistor was clipped into position across the leads of R108. The Channel 1 trip and reset points were then checked for any shift. As expected, there was no detectable change in the trip. The reset point shifted by 24mV. Resistors R108 and R208 were both replaced with resistors of 2k resistance. A calibration check verified that the modification itself did not affect trip. Reset, however, shifted by -11mV (deadband decreased from 20mV to 9mV).
Time Response Test (Resistance Only): With the changes documented above, the module was subjected to a time response test. As shown in Figure 4-15, the response times increased by 28µs to 413µs for the Channel 1 trip and by 29.8ms to 59.8ms for the Channel 2 reset.
Figure 4-15: DAM503 Failed Resistors Time Response, Rising Input CURTISS WRIGHT
'.Cv Agilent Technologies
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 43 of 46 As shown in Figure 4-16, the response times increased by 1.0µs to 89.5µs for the Channel 1 reset and by 30.6ms to 60.4ms for the Channel 2 trip.
Figure 4-16: DAM503 Failed Resistors Time Response, Falling Input 4.5.5 Capacitance IN1/IN2 C102: Is not active as W114 is removed.
C202: Two 0.47µF capacitors in series (0.235µF equivalent, +50%) were clipped into position across CR201. This added 35.6ms to the Channel 2 trip time and 34.8ms to the Channel 2 reset time.
COMP C106: Two 1.0µF capacitors in series (0.5 µF equivalent, +50%) were clipped into position across CR104. This added 27.5µs to the Channel 1 trip time and -0.3µs to the Channel 1 reset time.
C206: Two 1.0µF capacitors in series (0.5 µF equivalent, +50%) were clipped into position across CR204. This added 0.4ms to the Channel 2 trip time and -0.4ms to the Channel 2 reset time.
4.5.6 Final Time Response All changes were complete with the change to C206. Consequently, the response time documented for C206 represents the final response time for a module with all postulated failures. Response times for a rising input are shown in Figure 4-17 and those for a falling input are shown in Figure 4-18. For Channel 1, there was an increase of 45.5µs (total = 430.5µs) to the trip time and an increase of 0.7µs (total = 89.2µs) to the reset time.
For Channel 2, there was an increase of 65.0ms (total = 94.8ms) to the trip time and an increase of 65.5ms (total = 95.6ms) to the reset time. Note again that the Channel 2 configuration is not used at PINGP for RPS modules. The information is presented here for reference only.
CURTISS WRIGHT
- C*
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 44 of 46 Figure 4-17: All DAM503 Failed Components Time Response, Rising Input Figure 4-18: All DAM503 Failed Components Time Response, Falling Input
5.0 CONCLUSION
S 5.1 mV/I Amplifier (RTL501)
Analysis predicted a response time increase of 27.94ms above a baseline of 14.39ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 56.0ms for a rising transient and 35.5ms for a falling transient. During testing, changes in the resistance values of R13.3, R13.4, RN1C, RN1D, R51 and R52 combined to add 49ms to the modules falling transient response. The modules rising transient response increased by 47ms. However, all tests (including the baseline) were performed using an RTL500 module. The RTL501 module does not include the R52/C22 filter. The contribution of that filter alone was estimated at 36.6ms. Changes in the capacitance values of C2, C4, C11, C15, C20 and C21 added 17ms to the modules rising response time and 13ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1.
5.2 Summator (MTH500)
Analysis predicted a response time increase of 5.4ms above a baseline of 3.0ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during CURTISS WRIGHT Cv Agilent Technologies 0:
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Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 45 of 46 calibration. The measured baseline response times were 2.765ms for a rising transient and 3.215ms for a falling transient. During testing, changes in the resistance values of R8 and RN7 combined to add 2.675ms to the modules falling transient response. The modules rising transient response increased by 2.215ms. Changes in the capacitance values of C3.1, C54, C14 and C58 added 4.735ms to the modules rising response time and 5.525ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1.
5.3 Function Generator (SGU501)
Analysis predicted a response time increase of 51.20ms above a baseline of 26.51ms due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 41.0ms for a rising transient and 14.8ms for a falling transient. Note that these values are determined by the test parameters since the configuration of the module produces a gull-wing output. The same parameters were used for subsequent testing to determine the changes due to postulated failures and not to changes in the test itself. During testing, changes in the resistance values of F1.1, R14.1 R8, and RN6 combined to add 9.8ms to the modules falling transient response. The modules rising transient response increased by 49.6ms. Changes in the capacitance values of VR1.1, R15.1, C3.1, C103, C403, C32, C33, C6 and C29 added 49.8ms to the modules rising response time and 13.6ms to the modules falling response time. The baseline and worst-case fault response times are summarized in Table 5-1.
5.4 Comparator (SAM503, DAM503)
Analysis predicted negligible change to the response time due to credible failure modes, associated with components within this module, that would not be immediately detectable or detectable during calibration. The measured baseline response times were 385µs for a trip and 88.5µs for a reset. During testing, changes in the resistance values of R104, R105, R107 and R108 combined to add 28µs to the modules trip time. The modules reset time increased by 1µs. A change in the capacitance value of C106 added 45.5µs to the modules trip time and 0.7µs to the modules reset time. The baseline and worst-case fault response times are summarized in Table 5-1.
5.5 Summary Table 5-1:
Response Times Module Baseline Worst-Case Failures Total Rising/
Trip Falling/
Reset Rising/
Trip Falling/
Reset Rising/
Trip Falling/
Reset RTL501 (20) 38.0ms 17.5ms 27.0ms 25.0ms 65.0ms 42.5ms MTH500 2.765ms 3.215ms 6.950ms 8.200ms 9.715ms 11.415ms SGU501 41.0ms 14.8ms 99.4ms 23.4ms 140.4ms 38.2ms SAM/DAM503 385.0µs 88.5µs 73.5µs 1.7µs 458.5µs 90.2µs 20 These values are adjusted for use of an RTL500 for testing. Since the RTL501 does not include the filter circuit, values of 18ms and 37ms were removed from the baseline and worst-case fault figures, respectively.
CURTISS-WRIGHT
Curtiss-Wright l Nuclear Division Instrumentation and Controls FMEA for Series 500 Modules, Time Response Assessment NUS-G091FA Rev. 1 Page 46 of 46
6.0 REFERENCES
6.1 WCAP-14036-P-A, Elimination of Periodic Protection Channel Response Time Tests, October 1998 6.2 NUS-A086MA, RTL Version 2 Operation & Maintenance Manual 6.3 NUS-A255MA, RTL Version 2 Operation and Maintenance Manual Supplement for High Voltage Output Option 6.4 NUS-A045MA, MBA500 Version 2 Master Board Module Operations and Maintenance Manual 6.5 NUS-A075MA, GEN500 Module Operations and Maintenance Manual 6.6 EIP-M-DAM503, 503 Series Alarm Modules Operation and Maintenance Manual 6.7 NUS-A118MA, SAM503 Single Alarm Module Operation & Maintenance Manual 6.8 NUS-A138QA, RTL500 Series Version 2 Qualification Report 6.9 NUS-A086QA, RTL900-550 Series Qualification Report 6.10 NUS-A122SA, Equivalency Review of SGU501 Function Generator to Foxboro Static Gain Unit 6.11 NUS-A258GA, Module Configuration Information Document for SGU501-06/06/00-08-08 Function Generators CURTISS-WRIGHT
RTT Methodology Evaluation Report Prairie Island Nuclear Generating Plant Rev 1 Page 19 of 19
- NSPM-TANL-TM-AA-000005, Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2 - for License Amendment Request - Rev. 0
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Westinghouse Non-Proprietary Class 3 Page 2 of 6 NSPM-TANL-TM-AA-000005, Revision 0 Safety Analysis, Risk Applications, and Licensing From:
Transient Analysis
Subject:
Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2 - for License Amendment Request To:
Sean F. Miller cc:
Uriel Bachrach
References:
- 1. NF-XCEL-22-065, Revision 0, Design Input Transmittal - Update on Trip Values used by Westinghouse in Safety Analysis, November 2022. (Xcel Energy letter OC-PX-2022-002)
- 2. NSPM-TANL-TM-AA-000004, Revision 0, Evaluation of Increased High Positive Neutron Flux Rate Reactor Trip Response Time of 0.6 second for Prairie Island Units 1 and 2, November 2023.
- 3. NF-XCEL-23-060, Revision 1, Prairie Island Nuclear Generating Plant Positive Neutron Flux Rate Reactor Trip Analysis, November 2023.
This letter contains a non-proprietary version of the evaluation documented in Reference 2 and transmitted in Reference 3, for use by Xcel Energy in their license amendment request for the proposed change. The technical content herein is the same as in Reference 2, which remains valid, except that the internal Westinghouse references and supplemental information not directly related to the proposed change have been removed.
=
Background===
Per Reference 1, Prairie Island intends to submit a license amendment request (LAR) to eliminate Periodic Response Time Testing of Reactor Trip Signals by establishing bounding Response Times. The updated bounding trip time of 0.501 second provided in Reference 1 for the Positive Neutron Flux Rate Trip (PFRT) exceeds the delay time used by Westinghouse for some safety analysis cases by 0.001 second, but a more limiting value of 0.6 second is proposed in Reference 1 for Westinghouse to address relative to the safety analyses. The PFRT function is credited in the safety analysis of the Uncontrolled RCCA (Rod Cluster Control Assembly) Withdrawal at Power (RWAP) event, which is described in Section 14.4.2 of the Prairie Island Updated Safety Analysis Report (USAR). Multiple RWAP cases were considered to confirm the applicable safety analysis limits for minimum departure from nucleate boiling ratio (DNBR), peak reactor coolant system (RCS) pressure, and peak main steam system (MSS) pressure are met. The PFRT function is credited in combination with the power range high neutron flux (HNF) (high setting), overtemperature T (OTT), and high pressurizer pressure reactor trip functions. Whereas a PFRT response time of 0.5 second was applied in the minimum DNBR and peak MSS pressure cases, a bounding PFRT response time of 3.0 seconds was applied in the peak RCS pressure cases. An increase in the PFRT response time will impact those minimum DNBR and peak MSS pressure cases that result in a reactor trip from the PFRT function.
Xcel Energy has contracted with Westinghouse to evaluate the RWAP safety analysis cases that result in a reactor trip from the PFRT function relative to an increase in the PFRT response time from 0.5 second to 0.6 second. The impacted cases that modeled the Replacement Steam Generators (RSGs) will be considered in the evaluation. The current RWAP safety analysis addressed both the Original Steam Generators (OSGs) and the RSGs, but since both Prairie Island units now have RSGs installed, only the RSGs need to be considered.
- This record was final approved on 05/03/2024 10:23:17. (This statement was added by the PRIME system upon its validation)
Westinghouse Non-Proprietary Class 3 NSPM-TANL-TM-AA-000005, Revision 0 Page 3 of 6 Evaluation RWAP Cases Analyzed for DNBR A review of the RWAP analysis confirmed that a response time of 0.5 second was applied for the PFRT in cases analyzed for the DNBR criterion. The analysis considers RWAP cases initiated from different power levels (100%, 60%, and 10%) with both maximum and minimum reactivity feedback models and a range of reactivity insertion rates (from 1 to 110 pcm/sec). The PFRT does not occur in any of the cases analyzed with maximum feedback cases. The PFRT does occur in some cases analyzed with minimum reactivity feedback, but only in those with relatively high reactivity insertion rates. Maximum reactivity feedback cases and minimum reactivity feedback cases with relatively low reactivity insertion rates trip on either OTT or HNF. For each of the three initial power levels considered, the limiting minimum DNBR for minimum reactivity feedback results from cases with a reactor trip on HNF or OTT and not PFRT. There is significant DNBR margin between the results for cases that trip on PFRT and the limiting cases that do not trip on PFRT, such that the PFRT response time could be increased by 0.1 second without affecting the conclusion that the cases that trip on PFRT are not limiting. Therefore, the current RWAP safety analysis results show that the impacted cases that trip on PFRT continue to be bounded by the results of other cases.
Section 14.4.2 of the Prairie Island USAR presents results of RWAP cases with a reactor trip on PFRT, which could be adversely impacted by the increase in PFRT response time to 0.6 second, even though the results would remain bounded by the results of other cases. Specifically, USAR Table 14.4-3 presents the time sequence of events results for a RWAP initiated from full power with minimum reactivity feedback conditions that has a reactor trip on PFRT. USAR Figures 14.4-6 to 14.4-11 show the transient response for this case. USAR Figures 14.4-18, 14.4-19, and 14.4-20 show the minimum DNBR as a function of reactivity insertion rate for cases analyzed for different initial power levels (100%, 60%, and 10%,
respectively) for both minimum and maximum reactivity feedback.
It has been determined that the current RWAP analysis included conservatism in the modeling of the PFRT setpoint that is sufficient to offset a PFRT response time increase of 0.1 second without affecting the reported results. The PFRT safety analysis limit setpoint is 6.06%, with a 2-second time constant. However, the analysis conservatively modeled a higher setpoint of 9%, with a 2-second time constant, in all RSG cases with a reactor trip on PFRT. In all cases a setpoint of 6.06% is reached more than 0.1 second before the modeled setpoint of 9% is reached. This was confirmed through a re-run of the RSG case that has the earliest reactor trip on PFRT, which is the minimum reactivity feedback case initiated from 100% power with a reactivity insertion rate of 110 pcm/sec. This case has the fastest nuclear flux rate increase and is therefore most susceptible to being adversely impacted by the additional time to reach the 9% PFRT setpoint. The case was rerun to obtain the output for the rate-lagged indicated nuclear power. The output shows that the setpoint of 9% was exceeded with a value of 0.09308 at 0.75 second transient time, and rod motion occurs 0.5 second later at 1.25 seconds transient time. The rate-lagged indicated nuclear power 0.1 second earlier, i.e., at 0.65 second transient time is 0.0797. This demonstrates that the setpoint of 6.06%
is reached more than 0.1 second earlier than the time the PFRT signal generation occurs in the analysis.
This confirms that the setpoint margin inherent in the analyses is sufficient to offset an additional 0.1-second PFRT delay with no impact on reported results.
RWAP Cases Analyzed for RCS Pressure With respect to RCS overpressurization concerns, a bounding PFRT response time of 3.0 seconds was conservatively applied in the peak RCS pressure cases analyzed for Prairie Island. Therefore, an increase in the PFRT response time from 0.5 second to 0.6 second does not impact the RCS overpressurization analysis.
- This record was final approved on 05/03/2024 10:23:17. (This statement was added by the PRIME system upon its validation)
Westinghouse Non-Proprietary Class 3 NSPM-TANL-TM-AA-000005, Revision 0 Page 4 of 6 RWAP Cases Analyzed for MSS Pressure With respect to MSS overpressurization concerns, the acceptance criterion is not challenged for the RWAP event, based on sensitivity analyses. It is also noted that the MSS overpressurization cases that trip on PFRT are for higher reactivity insertion rates and result in an earlier reactor trip generation than the limiting MSS pressure cases, which do not trip on PFRT. Therefore, an increase in the PFRT response time from 0.5 second to 0.6 second does not impact the conclusions of the MSS overpressurization analysis.
Conclusion When the PFRT response time is increased from 0.5 second to 0.6 second the results of the affected RWAP safety analysis cases that result in a reactor trip from the PFRT function remain bounding and are bounded by other cases. The conclusions of the USAR remain valid. Suggested markups of the USAR reflecting the increased delay (and correcting existing errors) are attached, as described in the following section.
Recommended USAR Changes Section 14.3 of the Prairie Island USAR lists the time delay and setpoint assumed for each reactor trip function used in the analysis. The PFRT setpoint is listed as 6.06% / 2 sec (i.e., a setpoint of 6.06% with a 2-second time constant) and the associated delay is listed as 0.5 sec. Based on the evaluation herein, the delay can be changed to 0.6 sec. The safety analysis limit setpoint of 6.06% remains valid. This change is shown in the attached suggested USAR markups.
USAR Table 14.4-3 includes time sequence of events results for the RWAP case analyzed for DNBR initiated from full power with minimum reactivity feedback conditions and a high reactivity insertion rate that has a reactor trip on PFRT. During this evaluation, it was discovered that the reactivity insertion rate identified for Case A in USAR Table 14.4-3 is incorrect and should be corrected to 110 pcm/sec. In addition, the listed time the rods begin to move is incorrect and should be corrected to 1.25 seconds. Based on the evaluation herein, the time the PFRT trip setpoint is reached can be changed to be 0.1 second earlier (i.e., 0.65 second). This change and the corrected values in the table are shown in the attached suggested USAR markups.
This letter was created and verified in accordance with Westinghouse Level 2 Procedure W2-6.1-101. If there are any questions, please contact the originators of this letter.
- This record was final approved on 05/03/2024 10:23:17. (This statement was added by the PRIME system upon its validation)
Westinghouse Non-Proprietary Class 3 NSPM-TANL-TM-AA-000005, Revision 0 Page 5 of 6
Attachment:
Suggested USAR Markups
- This record was final approved on 05/03/2024 10:23:17. (This statement was added by the PRIME system upon its validation)
Westinghouse Non-Proprietary Class 3 NSPM-TANL-TM-AA-000005, Revision 0 Page 6 of 6
- This record was final approved on 05/03/2024 10:23:17. (This statement was added by the PRIME system upon its validation)