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Responds to NRC 861120 Request for Addl Info Re Isolation Devices.Analyses & Supporting Info on Westinghouse P-250 & Modcomp ERF Computer Analog I/0 Supply Configurations Encl. W/10 Oversize Drawings
	ML20207S611
Person / Time
Site:	Fort Calhoun
Issue date:	03/13/1987
From:	Andrews R; OMAHA PUBLIC POWER DISTRICT
To:	; NRC OFFICE OF INFORMATION RESOURCES MANAGEMENT (IRM)
Shared Package
ML20207S612	List: ML20207S611; ML20266E818; ML20266E823; ML20266E826; ML20266E831; ML20266E835; ML20266E838; ML20266E842;
References
	LIC-87-129, NUDOCS 8703200095
	Download: ML20207S611 (48)
	v • d • e

{{#Wiki_filter:.: Omaha Public Power District 1623 Harney Omaha. Nebraska 68102 2247 402/536-4000 i March 13, 1987 l LIC-87-129 l U. S. Nuclear Regulatory Commission Document Control Desk Washington, DC 20555

References:

1. Docket No. 50-285 2. Letter from OPPD (R. L. Andrews) to NRC (J. R. Miller) dated December 7, 1984 3. Letter from OPPD (R. L. Andrews) to NRC (E. J. Butcher) dated November 8, 1985 4. Letter from 0 PPD (R. L. Andrews) to NRC (A. C. Thadani) dated December 9, 1985 5. Letter from OPPD (R. L. Andrews) to NRC (A. C. Thadani) dated August 20, 1986 6. Letter from NRC (D. E. Sells) to OPPD (R. L. Andrews) dated November 20, 1986 Gentlemen:

SUBJECT:

Request for Additional Information Regarding Safety Parameters Display System Isolation Devices References 2 through 5 provided information regarding the Safety Parameter Display System and related isolation devices to be installed at Fort Calhoun Station. In Reference 6 the NRC requested that OPPD provide additional informa-tion on isolation devices. In response to this request, OPPD is providing the following additional supporting information. NRC Reauest: 1. Reference 5 described an analysis performed with respect to the energy source within the analog termination cabinets. Provide the analysis for staff review. The response should include circuit diagrams of the cabinets showing the numeri-cal values of the voltages present and the potential driving current associated with each voltage. 8703200095 870313 PDR ADOCK 05000285 ) P PDR i 00' q 4$ h l 2.3 ( FT1 plt tyf Drf1( h ilh ( Qlldl llppilfIllDily MJIt> f Pffldit'

U. S. Nuclear Regulatory Commission -LIC-87-129 Page 2 OPPD Response: Attached are analyses and supporting information on the Westinghouse P-250, i, and the MODCOMP, Attachment 2, ERF computer analog I/O power t' . supply configurations which could effect the analog input IE/non IE isolation devices. OPPD has determined that both the P-250 and the ERF computer systems have similar maximum credible faults. In both cases, the credible fault is considered to be a fault of the 120 VAC 60Hz power supply to the computer I/O 4 processors. The ERF is a 120 VAC 7A fused input. The P-250 is a 120 VAC 15 amp breaker protected input. Please note that the large 120 VAC cabinet feeder for the ERF I/O multiplexer and 3 phase 208 VAC P-250 distribution is installed such. that 'the possibility of this fault is considered highly unlikely. The 120 VAC credible fault is considered to be consistent with previous sub-mittals and with testing done on the GA isolation cards located in the Reactor Protection System neutron flux monitoring channels. OPPD has included circuit diagrams, cabinet layout drawings and applicable 4 extracts from vendor manuals to support your review. Additionally, we have conducted the necessary computer equipment field inspections. OPPD considers the analysis which was performed to be conservative since the highest voltage (120 VAC) supply to the related analog I/O D.C. supplies was used and the 4 analysis did not take credit for the isolation capability of the power sup-plies. Our analysis did not identify any new challenges to the existing 4 isolation devices which would be different form those previously reviewed and approved during-the review of the original design of Fort Calhoun Station. NRC Reauest: 2. Reference 2 contained Enclosure 10 which is a very brief description of the GA buffer amplifier Model BA-1A. The enclosure stated that the amplifier output may be shorted to AC line voltages without affecting the input signals. Pro-vide more detail with respect to this ability of the amplifier. The response should include the basis for the statement, the potential driving current avail-t able during the test (if tested) and the pass / fail criteria used to determine that the input signals were not affected. t OPPD Response: To date neither OPPD, the NSSS vendor, nor the buffer card manufacturer, Gen-i eral Atomics (GA), has been able to locate the test data on the buffer cards. OPPD discussion with GA indicates that the isolation testing statement indicat-ing 120 VAC isolation capability would not have been made in the vendor manual j if testing had not been completed. Please note, the USAR statement regarding i 120 VAC isolation capability is a quote from the GA vendor manual. At present i OPPD has no reason to question the GA vendor manual, and believes the 120 VAC 4 - -,.. -,... - -. -.,. _. _. _ - - - - - - - _. -.,. ~

U. 'S. Nuclear Regulatory Commission LIC-87-129 - Page 3 isolation is adequate. This configuration was previously approved during the design review of Fort Calhoun Station. Therefore, OPPD believes that no additional review should be required. OPPD requests that the NRC close this item based on the information presently available. R. L. Andrews Division Manager Nuclear Production RLA/me Attachment c: LeEoeuf, Lamb, Leiby & MacRae A. C. Thadani, NRC Project Director w/o attachment W. A. Paulson, NRC Project Manager P. H. Harrell, NRC Senior Resident Inspector f i i e. J

n ATTACHMENT 1 P250 COMPUTER The Westinghouse P-250 analog I/O termination cabinet houses the field signal cable terminal

blocks, the I/O multiplexer cards, and two RTD bridge power supplies.

The multiplexer _ cards use a 26VDC power supply to accomplish the relay controlled multiplexing function. Other power supplies in the P250 are: 48 VDC .2A 15 VDC RTD Bridge Supply -26 VDC 17A Fused at 10A 10 VDC Fused at I amp 6.3 VAC. Fused at I amp 125 VDC CCI Contact Wetting Voltage not part of the analog I/O 125 VAC 15 amp Filtered AC for the Power Supplies The power' supplies are fed from a 15A 120VAC source via a plug strip mounted in the Y panel. Please ' cote the panel contains the CCI I/0, the A/D conversion equipment, the power. supplies, and the inverter supplied 208 VAC 3 phase distribution panel for the computer system. If. cascading failures occurred this could result in the presence of 120 VAC 15 amp at the I/O terminals. This is considered the maximum creditable fault within the P-250 computer system. Please note that 208 VAC 3 phase is used only i_n the CPU and disc drive (RAD). This voltage is considered to be isolated from the I/O by the many steps of signal processing as shown Figure 2-1 Analog-to-Digital Conversion System Block Diagram. The 125 VDC and 48 VDC are not associated with the analog signal processing system. The following drawings of the P-250 configuration and owners manual sections are attached: Portions of Manual Process I/O System Description Portions of Manual Analog Multiplex Relay Card Portions of Manual Y Panel Cabinet Standard Equipment Portions of Manual A/D Conversion Block Diagram Drawing 807C576 Sheet 1 Drawing 807C573 Sheet 1 Drawing 105D782 Sheet 1 i Drawing 398D455 Sheet 1 Drawing 1050664 Sheet I f

'e W SECTION 1. PROCESS 1/0 SYSTEM DESCRIPTION r 1-1. INTRODUCTION and these are used for the Programmer's Console in-terface circuit cards and the Channel Buffer card for This section contains a general description of the P250 the I-Panel interrupt number. Process I/O System, depicting its expandability, stan-dard and optional configurations. In addition, the Y-The addressing capabilities of the P250 CPU allows for Panel (VO) cabinet is broken down to show power con-256 peripheral channels. In addition, the first 64 chan-nections and distribution, grounding connections, intra-nets may each be combined with 64 word addresses for cabinet signal connections, and customer connections. multiplexing. This allows unique addressing for up to 4,096 (64 x 64),14-Bit Data Words. 1-2, GENERAL DESCRIPTION The interface between the CPU and the Process I/O Communication between the CPU and the process being system is the Y-Panel, located in the Y-Panel cabinet. controlled is handled through the Process I/O System. The Y-Panel cabinet (designated 00) and subsequent I/O Access to the CPU la through the External Direct I/O cabinets (designated 01 --- (n) ) also contain the inter-Channel. This channel uses the Read Direct (RD) and face circuitry for the Process Control subsystems which Write Direct (WD) instructions to transmit and receive may be used in a particular system. control and data signals between the CPU and the Pro-cess I/O devices. Figure 1-1 shows a P250 system 1-3. Y-PANEL (1/0) CABINET BREAK 00WN configuration of 2 I-Panels and 8 D-Panels (Word and Channel Addresses are shown in decimal. This is a The Y-Panel cabinet (designated 00) serves as the basic large system and in no way typical. The purpose of building block for the Process I/O system. It always the figure is to illustmte the expandability of the Pro-contains the Y-Panel (Process I/O Coupler), the I-Panel cess I/O system and not to imply any standard word (Interrupt Scan System), the AC Power Distribution and channel assignments. In actual practice, for ex-Panel, and the DC Power Supply. These standard items are covered in detail in Section 2 ample, the D3 Panel is assigned channels 40g - 55g l;?L'n".:" uo'O ' "*lo'*%*"0 "" e ti s meet cara tms ' PANEL 7 H8,Quta engmo sawg

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1 i e me e to o g t, PANEL amo mut I E 8 i M l i l i l S I O Ii i T! Of 02 03 I4" a DS Os CPU PANEL PANEL PANEL PANEL PANEL PANEL PANEL t h, 8 e t 8 a ] e p p e "* "*l 1 1 1 I l i ti! 0(K i i i i i o==n e aa. sono e as y '""n' e...ar, w wo acomss PANEL o .a....o me aoo= u o.a.n.= em,o no ano=u FIGURE l-1. PROCES$ I/O BLOCK DIAGRAM 1-1 TP014

r1 W ese i A timplified block diagram of the Y-Panel cabinet is 1-4.1/0 Panel Ceafiguation thown in Figure 1-17. This diagram shows the basic configurations for the subsystems used in the Prncesd The Process I/O circuitry is built up in the I/O cabinet 1/O System and the standard configurations for the Y-on 19" rack-mounted panels. (See Fig.1-2.) Each Panel and 1-Panel. panel has provisions for housing 16 printed circuit cards. Each carti is inserted into the panel and con-For larger systems. any additional panels required nected at the rear by two 18-terminal Sylvania connec-for Analog Inputs or Outputs, or Contact Closure In-tors. In addition to the rear connections each card puts or Outputs which would not have room in the Y-has a 35-Pin ELCO connector mounted at the front. Panel cabinet would be housed in additional I/O cabi-nets (designated 01 through 0 (n) ). Input and output connections to the panel can be made A NEc 4N N II 18SY yANIA g& cano C#8 gf 8, oc p _,.. //,y y l l I p# g l( l g c,n 4 ,gl I, l N g i i N, s i,iN h b l I l $) 'g L "' 2 -c ,> d.3, s ' c i i i I i @ i 5-I f !!l N l l l J' d l +, i i s i i i 0 c i i i i,, '. i i i i 1 e

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.lM N i I l l I '\\ Nh3 ',hhWp;;?'... [is a ',3e'*' N I!g di.;. M 0 s N f O j / Nf0T CON 8 I NEcf0 ,w* pin co CON a eLO " C gNAL ptN n p gLL4 gg i l l FIGURE l-2. PROCES$ I/O PANEL CONflGUR ATION TP014 1-2 l

y at the five 56-Pin ELCO connectors located under the (01 through 0 (n) ); the AC Power Distribution Panel. -3 card slots. These connectors are designated 2t. 22 DC Power Supply. Y-Panel, and the I-Panel are not 23, 24. and 25. In addition. Input / output connections installed, so these locations may be occupied by other may be made directly at the circuit cani 35-Pin ELCO panels. connectors (designated 1 through 16). 1-5. Catiset Cessestless Power connections for the panel are made at the 10-lug terminal block at the bottom of the panel (designated 1-6. Signal Connections TB31). Connections to the process being controlled and to the Several different types of panels have been designated peripheral devices are made at the front of the cabinet for use in the I/O cabinet. These panels are: by the 56-Pin ELCO connectors in locations "AA" and "lill" and at the rear of the cabinet by Curtis terminal Panel tJse blocks (these are called half-shell connectors). or 56-Pin ELCO Connector panels. These panels are shown A-Panels A-Panels contain wnrd and chan-in Figures 1-3 and 1-4. nel selection cards and interface circuitry for the Analog Input The rear of the I/O cabinet is divided into Zones as Subsystem, shown in Figure 1-4. Terminal designations for one zone of half-shells are shown in Figure 1-6 Italf-D-Panels D-Panels contata: word and shell connectors are also available in a thermally iso-channel selection cards for ('on-lated junction box (TJD) which takes up two zones and tact Closure Output. Analo; is used for Analog Input connections. The Thermal Output subsystems; channel buf-Junction Dox terminal configuration is shown in Figure fer cards for contact closure in-1 -7 put subsystems; and interface circuit cards for all direct chan-Where connector panels are used instead of Ilsif-Shells nel peripheral devices, in the rear of the cabinet, they are situated directly to the rear of the I/O panel which they service and are I-Panels The I-Panel contains the cir-designated by letters corresponding to the I/O panel. cultry for the Interrupt Scan For example, the I/O panel in location M has its con-System. L'p to 128 interrupts nector panel located directly behind it and its connec-may be processed. tors are designated M01 through MIG. Q-Panels Q-Panels contain multiplexer Connections to the CPU are taken directly from the card circuit cards for Multiplexed edge connectors of the Y-Ibnel. These connector Contact Closure Input Subsys-breakdowns are given in Section 2. tems, and Interrupt Filter cants for conditioning external inter. 1-1. DC Power Connections rupts. The DC Power Distribution Diagram is shown in Figure X-lwnels X-I%ncia contain the process 1-7. Notice that the + 8V. + 4V and -8V supplies are it.terface cards for Analog Input, taken directly from the CPU DC Power Supply (PT16). Analog Output, and Contact Clo-The Y-14ncl Cabinet DC Power Supply provides + 26V sure Output Subsystems, to all panels, and + 10V de and 6.3V ac to the A-Ibnel (Analog Input). The Y-lunel Cabinet DC Power Supply Y-Ibnel The Y-Ibnel contains the cir-also supplies 48V de (125V de optional) to Taper Pin cultry for the I/O Coupler Sys-busses above each panel as shown in Figure 1-9. These tem which interfaces with the busses provide a convenient voltage source for genera-CPU. tion of internspts and for use in Contact Closure inputs. On all P250 systems, the Taper Pin busses on the I. Y, and D3-lunels must be supp!!cd with 48Vdc. These panels are mounted in the Y-lunct cabinet in to-i cations shown in Figure l<l. Optional front cabinet See Section 2 for a more detailed description of the DC configurations are shown in Figure 1-5 p, g g, y in the Y-l$anel cabinet (00) location "F" is always 1-0. AC Power Distribution occupied by the Y-Ibncl. and location "E"is always occupt,.I by the I-IMnel. In subsequent 1/0 cabinets The AC Power Distribution Diagram is shown in Figure 1-1 TP014 l

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I 4 I.i.i:$: [:[:,,, I.i.-:I.' i + 2.1.,. .= il i,i * = -yy nn I JL .!..LJ. L .aa. ~ Yt Of 13" .t.A ~ 1_L .I.A 1 j 11 t .: L A .L. p__.'. LA j _.d'. ++ 3 +u t 1..1 ...a. e. a23., i an l 8 J.-- J.JL J..'. JLJL id: hs d::: y'.y'.- JLJL ,L -L,L L 13-a.a. -a-r o e 11,. a s r s P FIGURE l-6. HALF-$NELL TERMINAL DEslGNATIONS 1-10 The Y-Panel cabinet serves as the common source 1-9. Grounding _. of supply for AC Power in the P250 system. A more complete description of the AC Power Distribution 1%ncl The System Grounding Diagram is shown in Figure 1-11. la given in Section 2. The grouruling lugs in the Y-Panel cabinet serve as the grounding point for all cabinets and peripheral devices in the P250 system. 4 l i 17 1P014 ~, - -, - - -, ~, - -

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q 8 1-10. SYSTill LAYellT B11A56116 Cach panel contains sixteen 56-Pin ELCO connectors 1)r customer connections or peripheral device con-e Each system designed for a particular application is nve tions, j provided with a system 1Ayout Drawing which defines l the equipment and connector locations. A sample draw-Tw) coding configurations are used: one for front cab-ing la shown in Figure 1-16. This drawing has a great inet mounted connector panels (Fig.1-13), and one for deal of coded information which is important in under-rear cabinet monsited connector panels (Fig.1-14), standing the cabinet intra-connections. For example: in Figure 1-13 the cosnector panel in i t Generally, the drawing shows locations of 1/O Panels, position AA has connector number 11 providing termi-Connector Panels, and Curtis terminal (Half-Shell) nations for the card-edge connector (35-Pin ELCO) of the printed circuit card in slot 9 (SL) of the I/O Panel

mones, in position D.

C 1-11 1/0 Peselleformelles I' 8 1/O Panel locations are designated A. B, C. D, E. F. $ $ 8 $ $ $ 3 H. J. K. L. M and N. These locations may be actually p. occupied by I/O Panels or they may be occupied by op-g o o o o o o o tional equipment, such as; Analog-to-Digital (A/D) con-g w w w w w w w 1 ' verters, or rack-mounted power supplies. Ilowever, o the standard configuration for the Y-Panel cabinet has y g g g g the Y-Panel in location F. the I-Panel in location E. and the I/O Driver 14nel (D3) in location D. The coded information contained in the I/O Panel location D. is FlcURg 3-13. FRONT MOUNTED CONNECTOR PANEL defined in vigure 1-12 In this example, the following CODEDINFORMATl0N information is given: In Figure 1-14. the rear cabinet connector panel in

1. This is an 1/0 Driver Panel. designated D3 position M has a 56-Pin ELCO connector in position 1 and positioned in location D of the 00 Cabinet (Y-panel which provides terminations for the card-edge con-Cabinet). The circuit cards within the panel are ad*

nectors (35-Pin ELCO) of the CO (Contact Output) dressed by channels 40, to 55,. cards in slots 01 (low 7-bits) and 16 (high 7-bits) which are addressed by channel 41. 3 2. For example: the card in slot 9 is an SL card (135 Selectric Interface), addressed by channel 50 The connections made at the card-edge connector (38. Pin ELCO) are brought out to the Connector lunct in location AA. 3 8 a a v hhhhhhhhhhhhhhh e

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3 4 3 2 4 4 w g FICURE l-14. REAR MOUNTED CONNECTOR PANEL $ $ $ $ $ $ 8 l h f k f h $ l CODED INFORMATION E " I' ~ I* FIGUME l-11. l/0 PANEL CODED INFORMAtl0N The flatf ShcIls are vertical Curtis terminal blocks sit-1-11. Cessetter reselleformelles usted in Zone and strip numter locations. Each strip number is comprised of two sets of adjacent vertical Connector luncts are positional at the front of the cab

lines of terminals which are designsted by letters. The inet in locations AA. Illt, and NN. Additforul pancle physical layout of a llall Shell Zone is shown in Figure may be installed in the rear of the cabinet in lieu of g.ti, llalf 8 hell Zones. Tree innels are positioned in line with the I/O l'incts w. Ich they service.

An example of the coint information on a ll.ill Shell 1-13 TP014 k

.g Zone is shown in Figure 1-15 This example shows Diagram is made. The W-Cables have specified lengths llatf-Shell Zone I which has strip 1 providing termina-and may be special cables for the particular applica-tions for the CD (Channel Duffer-CCI) cards in slots 01 tion. cnd 02 of 1/0 Panel L. The card in slot 01 is termi-nated by strip J. while the card in slot 02 is terminated flowever, the diagram in Figure 1-17 is useful to show how Process 1/0 Systems are armnged. Notice that by Ctrip K. plug connectors 21 or 23 on every D-Panel ami A-14nel carry the I/O Data signals from the Y-Panel connector ZONEI

21. Thekpanel wiring on the D-Panels connects the 21 ami 23 connectors to the 18-Pin Sylvania connectors in Z

ZZ each card slot location. Generally, the Input Data is bussed along the lower connectors, and the Output Data 0 0 0 is bussed along the upper connectors. Channel llatf-Select signals are grouped into four lines of 64 channels each. These lines are taken from the Y-A g AA Panel at connectors 22 (Italf-Selects 00 - 77,). 23 (llatf-

- '******~*8'("**8*'*****

~ 8 ) ""d ' ' 5 (llatf-Selects 300 - 377m). The lines are taken to con-nectors 22 or 24 of the D-Panels and A-Panels. a a a i l es en 1-11. CABLING ANO WINE INF0NNATION VOLilut j Each system is shipped with a Cabling and Wire Infor-FIGURf I-fl. NALF-3Nf LL AND T/8 mation Volume which is prepared by the Project Direc-tor. This volume lists all W-numbered (signal) cables CODfD INF0441A Tl0N and power cables, in addition, cable assembly and con-1-14. Thnrmal.f unction IMM nector breakdown dmwings are supplied. Thermal Junction Ibses are available for Analog Input 1-18. Cessetter Seelssetisse connections ami, when used, take up two lialf-Shell Zones. Terminn! cmling information follows the same All connector hoods used in the Y-Panel and 1/0 cabi-format as previously described for Italf-Shell Zones. nets are stamped with emled designations as follows: The layout of TJD terminals is shown in Figure 1-7. 1/0 Ignet llood Designators: 1-18. liianal Conditioners Cabinet No. Panel location Card Slot Cgnal conditioners, used with Analog Input Systems are l No. or mounted on the llatf Shellsin positions designated by lit. 00 F 12 ; Panel Con-nector 112. 113 etc.. as shown in Figures 141 and 1-7. 1-18. CAGLING BIASN AM Connector Panel floal Designators: Each Process 1/0 System designated for a particular Connector No. 14nel Loca[ tion application receives a cablir.g diagram, prepared by Cabinet No { the Project Director. A sample diagram, covering all systems ami subsystems available for the P250 Process 00 AA 09 t/O is shown in Figura 1-17. The diagram depicts. In block form. all possible panels which may in utillied. Panel connectors 21 through 25 Cro shown, where applicable. as appemlages to the panel blocks. Interconnecting cables ami external connecting cables are designated by M numbers, i.e.. M102. M103 The M Cables are stamlard cable configurstions made up for stock, and in every case these cables are re-designated as W Cables when the Application Cabling i TPCl4 l-14

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k r W b,, O' h ANALOG MULTIPLEX RELAY AM1/AM2) CARD F GENER Al. DESCRIPTION Capabilit6es This card contains 7 identleal relay c!:ruits and one The i us &ltrus and Guard outputs are physically con-nec to the selected analog input. These are to be ,l bus-guard relay circuit which are used to connect a selected analog input point to the Voltage-to-Frequency connected through the analog bun to the input of the Conve rte r. The AM2 ca rd rtiffo r-fr.im UtI ca rd Voltage-to Frequency Converter, havtre m high nunmt imped ince i nh, cv.o i rre r emr n-tod across the plus and minus bunen usr<1 for ope'1 circuit P Regstresisses det An applicatnin block diagiarn of The card is e own in Figure 1. b the AMI card, no connection to any power supply in rg red. For the AM2 card, connections to + 20 Vdc and i Ptic are required. ANALOG CHANNt( WotD Cil if DESCRIPTION ' Neuf paiva s on van r ure 2 shows the hun and gtutd relay circuit and one of the 11 input relay circuits. The figure also show a the connections to the Analng Input subsystem. % hen won'd % D (n) la selected, the word driver FCit in turne'l 3 -i on and providen

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~ When channel CD (n) is selected, the channel driver The I Ahlt and 1 Ah12 cards (See Figs. 3. 4. 7 and b) SCft's are turned on (only one hit should he selected are at the present time, the production units. The "2" out of the 14). This provides current to PSC through series cards (2Ahtt/2Ahl2, See Figs. 5, 6, 9 and 10) the power supply switch for the bus relsy hil5-8 and have been developed as a possible alternate method, one of the point relays (5145-1). Though not in production as of the issue date of this publicallon, the "I'serics cards are included in this The (perate time of the combination of sigml aral guard document for possible future reference. Table 2 pro-relsy a will be less than 2.5 msee with the guard switch vides a hill of material for all l card types, opera'.ing a minimum of 50 psee before either of the signale switches. The release time of the combination will tw less than 2.5 manc with the guard switch releas-TABLE 1 DIT AND WOftD ASSIGNhtENTS ing 0 tilnimum of 100 psee after both signals switch. When the power supply switch opens, the SCit' a cut off Card Slot Word Ilits and the relaya drop out. I WD(n)0 0 -6 The Ak I and Ah12 cards contain only 7 *t.ed ys, 3 2 WD(n)1 0-6 thus two cards must be used to select all li points. 3 WD 0 7-13 These e trds are used in the XI hiultiplex l'anct; Table I g gg)g,) g 7,,3 shows tie bit and word assignment per card slot. W D(n)2 06 6 WI)(n)3 0-6 The Aht2 esrd (See Fig. 8) contains circuits similar to 7 gg 7,g3 the Ahll card (Neo rig. 7), with the addition of a high-8 WI)(n)3 7-13 output-Impedance voltage source' connected across the /g pulso and minus buses. This voltage source generates M WI)(n)$ 0-6 C 4300 mVdc signal tint is recognired by the computer 11 Wi>(n)4 7-13 sa cJ open circuit indication. WD(n)5 7-13

13 WD(n)G 0 -6 The voltage source consists of an oscillator (TS-1).

14 WI)(n)7 0 -6 energtred by the + 26 Vdc supply, transformer coupled g gg g 7,g3 to O rectifier circuit. The rectifier circuit provides the WI)(n)7 7-13 required 300 mVdc signal which la tied to the plus and minus buses. i \\ e [ T 4 f i F t 4 4 s 'em A Aht-J r

a M W i c3_ SECTION 2. Y-PANEL CABINET STANDARD EQUlPMENT l, j 2-1. INTRODUCTION each sepplied :1-phase power through 3-pole, 20 A b reake r t,. Fight other circuits are available for use This section deals only with the standard equipment hv remote equipment through 20 A individual trip break-j fourut in the Y-l*.inel cabmet, menel): ers. Oac circuit is used for the Progr:immer's Con-U sole. IN>wer for Auxiliary No. I convenience outlet is

The AC Distribution Panel of taitel through orx3 pole of a 2-imle, 20 A trxilvidual te o breaker. Two additional auxiliary outlets are

}

The DC 1%mer Supply not plied from the secorxl pole of the breaker.

)

The Y-!Mnci (I/O Coupler)

'Ihc Y-panel Cabinet Vertical Power lius is supplied by a filtered,1*> A source. This bus supplies filtered

The l-I*anol (Interrupt sean) ac imwer to the Analog-tu-Digital Converters, Y-Panel de Power Supply, arat the Y-Panel blower. No device, other m3 stems aral subssstems which P.ro normally other tlan those inentioned, should be plugged into this used with every Procens 1/0 configuration azul which fdtered ac pmer hus.

J have interface circuitry located in the Y-l*anel or 1/O cabincts are covered in subsequent sections of this 2-3, P-254 OC POWER SUPPLY volume. The power supply is enounted inside the Y-Iwnel cabluet g 2-2. AC POWER OllTRIBUTION PANEL on pull out slides. The malute can he pulled out for easy mainterunce, arul for accessibility to terminal ^f The distribution panel prov6 des ac power for the CPU strips urul fuses. Fuses are located at the top of the j arwi ItAD cabinets, customer circuits for remote equip-power supply for protection of the 4NV, 26V,10V and ment, armt for convenience outlets. Figure 2-7 shows ri.3V supplies, Values of the individual fuses are the panel assembly arul Figure 2-M showa the pinct stamped on the panel near the fuse holder. Figure 2-0 l j, wiring arul schematic diagrams, alw ws the power supply outline with the termirutt strip (,/ aint fuw locations. Figure 2-1 contains a block diagriam y, The panel p> wor input is obtained f rom a 20%V, l-wire, a f the P 2Ts0 l)C Power Supply indicating the various cir-3-phase, #10112, 100 A service. The CPU arul IL\\D are cults whleh utilise the supply outputs. ________________________q ovriov ac l~ tev Ac rav oc pasi m an n Locic, Sounct 7 contmot cincuits swoo ces is g I W OL! o anamo pony l lov oc t

sounct

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~ sounct l_ INft>Mupf g l f l l 0lI 1 Mt4&t LOCaf 0 00CiLL Ar0m i I L-- t.y CARD----~~J g l to st,a,t,us,,i o.urs, l-esV DC . MdLC . g gg gg, g,gyg,y,gg, Sounct I,r4Ao cowutta swirtn cco l p L________________.________J \\ l v flCURE 2-1, tl LOCK OIAGRAM 0F P-250 PowtR tuPPLY i s 2-1 iP014

m t 3 ,m Cooling is b) convection only. The top and botton. of 27.3V de.

10'i -157. The output bus voltage should

) covers of the power supply module h.tve been perfor-be at 27.3V de. +0.5V with power applied to the system. (V ated to allow air to flow freely around the components. p The 26V de source transformer has secondary winding One printed circuit lxerd, the 1.ow Voltage Dettetor taps at 3% voltage increments which are used to adjust card, is located in the power supply. This card con-the output voltage to a nominal value for different loads taint the low voltage sensing circuit, the synchronizer on the supply (i.e.. systems of various size). interrupt circuit, arwi the Dead Computer Switch. A 6 more detailed description of these circuits can be found A small system would have its tap position one or two in the I.V card description, stepa lower than would a large system. ,w 2-4. Power $spply flatisgs Taps onthe secondary winding of the transformer should j also be used to adjust the output voltage to its correct The 2GV de, 4%V de and the 0.3V ne suurecs are un-value in response to minor variations of nominal input regulated. A regulated 10V de is obtained across a voltage magnitudes. (For example, if norr.inal line shunt zener regulator tied to the 26V de bus through goltage in an area is llSV ac, the secondary tap would current limiting resistors-be one position lower than it would be in an area with a g 5. 26V _de Source nominal voltage of Il5V ac.) The 20V de level is obtained f rom a full wave bridge 2-8. IMV de Sourec (See Fig. 2-3) rectifier feeding into a pi filter. (Sec Fig. 2-2.) This The 89Vde source is obtained from a center-tapped full source is rated at 17 A maximum with an output voltage m i Tl

* 12 O

l ll Li l 10 /G l W 3+ (L) l 8 CR 1 ilSV l 7 i AC 3 l 6 Cl C2 C3 M 3 l ?R P R PR PR 3 27.3V l DC l SMLD U 4 3 c nCukt 2-2.1sv OC powen source N I s CRS i C ?+ 5 Vi C$pq R3j ! C67q lil llSV 6 40V 2 DC R4! ! C779 3 ) 3 CR6 U 4 ? w VI i o -),. HCUML 2 3. 48V DC P0nER SOURCE N TP014 2-2

Y W wave rectifier with a capacitive output filter. This 2-9. Tap Adjustments (See Fig. 2-6) supply is rated at 48V dc. + 20% -15%.1.5 A as imli-cated on the power supply data nameplate. The power supply has been designed to accept 115/230V, 50/60 liz, single-phase input. Jumpers on the primary 2-1. 10V de Source windings of the three transformers in the supply must be wired correctly to match the transformers to the line A 10V de is obtained across a zcner diode regulator volta ge. 10ach transformer has a dual primary winding. (see Fig. 2-4). This source furnishes b00 mA when These windings must be placed in tieries for 230V ac the 27.3V de teus has dropped to 23.0V <!c. The out-operation or in parallel for 115V ac opemtion. put voltage is 10V de. +5%. l I 27.3V DC jlRI 2 2 lR2 Il5V 23CN IOV DC AC 3 3 h PSC if l' 3 e e e 4 4 m FIGURE 2-4. 10V DC POWER SOURCE FIGURE 2-6. TRANSFORMER PRIMARY wlNOING$ (L) 2-8. 6.3V ac Sour _cdSMcih_M1 With the exception of the 26V de soutre, the transform-era do not have tapa for adjusting the output voltage to A 6.3V se is derived from the sectalary of a filament allow for small differences in nominal line voltages or tmnsforme r. This signal is used to drive the synchro-differences in Inid. These loads are sufficiently in-piter internspt on the low vnitage sensor (!N) cant arui. senstthe to voltage variations that the output voltage when the system contains an analog subsystem. the can be allowed to swing with 100% switching of load phase lock oscillator on the phase lock oscillator card. currents and the line voltage variations of 110% around This supply is rated at 6.3V ac. + 15%. 0.1 A. IISV oc or 230V ac. 2-18.j lieforhace Decuments Itefer to the 31,V2 i rinted Circuit Card Ibscription in Volume 7 for the circuit description of the low Voltage 1 S Sensor used in P-250 DC Power Supply. 4> b 2 IISV O 6.3V AC AC 1r 1r C ^ O 4 d 6 m l _) FIGunt 2-5. s.sv aC slGNAL sotract I M 1P014 J f A

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ATTACHMENT 2 MODCOMP I/O The Modular Computers Inc. (MODCOMP) input / output (I/0) termination cabinets used for analog computer signals do not contain power supplies. The process I/O circuit cards associated with analog signals are located in separate multiplexer cabinets which are adjacent to the I/O termination cabinets. The power sources available to the process I/O cards via the backplane of the multiplexer card cages are listed in the table below. The process I/O cards use the +/-15Vdc and +5VDc power sources. Voltaae Max. Continuous Current 34VDc 12A +15VDc 4.0A* -15VDc 4.0A* +12VDc 1.1A -12VDc 0.35A + SVDc 35A - SVDc 35mA 120VAC 7A (Fuse Protection Rating) 48VDC 20A Contact closure I/O wetting voltage supply not part of the analog I/O system.

Maximum current of both 15VDc outputs is 5 amps total (75 watts).

The backplane of the multiplexer card cage which contains the process I/O cards is connected to the terminal blocks in the termination cabinets by means of ribbon cables. These ribbon cables are used to carry the field signals to the process I/O cards for conversion of the signal voltage into a digital signal usable by the MODCOMP computer system. 120VAC cascade failure is possible making it the maximum credible fault.

However, this could only be due to multiple, non-random failures within the MODCOMP multiplexer system, see the attached MODCOMP MODACS power supply sketch.

Several pages of MODCOMP manual 224-115015-000 have been included which describe the power system for the multiplexer card cages. Also included are the following drawings which show the configuration of the multiplexer cabinets (MODACS Files) and their termination cabinets: Drawino Descriotion 00750 Sh. 1 OPPD Equipment Configuration The multiplexer cabinets are labeled as MFC-1 and MFC-2. 00769 Sh. 1 Termination Cabinet Assembly 00769 Sh. 2 00769 Sh. 3 00769 Sh. 4 l l I

{%s l A l B l C l D BULK PCWER 5UPPLY 7A r - -- -- -- - - q pj 1 3 l 334 Ek ,l {. S'V, F1 ^ 3 F2 y' L> u GNO. 4,. 2 L t I i sup8"""*me O C O C 20A i MODCOMP 0.RPD. g AC PANEL MPP-///25 {' o 4C PANEL w g IIE - (Pli/S I53,/55,I57,59)) [ 3 % h a . e +g y w] ei g I i i+/S 5'; QfCWER BUSON84CK PLANE LO ~ ts6Na _. v i y 5 ! 4 W 5 C S E d W 70 )'s d 5 >>l a a .I g ))I I 8 I m a g ~ it 5 g ~ y g s 5 g 9, 2 a s 1 >> hd ~ m 5%-/00//6 Sil. 6 =_ l A l B l C l D

l E l F G l H i ANALO6 MEMORY RESULATO_R C. SWITCHING CKI~ P1 I-~ l j M I ]= =, \\ Q l n7 l l l I i L.__ i 2 s D, 0 + T 1 3 o + e g S kf kS 4S kS kS kS - k \\ 526-/00/12. P1" \\ LOGIC REGULATOR y. ,s D.C. _f. ' TSW/TCHIAG ~ \\ l m

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-\\ _ T_ _T_ __ q L. i i. T1 q t- - J -iPERTURE ~A f5 526 -100ll3 ~ ~ ~ CARD a o 1 r 4,S hp t pj. .r -/5 Also Available On

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+/- /5 GNO / __ Aperture Card ~6h/D (PINS 73,N,75,74, %,95,98 $12+.)l \\ 870% ooc)96-o/ r .LI REB 8ON CABLE TC T CAS. TEKM. BLOCKS./b ~ n, au um.,ru oa vu,,. t 3 ~ ~ mm., i ff MODCOMP W M0DACS POWER cme ) 'Z SUPPLY $\\ ~ MR-FC-86=/7 ~] P.E. GSE FILE NUMDER l B-445 " ', OMAHA PUBLIC POWER DISTRICT OMAHA, NEBRASKA l e I F I o I a 4s719 1

ADD @MP MMyg L. 22.4-llS6/4 -o 0 0 Chapter 1 ANALOG OUTPUT, QUAD CHANNEL 1.1 Introduction The Current Output AO Card is a grounded load The Analog Output (AO) Cards provide four Digital-to-configuration with the return lead internally connected to Analog Converter output channels with voltage or current the system ground. Figure 1-2 shows the output amplifier loop outputs available on a card basis. There are four data and load connection. registers each connected to a parallel Digital-to-Analog Converter. A data read instruction is provided for each register to provide support for diagnostic check-out of the M ^ >>cuTPuT card. LOAD 1.2 Available Options oAC RETURN 1.2.1 Voltage Output 110.24 Volts f,' The voltage output version of the AO card supplies 10.24 cuo GND VDC at up to S0 milliamperes current from esch of the four Digital-to-Analog Converter (DAC) channels. Figure 1-1 shows the output amplifier circuitry of a single 132-051 Figure 1-2. Ao Card Current output Amplifier VSENSE M ^ ) Resolution: M h OUTPUT 12 bits including the sign bit. Minimum voltage step of 15 millivolts. _f+ LOAD CCuracy (% of full scale):

RETURN, s s h LINK Zero:

Voltage DAC Current DAC -V SENSE W )7 Setability 1.01 % 1.01% - GND Temperature Coefficient 130 ppm /*C 130 ppm /*C Drift vs. Time 1.01%/ Day 1.01%/ Day 132-050 n_mre 1-1. Ao Card Voltage output Amplifier Gain: Setability 1.01 % 1.01 % 1.2.2 Current Output 4-20 Milliamperes Temperature Coefficient 135 ppm /*C 145 ppm /*C This Current Output AO Card supplies 4 to 20 Drift vs. Time 1.02%/ Month 1.02%/ Month milliamperes of current to a grounded load. The load voltage compliance of the 4-20 milliamperes Current Linearity: Output AO Card is up to 8 volts. allowing a load of up to At 25 degrees Centigrade 1.025 % 1.025 % 400 ohms. The Current Output AO Card is a grounded Temperature Coefficient 110 ppm /*C 110 ppm /*C l load configuration with the return lead internally Drift vs. Time 1.01%/ Month 1.01%/ Month connected to the system ground. Figure 1-2 shows the Settilr g Time: output amplifier and load connection. 15 microseconds to settle to within i.02% of finalvalue for full-s ale step with a.01 microf arad of load capacitance. 1.2.3 Current Output 1-5 Milliamperes l This Current Output AO Card supplies 1105 milliamperes Noise (Peak 3 sigma): of current to a grounded load. The load voltage .01% (D.C. to 1 MHz) compliance of the 1-5 milliamperes Current Output AO l Card is up to 8 volts. allowing a load of up to 1.6 kilohms. 1-1

2.2 4-uso/( ooo Chapter 1 POWER SYSTEM i 1.1 Introduction 1.2 Physical Descr!ption The Power System is a transformer isolated modular The Bulk Power Supply. Logic Regulator, and power supply system. Each easily replaceable power Analog / Memory Regulator are enclosed in fortred sheet module plugs directly into the card file. See Figure 11 metal and formed sheet metal screening. Each unit for a block diagram of the Power System. slides along a metal guide and is easily installed or e assis. Rgum b2 shows The Bulk Power Supply (BPS) develops an unregulated the locations of the power units in the file. nominal 34 Volts Direct Current (VDC) to supply a voltage bus. The 34 VDC bus supplies power to the The system has an optional battery back-up and battery Logic Regulator (LR) and optional Analog / Memory charger that can directly feed the Bulk Power Supply. Regulator (AMR) that develop the necessary output voltages. The LR is a DC-to-DC type switching regulator that

Maximum current of both 15V outputs is 5 Amps Total develops 5 Volts at a maximum current output of 36.5 (75 Watts) amperes (A).

The AMR is a DC-to-DC type switching regulator that develops: +15 VDC at 4 Amps; -15 VDC at 4 Amps; + 12 VDC at 1.1 Amps; - 12 VOC at 0.35 Amps and -5 VDC at 35 milliamps (mA). NOTE: The sum of the current outputs of both 15 V out-puts is 5 Amps total. The current ratios for the- + 15 VDC outputs will be discussed later with the Analog / Memory Regulator. BULK 34 VOLT BUS LOGIC m 7 REGULATOR GNO POWER M J L (OPTION) + 15V/4A* ANALOG GND MEMORY REG. 15V/4A* (OPTION) -12/ 35A BATTERY BACK-UP & -5/35 mA CHARGER

MAXIMUM CURRENT OF BOTH 15V OUTPUTS IS 5 AMPS TOTAL (75 WATTS)

Fig'ure 11. P'ower system Block Diagram 11

A B C D POWER SYSTEM

^

PROCESS LOGIC BULK R GU-1/O LATOR BASIC FILE A OR SUN (OPTIONAL) PROCESS lio OPTIONS CONNECTORS 110 OPTIONS 0 THRU 15 CONNECTORS A,B,C,& D Figure 12. Power supply Locations 1.3 Equipment Specifications 1.3.1 Bulk Power Supply Line Voltage 102-132 Volts Alternating Current Nominal Output 34 VDC (VAC) or 196-253 VAC @ 47-63 Hz Voltage ( Distortion Hz 5% RMS Maximum Nominal Output 10.7 Amps Input Power 500 Watts Maximum 120 VAC Configuration Line Regulatio.1 + 10%, - 15% L ad Regulation Not applicable A C f 2.5 Amps Maximum Temperature 0.1 % /C M cient input Surge 80 Amps Maximum Efficiency 85% at full load nominal voltage EMI/RFI Emissions Per methods input Protection Fuse 120V 7 Amps /230V 3 Amps CEOl 03 & 06 by Mll STD 461 Overload 30 Amp Fuse Dielectric Input to output and input to Protection Strength chassis Ground (GND) 1.5K VAC Hold-Up Time Output will hold up for 20 ms after the loss of input AC,(From Power Factor 0.75 Minimum Low Line 102/196 VAC) j Table 11. bps input Requirements Table 12. SPs Output Requirements l f l l l \\ l 12 { l l

Voltage 5V + 0.05V Logic Output Current 36.5 Amps ACLK SONi0 Hz AC clock Power 183 Watts PIPOKO All DC Voltage OK (High True) Regulation +3% maximum including ripple (PIPOKO output will sink 20 mA) m age sd W m@g INH When low inhibits all power sup. ^ plies in the file (INH output will sink 6 mA) Efficiency 70% minimum l l Switching 20KHz (approximately) ' Logic Input (True High) Frequency Temperature + 0.15%IC ANMEOK Analog Memory Power Supply OK Coefficient LOGOK Logic Supply OK Stability +0.1% every 4 hours XYOK XY Supply OK Transient A step load of 25% (9 Amps) will not cause the output to sary more P!POKO Remote Power Supplies in (Op. than 200 mV and the output will tional Expander Files are OK recover to less than 50 mV within 1 ms. Table 13. Logic inputs / Outputs (8Ps) Tum on Not to exceed +5.5 V Transient 1.3.2 Logic Regulator Undervoltage When output voltage reaches 4.35 ( Indication - 4.6 VDC (approximately) LOGOK Ripple 2V Peak to-Peak maximum will go Low. Frequency 94-126Hz OVER If the heat sink temperature TEMPERATURE exceeds the safe operating Overvoltage Shuts down LR if bus exceeds 48 SHUTDOWN temperature the thermostat will Protection VDC. To recover, reset AC Power trip and fire the SCR shutdown for one m ute circuit. To reset, the supply must Overload Current limit (primary current) cool down and the AC power must be removed for one minute. Protection Table 14. Logic Regulator input Requirements Table 15. Logic Regulator Output Requirements 13

Logic Regulator input Signals LOAD RATIO AMPS [ + 15 - 15 ( 0.02 0.12 INH Holds off output of LR when Low 0.10 0.50 - 5VINH. Holds off output of LR when Low 0.35 2.00 0.75 0.05 0.80 0.17 Logic Regulator Output Signal I t 2.00 3.00 3.00 2.00 LOGOK Low until LR output is above 4.35 4.00 1.00 VDC. The LOGOK output will sink 4mA. No pull up resistor is provided 19. Rauos on this signal. A Low on dther inhibit (INH or -5VINH) requires less than 2mA. Efficiency 70% minimum. Table 14. Logic Regulator inputloutput signals Transient One Amp step loads on the + 15

Response

VDC outputs will produce no more than a 300 mV variation. 1.3.3 AnalogIMemory Regulator Turn on Output voltages will not exceed the Voltage 20 to 45 VDC Transient value of the normal regulated vIages. Ripple 2V Peak to. Peak maximum Current Primary only + 15 VDC + 15% I[ "9 + 12 VDC + 20% Table 17. Anatog/ Memory Regulator input Requireenents - 15 VDC None - 12 VDC None -5VDC None Power Output + 15 VDC at 4 Amps " -15 VDC at 4 Amps " Table 110. Voltage Adjustment + 12 VDC at 1.1 Amps -5 V at 35 mA Overvoltage Shutdown occurs when: Total Power 92.6 watts

+ 15 VDC occurs between 16 and 18 VDC.

+ 12 VDC occurs between 13 and 15 VDC. Output a - 15 VDC occurs between 6 and 8 VDC. Regulation . To reset an Overvoltage Shutdown turn off AC line " + 15 + 3% max including ripple power for one minute. " - 15 + 3% max including ripple l + 12 +3% max including ripple Undervoltage Indication occurs when: - 12 +5% max including ripple . -15 VDC falls between 12 and 14.5 VDC. -5 + 5% max including ripple

+ 12 VDC falls between 9.5 and 11.5 VDC.

" Maximum current of both 15 VDC outputs is 5 Amps

-5 VDC falls between 3.8 and 4.75 VDC.

fotal (75 Watts). These undervoltage conditions cause ANMEOK to go Table 14. Analog / Memory Regulator output Requirements LOW. Table 19 lists the load ratios for the + 15 VOC outputs with no loads on any other outputs. k 14

-2.-- Table 112 lists a summary of the specifications for the J '( Input Signal Process J/O System. g All AMR output signals will sink 4 mA. No pull-up INH Holds off output of AMR when low. resistors are provided. Less than 2 mA la required to 8 drive INH Low. ls Output Signals i I 1.4 Available Options - SINH Holds off the LR output and holds The Bulk Power Supply and Logic Regulator are sup-off +12 VDC output on the AMR plied as part of the chassis. The Analog / Memory until the -5 VDC output of the Regulator provides power for the Process input / Output AMR is lower than -4 VDC. (PlO) option. ANMEOK Low until all AMR voltages are at their appropriate levels. 1.5 Bulk Power Supply Tatd.111. Analo9tMemory Regulator input / output signals 1.5.1 General Description See Bulk Power Supply Functional Diagram Figure 13. Over Temperature Shutdown If the temperature on the heat sink exceeds the safe The Bulk Power Supply (BPS) is fused at the AC input and the DC output. This power supply does not fold operating temperature of the unit, the thermostat will back or inhibit its output under IC control. Surge over trip and fire the SCR shutdown circuit.To reset this con. dition the AMR must be allowed to cool down and the current conditions are limited by a thermal surge cur. AC line power must be turned off for one minute. rent limiting resistor (thermistor) at the AC input to the transformer and AC input /DC output fuses. DESCRIPTION P ER ANALOG & MEMORY REGULATOR RE ' SUPPLY VOLTAGE 34VDC +5VDC + 15VDC - 15VDC + 12VDC - 5.0VDC - 12VDC CONTINUOUS 12A 35A 4.0A 4.0A 1.1 A 35MA 0.35A CURRENT PEAK TO PEAK 2V 50mV 30mV 30mV 20mV 20mV 20mV RIPPLE REGULATION NONE 3% 3% 4% 3% 5% 5% RIATION BROWNOUT 20ms 20ms 20ms 20ms 20ms 20ms 20ms EFFICIENCY 85 % 70 % 70 % 70 % 70 % 70 % 70 % FORE FAI URE .30K hrs. 30Khrs 30K hrs 30K hrs 30K hrs 30K hrs 30K hrs " Maximum current of both 15V outputs is 5 Amps total (75 watts) Table 112. Summary of specifications k ~15

AC SURGE AC RECTIF 34V FUSE RFI CURRENT LINE AND FUSE i LIMIT TRANSF CAPS M PWR INDIC OSCIL E ACLK = V LOW VOLTAGE COMP ANMEOK m LOGOK e XYOK >" V1f V1f1f POWER-O K LOW COMPARATOR VOLTAGE COMP INH PIPOKO Figure 13. Bulk Power supply Functional Diagram Radio Frequency Interference (RFI) filtering is provided AC Power enters through fuse F1. A 7 ampere fuse is us-at the AC input. A center tapped AC lina transformer is ed for 120 VAC operation and a 3 ampere fuse for 230 used to supply the basic input to the BPS. Full wave rec. VAC operation. RFI filtering at the AC input to the BPS tification and heavy capacitive filtering is used to pro-prevents noise from the AC line from entering the BPS. vide the DC output from the BPC. The output voltage of the BPS is constantly monitored for low voltage by the Current surges, created by output load variation, are limited by the 2-ohm thermistor on the input of Low Voltage Comparators. If the output of the BPS drops below 19.6 VDC or if a non-OK condition exists on transformer T1. Transformer T1 is center tapped to ground and utilizes full-wave rectification by the a regulator, all Power input Power OK Output (PIPOKO) VK248A diodes at its output. T1 can be wired for either will go Low. If PIPOKO goes Low due to low voltage on the BPS, a minimum of one millisecond later, Inhibit 120 VAC or 230 VAC operation. (INH) will go Low and inhibit the Logic and Capacitors C1 and C2 provide filtering for the output Analog / Memory regulators. When AC line voltage is not and provide a minimum of 20 ms ride through power present, a low frequency signal called ACLK, is pro. when AC power goes off. Though the unregulated DC vided by an on-board oscillator. When AC line voltage is output of the BPS is labeled "34 V",it can go as high as present, ACLKis synchronized to the ACline frequency. 47 VDC before an overvoltage condition exists. Tran. sistor 01 serves as a preregulator for the input to IC1. 1.5.2 Detailed Description is a 5 E regulator mat has a madmum input See Support Functions, EDM, 221 115015. v Itage of 40 Volts. Regulator 101 provides power and a voltage reference for: IC3 pins,4,6, and 10, and IC4 pins Refer to schematic diagram 526100127. l 16 l

HARDWARE PRODUCT BUL ET N MODCOW MODACS III LOW LEVEL ANALOG INPUT MODELS 1870-1 and 1872-X FEATURES demanding high noise immunity and this mode, when the last multiplexer . i200 Volts of Common Mode the ability to withstand high common channel is sampled, the scan Voltage Isolation mode voltage. Low-level signal automatically resets to channel zero 12-Bit Resolution including sign sensors, such as thermocouples, can be and a new scan cycle is started. An 150 dB Common Mode Rejection directly read by the computer system interrupt is available to signal the Ration in industrial applications at c rate of completion of each scan sequence. . High Signal-to-Noise Ratio 180 samples-per-second with 16-Channel Relay Multiplexers in accuracies previously available only at The autorange control circuitry senses two voltage ranges much slower speeds. the voltage range of the input signal 110,120,140, and i80 The 1870-1 B, sic Card and 1872-X and automatically sets the gain of the 1870-1 Basic Card to a level that millivolts full scale Multiplexer Cards' operation is 1160,1320,1640, and 11280 controlled by computer commands. Provides the optimum input to the Software support, under MAX 111 and analog-to-digital converter. millivolts full scalc . Autoranging Bas:c Card MAX IV, for scanning the low-level Ga.in infonnat. ion also.is used to . Scaled Integer Data analog channels is provided with the Justdy the 12 Ws of converW data,n . Programmable Open Thermocouple MODACS 111 Software System. i r'] Detection the 16-bit word data is then stored in the External scan synchronization signals data Mer to W accesW h (j 180 samples-per-second also are available to provide status to the MODACS 111 controller and Xt"nal Pws equipment. GENERAL DESCRIPTION transferred to the computer's memory. The basic operation mode is sequential The data returned to the computer is The Model 1870-1 Low Level Analog scan that starts at channel zero. The in scaled integer form as shown in Input Basic Card and the Model scan sequence is hardware-controlled table I for the 1872-1 Multiplexer 1872-X Mercury Wetted Relay and is self-adjusting to include Card and in table 2 for the 1872-2 Multiplexer Card provide MODACS multi lexer channels when a card is Multiplexer Card. P Ill Process input / Output Systems with Iow-level analog signal measurement present. The basic card can be c mmanded to cycle through all The MODACS 111 controller can capabilities. These cards can acquire and digitize full-scale signal levels channels once, and stop. An interrupt transfer data from the RAM data Si n3I Scan C mP etion. buffer to the computer memory at any * ** *I* t l 8 from 110 millivolts to it.28 volts The basic card also can be time whether the low level cards are DC in severe electrical environments commanded to cycle contmuously. In actively scanning or halted. BIT RANGE O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 80mV S 40 20 10 5 2.5 1.25 .625 .312 .156 .078 .039 0 0 0 0 40mV S S 20 10 5 2.5 1.25 .625 .312 .156 .078 .039 .0195 0 0 0 20mV S S S 10 5 2.5 1.25 .625 .312 .156 .078 .039 .0195 .00976 0 0 10mV S S S S 5 2.5 1.25 .625 .312 .156 .078 .039 .0195 .00976 .00488 0 Table 1.1872 1 Voltage Value (in mV) Retumed by LLAIS BIT / RANGE 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Q 128mV S 640 320, 160 80 40 20 10 5 25 1.25 .625 0 0 0 0 640mV S S 320 160 80 40 20 10 5 25 1.25 .625 .312 0 0 0 320mV S S S 160 80 40 20 to 5 2.5 1 25 .625 .312 .156 0 0 160mV S S S S 80 40 20 10 5 ~2.5 1 25 .625 .312 .156 .078 0 Table 2.1872-2 Voltage Value (in mV) Retumed by LLAIS

Since the dats is scaled, no shifting is The 1872-X is available in two noise that occurs on the signal during conversion has no effect since the required beform the engineering unit full-scale input voltage ranges. The represent: tion is calculated. If the 1872-1 provides a signal gain of 128 input is disconnected at that time. desired cngineering unit is volts, the to handle signals below 80 mV. The The low-noise instrumentation-grade integer v:lue can be multiplied by 2.44 1872-2 provides a signal gain of 8 to amplifier located on the 1872-X micr volts for the 1872-1, or by 39.06 handle signals below 1.28 V. Multiplexer Card also minimizes the micr:v:lts for the 1872-2, to provide The 1872-X multiplexed channel bus length the flying capacitor signal a re-1-number representation of the output is applied to the Basic Card. must drive. In addition, the signal input voltage. The Basic Card autoranging circuitry path from the multiplexer input to the selects additional 1,2.4, or 8 signal analog-to-digital converter on the FUNCTIONAL DESCRIPTION gain to provide the optimum signal o Basic Card is differential. These design The 1870 Basic Card contains a the analog-to-digital converter. This features illustrate why MODACS 111 differential integrating amplifier, an technique assures maximum signal low-level analog input cards provide autor:nging amplifier, a 12-bit conversion accuracy over the full exceptional noise immunity and high analog-to-digital converter, a range of process signal variations, common mode rejection. 128-sample data buffer, and circuitry With the 1872-1 card, the autorange An additional 1872-1 Multiplexer tJ control autoranging, the converter circuit provides full scale inputs of Card feature is software-controlled and multiplexer. i10, i20,140, and i80 mV. With open thermocouple test. A small The differential integrating amplifier's the 1872-2 card, the autorange circuit current is introduced into the input filtering minimizes relay contact provides full xale inputs of i160, leads when the test is enabled. If the closure end system noise. This, and i320,1640, and 11280 mV. Both circuit is open. the multiplexer's input the characterisitics of the input 1872-1 and 1872-2 cards can be mixed capacitor will charge at a rate greater multipl;xing technique, allows a with the same 1870-1 Basic Card. ihan 5 millivolts-per-minute. This is successive approximation The 1872-X features flying capacitor equivalent to a greater than analog-to-digital converter to be used multiplexer design for isolation and 60*F-per-minute temperature change for accurate high-speed conversions of high common mode rejection in high with type J thermocouples. Open low-l>v;l analog signals with highly noise industrial environments. Two thermocouples easily can be detected repeit blz results. channels of the flying capacitor by large deviations from expected Each input channel has a dedicated multiplexer are illustrated in figure 1. readings or by a rapid rate of change. This low-cost detection method loc;tirn in the data buffer. The 12 mm. mtroduces little or no measurement dats bits from the converter are c ;, iqN written into the RAM data buffer after il err r for properly workmg

c thermocouples and can be left on at it has been scaled in the 16-bit

!l J -j a c:mput:r word determined by the ,,,,M, all times. cutoringe circuitry. This provides data Up to eight 1872-1 and 1872-2 cards C

~

can be used with each 1870-1 to to the user that requires no additional provide up to 128 low-level analog l

c sciling for conversion to engineering o 'l' fA input channels.

units. Multiple 1870s and 1872s also can be The RAM data buffer allows the = used in MODACS 111 Basic and I;w-lev;l analog-to-digital converter rigure 1. Rying Capacitor Multiplexer cnd multiplexer to operate Expander Files to provide greater csynchronously with the computer. A When the channelis not selected the channel counts and throughput in low-lev;l basic card can convert data capacitor is connected directly to the ultiples of 180 samples-per-second. ct its full rate of 180 input signal through series filter The designs of the Lc,w-Level conversions-per-second without resistors. Therefore, the voltage across Multiplexer and Basic Cards and the w::iting for the MODACS III the capacitor tracks, and is equal to, MODACS !!! File permit other the input signal voltage. When a MODACS 111 Process input / Output Controller to read the data into the computer memory. When data is to be channel is selected to be sampled, the Cards, such as Digital Inputs, Digital read, the data buffer allows Direct relay contacts disconnect the capacitor Outputs, Counter, and Pulse Generation Cards to be used in the Mem;ry Processor (DMP) controlled from the input signal leads and same file. block-mode transfers of data to be connect it to the amplifier input. The made efficiently and at high rates with voltage across the capacitor now Model 1890-2 Low Level Barrier minimum system overhead-drives the amplifer that, in turn, Terminal Strip is provided to The 1872-X is a 16-channel drives the Basic Card and the terminate the field wiring for low-level differential multiplexer card that analog-to-digital converter. Since the analog signals. The 1890-2 makes receives timing and control signals input signal leads are never directly available easy-to-use screw terminals from en 1870 Basic Card. Mercury connected to the amplifier, it is to which field wiring can be wetted r; lays are used to provide high effectively isolated from input connected. The connection from the reli:bility and long operational life. common mode signals. Additionally, barrier terminal strip to the MODACS

l 111 File is a shielded twisted pair cable Sempir Rate: Line:rity: l that offers maximum protection 180 samples-per-second (includes 10.01% (Typical) against noisy environments. autoranging) 10.02% (Worst case) (^, Each card also features the capability Resolution: Gain Setability: Cl of identifying its " card type" to enable 12 bits including sign, scaled in 16-bit 10.01% Full Scale the system to assemble configuration computer word Zero Offset Errors: information. Multiplexer Type: (Total offsets and channel-to-channel offwes) Flying capacitor with mercury-wetted 10.01% RTO (Typical) APPLICATIONS relay 13 microvolts RTI(Typical) The 1870-1 and 1872-X are designed for Relay Life: 10.02% RTO (Worst case) operations (Typical) 15 microvolts RTI (Worst case) applications where high common 1 x 1011 operations (Rated) Offset Drift: mode voltage isolation and a high 1 x 1010 common mode rejection ratio is Input Impedance: 1 microvolt /'C RTI required for accurate measurement of Differential: 10 megohms minimum 20 PPM /*C RTO commonly encountered low-level Source Impedance: Quantizing Error: industrial analog signals (110 mVdc IK ohm maximum for rated 1/2 ISB to 1.28 Vdc, full scale)- specifications System Accuracy: Common Mode Source Impedance: 10.05% at all gains except 10.1% CUSTOMER CONNECTIONS Floating to zero worst case at maximum gain of 1024 For field terminations, each 1872-X Feedback Current: Channel-to-Channel Crosstalk: Multiplexer Card requires two 1890-2 Less than 1 nanoamp On-scale signals: Low Level Signal Barrier Terminal Common Mode Voltage: 120 dB or 0.01% FS from previous Strips or two 1891 Mating Connector 1200 Vdc (Operational) channel, whichever is greater Kits. i250 Vdc maximum Overload: Common Mode Rejection Ratio: 120 dB or 0.01% FS from previous MINIMUM REQUIREMENTS (DC to 60 Hz) 150 dB channel, whichever is greater Each 1870-1 Basic Card and each Normal Mode Rejection: Common Mode Crosstalk to other 1872-X Multiplexer Card requires one Channels: 1872-1 PIO Card Slot in a MODACS !!! 40 dB at 60 Hz 160 dB at DC Basic or Expander File with an 1812-1 ( )) 1872 150 dB at 60 Hz (. Analog / Memory Regulator. 32 dB at 60 Hz Gain: A maximum of eight 1872-X cards can Maximum Normal Mode Input 1870-1 Basic Card: be used with each 1870-1. The 1872s Voltage: 1,2,4,8 (Autoranged @ 50% FS) must be installed in the next higher Model 1872-1: 1872-1 Multiplexer Card: number adjacent slots to the 1870-1 in +6/-0.6 V 128 the same file. Multiple 1870-1 and Model 1872-2: 1872-2 Multiplexer Card: 1872-X card combinations can be + 20/ -1.28 V 8 inserted into a MODACS 111 File. Note: Exceeding the above voltage may d'ma8' the fdter (8Pacitors. but no PERFORMANCE SPECIFICATIONS No'v'j'"d'"*"'"'"" (@25'C unless otherwise specified) Filter Options: Input Voltage Ranges: (Fully autoranged) s 2 _ 1872-1: 110,120,140, and 180 mV full scale i)' 1872-2: s 1160,1320,1640, and il280 mV full scale Channel Capacity: 1872-X: 1872-1: 16 channels Fco 30% (-3 dB) 0.5 Hz (Maximum of 128 channels-per-1870 1872-2: C') Basic Card) F o i30% (-3 dB) 1.7 Hz (Maximum of 896 c channels-per-MODACS Ill System) Input Filter Settling time: 1 minute (Typical) For Full Scale Changes Analog Input Type: Two-wire differential plus passive shield

?MODCOMP "^""^"' "" ""C"Sff7 MODACS III RTD MULTIPLEXER MODEL 1873-X l The 1870-1 and 1873 RTD Multiplexer i operation is controlled by computer -.._......._..,.......,,...-.d.-~ commands. Software support, under $M .h j.'. l, .

E]-.m MAX 111 and MAX IV, for scanning r4 El ir.M $

analog channels is provided with the MODACS Ill Software System. p-fg + -M J' d' {. 1 p. ~: 8 ' # M L " '.[ 3 --- * - F---- F P---- %- --- l M 6,y FUNCTIONAL DESCRIPTION { Q{I@ V = $..g The 1873-X RTD Multiplexer is an ( l . =; eight-channel differential multiplexer j 6 (%y 3 ' { 'f ._ l l h>g card that receives timing and control L

n l

= signals from, and provides a J ciW,..N, f . j . [ [.,'1 ll.o.'.f]~ G h;.b)i 3ly [.3h,7 multiplexed output to the 1870-X Basic i l w l Card. The 1873-X RTD Multiplexer l l,.. T, ! ~ ' !gM q f u [ [": p g features a flying capacitor multiplexer .( .~r '? g[%'? ( ~ - E G-~ C/~ - ": 1 1; E and provides fully isolated bridge l j 4 5 excitation for high common mode

7::

ty 7 g ( E .1 L ':( ;' -M l rejection Figure 1. The input circuit C. 'I f a-]{,. }. t-{. ' l consists of a precision resistor bridge [} 7.- N/, j-h k.'r T-kA with constant voltage excitation for ~ gT. completion by a three or two-wire RTD termination on each of the eight channels. The three-wire connection virtually eliminates errors due to lead resistance. The circuits are designed to achieve a null at the steam point for FEATURES Multiplexer is used with the Model each RTD. The bridge output is

Eight Individual 3-Wire RTD 1870-X Low Level Analog input measured using a capacitor transfer Bridge Conipletion Networks (LLAI) Basic Card. It provides mercury-wetted relay multiplexer in
Eight-Channel Capacitor Transfer MODACS 111 Process Input / Output c niunction with a high gain Multipicxer systems with RTD measurement differential amplifier which drives the
Mercury-Wetted Relay Reliability capabilities. The RTD Multiplexer 1870-X Basic Card input amplifier.

200 Volts of Common Mode provides high noise immunity and Since the input signal leads are never tsolation common mode voltage rejection. The directly connected to the amplifier, it

132 db Common Mode Rejection three wire RTD connection is effectively isolated from input 12-Bit Resolution including Sign automatically compensates for lead common mode signals. Additionally,
Fully Autoranged resistance and the temperature effects noise that occurs on the signal during

. High Signal-to-Noise Ratio of Icad resistance. RTD sensors can be conversion has no effect since the

180 Channels-Per-Second directly read by an associated input is disconnected at that time. A Maximum Sample Rate computer system via the RTD low-noise, instrumentation grade Multiplexer / Basic Card interface at amplifier kicated on each 1873-X RTD GENERAL DESCRIPTION rate of 180 samples-per-second.

Multiplexer Card minimizes the bus The Model 1873-X Resistance However, each channel is sampled length the capacitor signal must drive. Temperature Detector (RTD) twice, yiciding a thrsughput of 90 channels per second.

+ 10V I ll EXCITATION SUPPLY I$ l [ g, + 10V "L + 10V i _ _ _i RETURN ISOLATION G AIN = 128 ANALOG

r. ye-((

VV( c: BAS C RTD Le CARD il N. X hJ '( dr .L ' L- 'T#

'I-g.,d ^ %;& W% '/OTHEFF g ;..g,

.g!i-d e'- .. T k ' I),[mf[df4TO." 41, */ f MUX - Ap, '1,._ ? e "" CARDS s RTD. de .I. f. /O p, *y, ' r, J: g.7, yy\\ \\ ,os p. ws 7 c. jgp{;Id'f.y,, [ 4.,,. II j j,'A s vvs mi- ..<m- . $.... z,.Y. ,b w ,. 4. J 3.,

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, d.';, 's g$ 5 L !,h. % g'[?$ RTD ;ge-( ( "y YVk '.H'/. ,,i f.blCW.%l'. - f'1 ,!:E Wi Y'

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s ) y?,.Q f; - i %.;- {> < o& ], yyy ' (- 1,. ,.a. ..,. :: l ' ,'c. l

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'*i I I'I l9 figure 1. Three-Wire RTD/ Resistor Bridge Circuit Diagrarn MINIMUM REQUIREMENTS MODELS AND OPTIONS PERFORMANCE Up to eight 1873-X RTD Multiplexer AVAILAllLE SPECIFICATIONS Cards can be used with a single 18701 13731100 Q Platinum RTD with Input Type: LLAI Basic Card. Model 1873-X and DIN 43760 Characteristics Two or three-wire differential plus Model 1872 X Low Level Multiplexer 3373 210 0 Copper RTD with pa55ive 5hield. cards may be intermixed within any SAMA Characteristics Channel Capacity: LLAI System configuration. If the

1873 3 200 Q CP Nickel RTD 61 Channels per 1870 Basic multiplexer cards used are exclusively (200 Q at 70' F) 8 Channels per 1873 MUX 1873-X cards, the maximum number of input Options:

channels per 1870-1 Basic Card is 64. SOITWARE REQUIREMENTS 1873-1 100 Q Pt. (DIN) -220 to The multiplexer cards must be placed The RTD Multiplexer is supported by +850 degrees C in centiguous slots, to the right of the the MODACS 111 Sof tware Subsystem 1873-2 10 0 Cu. (SAMA) -70 to 1870-1 Basic Card in a MODACS 111 Revision D.0 or later. +150 degrees C PI,0 file. Each Model 1873-X RTD 1373 3 200 Q CP Nickel -100 to Multiplexer Card requires an 18%2 +600 degrees F Terminal Barrier Strip or an 1891 Termination Kit.

Multiplexer Type: Calibrated Accuracy: Lead Line Compensation Error Mercury-wetted relay, capacitor 1873-1 (100 Q Pt.) (3 Wire RTD): transfer multiplexer i.3 degrees C (- 155 to +375 1873-1 .006% Reading / Ohm Relay Life: degrees C) (10 mv Range) of Lead Wire f] 10 Billion Operations 1.5 degrees C (--220 to -155 1873-2 1.06 % Reading / Ohm V Sample Rate: degrees C) and r375 to +685 of Lead Wire 180 Samples /Second degrees C) (20 mv Range) 1873-3 1.006 % Reading / Ohm Common Mode Voltage: .8 degrees C (+685 to +850 of Lead Wire 1200 VDC or 120 VAC degrees C)(40 mv Range) Resolution: Common Mode Rejection: 1873-2 (10 Q Cu.) u bits including sign, scaled in 16 b.it 132db (DC to 60 Hz) +.3 degrees C (-70 to +150 data word i Common Mode Source Impedence: degrees C) (10 mv Range) Quantizing Error: Zero to Floating 1873-3 (200 0 CP Nickel) % LSB 1.25 degrees F (+65 to +335 Channel to Channel Crosstalk: degrees F (10 nw Range) 120 db or.01% of F.S. from previous i.6 degrees F (-100 to +65 channel, whichever is greater degrees F and +335 to +600 Nominal RTD Excitation Current degrees F) (20 mv Range) (Steam Point): 1873-1 100 p A 1873-2 1MA 1873-3 100 p A ' NOTE: RTD Linearization and Conversion Tables may be found in the MODACS 111 Reference Manual l i l l l t l

l @MODCOMP "C' i"L'h511 " ^ ' " ^ " ' " " i MODACS Ill HIGH LEVEL ANALOG INPUT MODACS 1860-X AND 1861-X I I l I l l FEATURES l 16 Differential Channel Solid State 1 g Analog Input Card

1..

.......,.g 24 Differential Channel Solid State i b.. Iv Multiplexer Expander Card .w 4,,- . Voltage and Current Input Options l j j... -.-........as... i 7 . Four Gain Ranges (110.24,15.12 .~ ', ', - '... '.... :.. '. f.. f.. .......,i".~..f g 12.56, 11.28 Volts Full Scale) m. /== . Autoranging ~ f. : '..'...... / g . Scaled Integer Data y .x... f 12-Bit resolution, including sign .~.,.--:.

t..

s. -: ..,..... j . Buffered Data on the Card I ......e.. . M . External Conversion Control ,( l p' ..... e._ -_.s-I GENERAL DESCRIPTION l, .'a !2-3j%: The 1860-X High Level Analog Input ) ', ' ~ ' ')[..-. ..n; = :i (HLAI) Card and the 1861-X High .H ? 5.S21 Level Analog Multiplexer Expander i .c g, " ll.T tt 2 : '" 'J-:] ;" - Card provide a MODACS !!! System l -~u with high level analog input a ~ --- ~ - - - capabilities. The 1860-X and 1861-X will find applications where fast, i Model 18601 High Level Analog Input Card accurate measurements of commonly encountered high level industrial analog signals (1.0 VDC to 10 VDC i or 20 ma full scale) is required. l 1- %,a 1 m o. '{- The 1860-X High Level Analog Input p i; C. X j -Q Card contains.16 channel (point) ,, d *.*_... f 1 I...d.. o m Eiji differential multiplexer, a four gain 1 ( [q............. ;.L......p ] ......... :i , d f.E range sample and hold amplifier, !!!d: ' [!,. E auto-range control circuitry, a 12-bit [p - l,,,," '. l -E sucessive approximation analog-to-l.IIl[I.! I i i '. i l ; i f ~ l ' 6 il!- rfrfr%I Ofr}r W rtWr'-'NH"< Miji:

E digital converter, RAM data storage 6

lh and control logic to interface with the tM M ;T,1,;.,j/;E, T.

. :,";, ;.1 Eg MODACS !!! Process Input / Output i

i in!!- 7 :. E (P!O) Bus. The 1860 has a g p. 1 i:!I,;!! ' . 5:!..! j!!! ^ l g : @ throughput of 30.000 samples per USh o ' ' !!$5 f.dd!!!$ !. ii) ).!b i. - N 5'#""d"

* !!!!F g.j@jj!il!!!!

4.!!: #.!!

iiiii G Y

E!E i 61 ig ji, The 1861-X High Level Analog Input jjjj - ,,.jg;;i ii}ill i::55!qi.l!!yg r. liiEi. N!!!' h!gj i Multiplexer Expander Card provides

!!NI *55i [

S!Si. pigii channel (point) expansion for the I 'T i!!!!i..'i!N!!!j$yf!!Eih, e!!!iili@ihiidE!EIMiON!iiii!O Wiiiiii!!!!;! 1860. The 1861 is a 24 channel

i. :iii! r:iiii..: 1 ::E m E

e differential multiplexer card that receives essential timing and control Model 18611 liigh Level Multipleier Espander Card signals from an 1860. Two 1861's can i i }

T.'aN:o l basic mode of operation is a [ l .,,3,, 1 - i continuous sequential scan. The scan l I I 8 starts at channel zero and steps l through all channels. The scan 1 i i j,,,,,,,,,,, t i hardware is self-adjusting to include r e "" 'm a -,,,4 .a*". _.. ; i expander channels only when they E.i$a i e ,,.,J ? 0* i= a.r" m ar v av<a -I are present. The multiplexer can be I ='. w l j commanded to sc.'n continuously or ls[ 'lg l to scan through all channels once and l"* I stop. External signals are available to _. -____________________"=i=t.] further control the scan. When not t used to control the scan, these signal lines can be used as status indicators r- - - -' - -j - -' ' '------'--}--, I.,,,,,,,.. I l,,,,,,,,,, j to external devices. The autorange control circuitry senses l c"* 9 _ l the amplitude range of the input l'4 - : ~ a""._ i i 4 $ l l4 iG j I signal and automatically sets the gain l "' _ _ __a:'.J l "_* l to a level that provides the optimum

t. - -

L """lu input to the A to D converter. This Figure 1. High Isvel Analog Input Subsystem Block Diagram gain information is also supplicd to the scaling shift register to allow it to be used with an 1860 to provide 64 converter are written into the RAM justify the 12-bit data in the 16-bit diff rentirl channels. Multiple 1860 data buffer on the 1860 after it has computer word. The 16-bit word is and 1861 cards can be installed in a been shifted to the appropriate then stored in the RAM data buffer MODACS Ill P!O file. Figure 1 is a position in the 16-bit computer word to be accessed by the controller and simplified block diagram of the HLAl as determined by the autorange store in the computer's memory. Subsyst:m. control circuitry.This provides data that needs no additional modification Each cnslog input has a single pole The MODACS Ill controller can read RC filt:r. Three voltage filter options except c nversi n t engineering the RAM data buffer at any time " IS-tre tvrilible: 18Hz,180Hz and whether the HLAI Multiplexer is 10KHz (no filter). A fourth option is The RAM data buffer allows the actively scanning or halted. The data o curr;nt input with an 18Hz filter, analog input A to D converter to returned to the controller is in scaled This is cchieved by placing a operate asynchronously to the integer form as shown in table 1. 250-Ohm,.01% precision resistor across th2 input terminals. A 15 volt u nce "* sign:1 is produced in response to a 120 milliampere current through the 10 24 V SIGN 5.12 2.56 1 26 0 64 0.32 0.16 0 08 0 04 0.02 0.01 0 005 0 0 0 0 precision resistor. 5.12 V SIGN SIGN 2.56 1 28 0 64 0.32 0.16 0 08 0.04 0.02 0.01 0 005 0.0025 0 0 0 The 1860 and 1861 uses a CMOS 2.56 v SGN SIGN SIGN 1 28 0 64 0.32 0.16 0 06 0.04 0.02 0 01 0 00$ 0 0025 0 00125 0 0 high speed solid state multiplexer that 1 o i N Si N Si N sign M4 0 32 016 H6 H4 H2 H1 H05 M 25 M 125 H 00625 0 connects the high and low analog signals inputs to the differential Table 1. Voltage values returned by the Hl.AIS sample cnd hold amplifier. This system pr:vides high accuracy, good MODACS III Controller. The A to D Since the data is scaled, no shifting is common mode rejection and can convert data at its maximum rate required before the engineering unit minimum channel-to-channel of 30,000 samples per second without representation is obtained. If the crosst:lk. waiting for the MODACS III desired engineering unit is volts, the Controller to read data into CPU integer value can be multiplied by The sample and hold amplifier has four g:in ranges (1,2,4 and 8). The mem ry. Each analog input card also .0003125, the voltage equivalent of input is sensed by the autorange features the capability of identifying bit 15, to provide a real number contr:I circuitry that then its " card type" to enable the system representation of the input voltage. i assemble configuration cut:m: tic-Ily selects the optimum MINIMUM REQUIREMENTS inf rmation. gain f r the sample and hold The 1860-X High Level Anilog Input amplih:r. Card required one PIO option slot in

The 12-bit sucessive approximation FUNCTIONAL DESCRIPTION any MODACS 111 file with an 1812-1
A t: D c:nverter provides high speed The operation of the 1860-X High Analog / Memory Regulator. Up to
conversi: n with repeatable results.

Level Analog input Card can be sixteen 1860's may be inserted into a The twelve data bits from the started and controlled by computer file. l

Each 1861-X liigh Level Analog Ini.at Sigml Source Impedance: A/D CONVERTER and Multipl:xer Expander Card requires IK-OHMS Maximum SAMPLE HOLD SECTION one PIO option slot in any MODACS Input Loading Error: Resolution: Ill file. A maximum of two 1861-X 5 S x 10 % (were S is the scan rate in 12-bit including Sign 4 G cards can be used with an 1860. The samples /sec nd) Quantizing Error: 1861's must be installed in the next i %LSB higher number slots adjacent to the Input Impedance: 1860 in the same file. 20 megohms shunted by 100pf Aperture Time: switched 100 Nanoseconds CUSTOMER CONNECTIONS Common Mode Rej.ect. ion: Offset Setability: Each 1860-X liigh Level Analog input 80db (DC to 60Hz) 1.01% Full Scale Card requires one 1890-1 Terminal Barrier Strip or one 1891 Mating Common Mode Source Impedance: Gain Setability: Connector Kit. Each 1861 X High 1-megohm maximum i.01% Full Scale Level Analog input Multiplexer L8nearity Error: CURRENT INPUT OPTION (Straight Line Between Zero and Full Expander Card requires two 1890-1 Terminal Barrier Strirs or two 1891 Input Impedance: Scale) i.025% Full Scale 250-Ohm i.01% Mating Connection Kits. Noise: fun Scale Cunent: (Peak,3 Sigma: DC to IMHz): PERFORMANCE i 20 Milliampere .02% Full Scale SPECIFICATIONS (@25'C unless otherwise specified). Input Conductance: Autoranging: 4 ma/V This system utilizes four gains; 1,2,4 MULTIPLEXER SECTION Analog Input Type: Conductance Tollerance: and 8. The input voltage ranges for Differential (two wire switched) i.01% (Additional gain error) these gains are 110.24V, is.12V, 2.56V, and il.28V, Full Scale Channel Capacity: Current Bit Weighting 1860 - 16 channels (fully autoranged): respectively. 1861 - 24 channels The gains are autoranged with a ,,,,ow y,,,, nominal decision point of 17/16 Full ^* " " ^ " " (Maximum of two per 1860) uicaonwe ars

votrao, Scale. The 12-bit resolution Sample Rate:

ll* [ ll-v specification remains valid for all gain 30,000 samples per second (including 4 s '2 s i rs -v "v ranges. Autorange) Crosstalk: Table 2. Current Input Ranges 72db at 1KHz VOLTAGE INPUT OPTION Fco 30% (-3db) 18Hz Input Voltage Ranges (fully autoranged): 110.24V Full Scale H') ;i Q ^^ - 1 g 6HMF ^ ^ P i 5.12V Full Scale '0Ws ~ ,L.g. i 2 56V Full Scale i 1.28V Full Scale SHLD TYPICAL MUX Signal Plus Cnmmon-Mode Voltage: 112V Max. Figure 3. Typical Current Input Filter Maximum Input Voltage (with no damage): 125V (Power applied) 110V (Power off) Filter Options Hi) { ^ :. 3 Low) l' T SHLD) TYPICAL MUX G Fixure 2. Typical Voltage input Filter (single Pole R-C Filters) Fco 130% ( - 3db) 1811z 180Hz 10KHz (no filter)

liar WARE PRODUCT BULLETIN 4:'40E0W Number 511 MODACS III ANALOG OUTPUT MODEL 1851-X q ..9 GENERAL DESCRIPTION The 1851-X Analog Output Card I ~. f~'2 (AO) provides four digital-to-analog 'S N -lh,.~ -{:-( g- - j l f. . :...[...:.r. a A converters per card with voltage or -t7 ...J I ?? -[\\y[....h (. 4 Z !.;/ h 1 7-;! ---i '; :M. A y- ~ t #T-f# . f( current loop outputs. The AO card 7.. --a.4". l'"' utilizes parallel converters for each -3 ,b. g,.U.mQ g,j k. >t channel and data registers for each i, f.g ' O.[7 f}' (.:"*":.i(.,, converter. A data read for each register i f, - 1 J", ::",' l t-...;jb l.:...,sp{% -.. f.Tt"~ :' E f."".7 ; l ' g' I.i is provided to support diagnostic check i:' ,c w {a,s,i-'f._t$ -6 out of the card and simulation ?. -+. . f 1.. K y[$ i capability of the subsystem. I@ y ( k,.[' 3 ).' l);[.{,;.,,,' f ? 5 I f, ;,. " O-i ~; 1 Additional hardware features allow 0,. each Process I/O Card to transmit .g.t.. g...ceg ;-Q O' -. 9. M... h ,-%![ i ik 9

.'4.u.

" card-type" information onto the

. y. M? E-Q, p-

---%? e.Ji-Process I/O Bus to identify system a" syI ii.%g j J .:....;efi, i p'- configuration. J.'. v. l

c

,-u.... s- .. =.,.. . -, ;.,,1 .w. - 3. s,,: FUNCTIONAL DESCRIPTION L:nl. p- -.. .w..... _.. i ,v i , 7- ' .t. c (See figure 1.) a l -., q:: 6 a The 1851 X Analog Output Card M $Wp-l ' ~ " ) ~ N L > S.b/-i. consists of multiple of three .c.- .s ' ( .J. components: a data register, a digital. ^' '~4 to-analog converter (DAC) and an Model 18512 Analog Output Card (Typical) output amplifier. An input data selector is used for the diagnostic or simulation FEATURES read back of the data loaded into the 12-Bit Resolution data registers. Each channel has 12 bit resolution Tbc data register is loaded with the to provide a minimum voltage upper 12 bits of the 16-bit data word increment of S mv. from the MODACS !!! Pl/O Bus . Wido Variety of Interfaces whenever the card slot is addressed for l The Analog Output Card has three utput. The data is immediately interface options to satisfy most -converted, by the always active DAC. t a proportional analog current which IndustrialInterface requirements. drives the output amplifier. The output . Four Channels per Card

mPlifier converts the DAC output to The Analog Output Card has four either a proportional current or to a digital-to-analog converters per proportional voltage to drive the card to provide small and large e crna connech ns. A sunpliM analog output capability, diagram of each output stage.is

. liigh Speed Parallel Converters llustrated in figure 2. The MODACS Ill Analog Output Cards use parallel digital-to analog 'V converters to provide high response output changes plus accurate and stable outputs. [

S' r. The output stages are defined as follows: OUTP REGIS TER Pi/O Voltage DAC: gypL,,u t cu e oAc 1 ,gn o _l ous 110.24V Full Scale at Soma Maximum LSO t Current DAC: I SIGN 1 to Sma into 1.6KO load Maximum h load resistance (grounded load) REG 8 STER L Current DAC: NWT D^c cs i AMPLIFIER 4 to 20ma into 400KR load Maximum load resistance (grounded load) S'6" APPLICATIONS DAC REGISTER ~ The MODACS III Analog Output Card CH 2 AMPLIFIER 2 is designed to satisfy most analog - '88 controller requirements, which are C mmon in set point Control systems, SIGN it is also suitable for driving analog = REGISTER Panel meters and chart recorders. ^OUWT CH 3 DAC 'So MINIMUM REQUIREMENTS The 1851-X Analog Output Card requires one PI/O option slot in any input MODACS Ill File (1805-1/1805-2) oATA which has the 1812-1 Analog Regulator SELECT

installed. Up to 16 AO cards can be inserted into one file. Each AO card requires one 18901 Terminal Barrier Figure 1. Four-Ch.nnel An log Output Strip, or one 1891 Connector Kit.

PERFORMANCE OUTPUT SPECIFICATIONS g Zero: oAc ouT o^c .01% of full scale h ->M Lo^0 h) ~ l RETURN Ol*/o of full scale RETunN 4d to^0 h) Linearity at 25 C: .025 % suesysTEu suesysitu a p caoVNO 9 h GROUND .01% (DC to IMHz) 4) 4) ~ Settling Time: 15 microseconds)to within.02% of v v VOLTAGE OurPUT AMPLIFIER CURRENT OUTPUT AMPLIFIER finJI value for a full scale step with a .01 micro-farad load capacitance). Figure 2. Typical Output Stages I @MODCOMP i Dedicated to your success i MOOutAR COMPUTER SYSTEMS INC. PO Box 6099.1650 Vest McNab Road. Ft Lauderdale. Florida 33310. Tel European Headquarters-MODULAR COMPUTER SYSTEMS INC. Molly Millars Lane.Wokingharn. Berkshire. England (0734) 788711. TLX 851849149 Tu i.cna.c.c., coni.oi., m.. oco-oi .n. .cc..... im. o.. .c.i.oo.... ci io cn.oo. ooo.,o.,.a<c. i eROoucT uaRx E TiNo. T.i.onon im o n.i3so io cn. coo,.av cn.non in.i,nw m occo,, Pim coni o ..no.- i.cw, r~..a - e s = l

OVERSIZE DOCUMENT PAGE PULLED l SEE APERTURE CARDS I NUMBER OFOVERSIZE PAGES FILMED ON APERTURE CARDS i APERTURE CARD /HARD COPY AVAILABLE FROM RECORD SERVICES BRANCH,TIDC FT5 492-8989 t i i 1 l .}}

ML20207S611

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