Text

Remote I/O Equipment Hardware Acceptance Test Procedure for NUS Corp/Bg&E Calvert Cliffs Data Acquisition Sys
	ML20155H216
Person / Time
Site:	Calvert Cliffs
Issue date:	02/20/1984
From:	; COMPUTER PRODUCTS, INC.
To:	;
Shared Package
ML20155D568	List: ML20155D565; ML20155D571; ML20155H216;
References
	PROC-840220, NUDOCS 8810180523
	Download: ML20155H216 (192)
	v • d • e

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ATTACitMENT 3 BG6E 32500-EX N

l REMOTE r/U EQUIPMENT RARDWARE ACCEPTANCE TEST -

PROCEDURE for NUS CORP. /

HALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM r AT C.F.I. (FORT LAUDERDALE)

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L I REMOTE I/O MARDHARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

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PROCEDURE APPROVED BY: 'P- I DATE '2. Pd (C.P.I.) TITLE: h J 4 6- e~}2. h /~. D )c-4) N I2/ O u PROCEDURE APPROVED BY: - -, d dah .- DATE '1/ 3 / PM Ii (C.P.I.) TITLE: DMca- %4c4C" "

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PROCEDURE APPROVED BY: -

DATE 7 [f (B.G.E.) TITLE: #A a M /W-l PAGE 2 of 116 PAGES

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REMOTE I/O' BARDlO2E ACCEPTANCE TEST PROCEDURE for NUSr CORP./

BALTIMORE at COMPDTER. GAS and PJtODUCTS, ELECTRIC INC CALVERT(.CLI.FFS 7T r AnnnnarRJ DATA 2/20/84

' ACQUISITION , SYS Thio revision of the Remote I/O Nardware Acceptance Test Procedure, .

dated 2/20/84, includes the following; pages a , , ,

Page 1. dated 20 February 1984,

. Page 2 dated 2/2/84, .

Page 2a dated 7/10/E4, .

Page 3 througn. 78 dated 2/2/84, .

Pages 79 through 80 dated 2/20/S4, Pages 81 through 88. dated 2/2/84, Pages 89 through 90' dated 2/20/84,. aiu2 -

Pages 91 through.116 dated 2/2/84. ,

Ravisiott.2/20/84 approved by z (C.P.I.) W e d _- s DKTE s/r F M

( u.tr.s. _-% DA2T z /E K djlf (B.G.I.)

DATE.,!2Y!N w r s l

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PAGE 2a of 116 PAGES

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFTK DATA ACOUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 UNET t \\

d SYSTEM CABINET ids. 59t, A CabikT :tk l TEST CONDUCTOR r Rob eT Lw NUE REPRESENTATIVE 2 _ . d. O1AE BGE REPRESENTATIVE , Micu AstS . Jm rs Procedure copy complett : Initials a We/ /

DATE TEST STARTED s 8/7/

LOG BOOK PAGES: (i t _

l TEST COMPLETED BYr. WM DATE 3/ / d./96' ,

(C.P.I.) TITLE: % eye ce, C e o_r M e o. ., <./

I TEST WITNESSED BY - V DATE // 8 w.0.s.>Tw.E.y!$ rJ26 -

TEST wtT m SED BYt //3 P A'*4 AN [ ~IS,DATE

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(r.G.C.) TITLE:

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REMOTC r/7 NARDh'ARE ACCEPTANCE TEST' PROCEDCTRE for NUS' CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at- COMPUTER PRODUCTS, INC. (FT., LAUDERDALE)- 2/2/84 l

1. GENERAL DESCRIPTION The purposa of this document is to provide a procedure for the performance of a customer acceptance test of the remote input / output equipment hardware purchased by NUS Corporation by purchase order number DA 8827-1 and sold by Computer Products Incorporated, Measurement and Control Systems Division by sales order numbers 28334 (Unit I) and 28335 (Unit II) at the Fort Lauderdale plant of CPI .

This aquipment is destined to be installed in the Baltimore Gas and Electric Calvert CILffs power gestaration plant.

The equipment is broken into two ' units', ' Unit l' and ' Unit 2' . Each unit is divided into two ' channels' , ' Channel A' and ' Channel B' .

The channels are composed of the following ' subsystems's ' Safety Related A', ' Safety Related B', 'Non-5,afety Related A', 'Non-Safety Related B', ' Shared A-B', ' Data Concentrator / Maintenance Panel A' ,

and ' Data Concentrator / Maintenance Panel B' . Each subsystem may be composed of one or more cabinets containing the I/O equipment.

The testing of the remote I/O equipment at this level does not include the Data Concentrator equipment nor the Data concentrator remote Links, the Intelligent Remote Control Units.

Testing will be performed on a per cabinet basta with one copy of this procedure assigned to each cabinet. Each type of product in a cabinet will be tested as a group before proceeding to.the next type of equipment. .

Cabinets in the Non-Safety Related and the Shared subsystems have wiring that source or terminate in another cabinet within its subsystem and due to this inter-cabinet and inter-chassis wiring, some connections and measurements will be made at cabinets or controllars other than the one under test.

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l REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORt! GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

2. . TABLE OF CONTENTS / SCOPE OF TESTS SECTION. 3. - Dispositioning and Test Data Recording The dispositioning of the tested product and the recording of test results is described in this section.

SECTION 4. - Test Equipment Requirements The equipment required to perform this acceptance test is listed in this section.

SECTION 5. - Reference Documents Documents referenced by the procedure and the documents associated with the equipment under test and the test equipment are list.ed.

SECTION 6. - Configuration of Equipment for Testing-This sectierr describes the special configuratione of the test equipment and the equipment to be tested for the performance of the tests.

1 SECTION 7. - Equipment Under Test Configuration Verification The correspondance of the configuration of the equipment in the cabinet to the equipment configuration drawings will be verified.

SECTION E. - AC Power Distr}.bution/ Indicator Panel and Power Supply validation The AC Power Distribution and Indicator Panel and the power supplies will be validated as operational and the corresponding powar wiring' will be validated.to be accurate.

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE" for NUF CORF./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DN"- ACQUISITION SYSTEM at. COMPUTER PRODUCIS, INC. (FT. LAUDL. 'LE) 2/2/84 SECTION 9. - Optically Isolated Digital Input Module Validation l Each Optically Isolated Digital Input Module and the corresponding signal conditioning module will be validated as operatiorial, and the associated cabling will be validated to *>e accurate.

SEcrION 10. - 0.I.D.I Surge withstand Capability validation The surge withstand capability of a sample of up. to five percent (or at least one) of the surge protected Optically Isolated Digital Inputs in the cabinet under test will be validated as operational in.

compliance with IEEE standard & 472.

SECTION 11. - Change of State Digital Inpu'c Module Validation Each Change of State Digital Input Module and the corresponding signal conditioning module will be validated as operational, and the associated cabling will be validated to be accurate.

SECTION 12. - C.O.S.D I.. Surge Withstand Capability Validation The surge withstand capability of a sample of up to five percent (or at least one) of the surge protected Change of- State Digital Inputs in the cabinet, under test will be validated as operational in compliance ,

with IEEE standard i 472.

l 3ECTION 13. - Quad' Pulse Counter Module Validation l Each Quad Pulse. Counter Module and the corresponding, signal conditioning ;

4 module will be validated as operational, and the associated cabling will be validated to be accurate SECTION 14. - Quad Pulse Counter Surge Withstand Capability validation i The surge withstand capability of a sample of up to five percent (or at least one) of the surge protected Quad Pulse Counters in the cabinet under test wLil be validated as. operational in compliance with IEEE standard.6 471

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 l SECITON 15. - Up/Down Pulse Counter Module Validation Each tTp/Down Pulse Counter Module and the corresponding signuI conditioning module will be validated as operational,.and the assoc.iated cabling will be validated to be accurate.

SECrIOR 16 - Up/Down Pulse Counter Module Surge Withstand Capability validation The surge withstand capability of a sr.mple of up to five percent (or at least one) of tne surge protected Up/Down Pulse Counters in the cabinet under test will be validated ar operational in compliance- ,

witn IEEE standard t 472. 1 SECr:0N 17. - Digital and Analog' Loopback and Calibration Module and Analog to Digital Converter Module Validatior.

Each Digital and Analog Loopback and Calibration Module and analog to ,

Digital converter Module will be validated as operational and )

accurater the towperature censing transducets will be validated as operational and accurater and the associated cabling will be associated to be accurate. 1 l

l NEcrION 18. - Power Supply Monitoring Analog Inputs validation l Each analog input gate module monitoring the cabinet power supplies, the RTD SCM power supplies, and the contact sense power supplies will be validated as, operational, and the associated cabling will ha 1 validated to be accurate. I SECEIOM 19 - Voltage Sensing Analog Input Gate MMuf = validation Each voltage sensing analog input gate module and the corresponding signal conditioning module will be validated, as operarinn=1, and tue associatsd cabiling wLil be validated to be accurate.

SECTTON 20. - Voltage Sensing Analog Input. Gate Module Accuracy Common-Mode. Voltage Rejection, and surge Withstand Capability validation The common mode voltage rejection and. the accuracy of a sample of up to five percent (or at least one) of the voltage sensing analog input gate modules in the cabinet will be validated. Then a surge will be applied.to the sampla in compliance with IEEP. standard 6 472. The common mode voltage rejection and accuracy of the sample will then be revalidated to validate the operatiorr of the surge protection circuitry.

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REMur8 I/O HARDWARE' ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFES DATA ACQUISITION SY.STEK at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 SECTION 21. - Resistive Sensing Analog Input Gate Module validation Each. resistiva sensing analog input gate anodule and the corresponding signal conditioning module (s) will be validated as operational, and the associated cabling will be validated as accurate.

CEcrION 22. - Resistive Sensing Analog Input Gate Module Surge Withstand Capability validation The surge withstiand capability of a sample of up to five percent (or at least one) of the surge protected resistive sensing analog inputs in the cabinet under test will be validated as operational in compliance with IEEE standard ) 472.

SECTION 23. - Voltage Sensing Analog Input Gate Module Stability validation The voltage sensing analog input gate modules selected for validation of common mode voltage rejection, accuracy, and surge withstand capabLlity will be validated to be stable.

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l REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORC CAS and ELECTEIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at COMPUTER PRODUCTS, INC.- (FT. LAUDERDALE) 2/2/84 .----- _

APPENDIX A.,- Test and Repair Log Book Format The format of the log book used. to document records of the testing and ' j any anomalias or non-conformances found is illustrated in this appendix. I APPENDIX B. - CPI RTP Control Panel Description and Operating Instructions.

This appendix containa a description and instructions on the operation of the CPL RTP Control Panel, one of the primary pieces of test equipment used to perform the test APPENDIX C - Slot / Address Cross Reference Table for UI/OC and' RADI/OC This is a table cross referencing the physical slot number of the option card slots of the Universal I/O Controllers with their programming addresses. -

APPENDIX D. ~ Operating Instructions and Test Configuration for Velonax Transient Surge Transient Generator The operation and configuration of the Velonex Surge Transient Generator, used to test the surge withstand capabilities of the equipment in compliance with IEEE standard 6 472 is described in this appendix.

4TTACHMENT 1 - Test configuratforr Drawings This attachment contains drawings depicting the configurations of test equipment used, for the various tests ATTACHMENT 2. - EquipmentJ Configuration Drawings This attachment contains the drawings of. the configuration of the equipment irt the cabinat as the equipment will be tested.

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

SALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. (FT LAUDERDALE)' 2/2/84

3. DISPOSITIONING AND TEST DATA RECORDING ,

The acceptance , ast wLil. be performed using a copy of this procedure i stamped ' Con'. rolled Document

with the required signatures on the 4 approval signature page (page 2). )

At the beginning of the tesc : I il The test conductor and the representatives fece NUS and BGE will print their names on the test performance signature page fpage 3) of the copy of the test procedurer (All entries made on all documents will be made in black ink.)

21 The copy will be verified to assure that there La one and only one copy of each page of the procedure Lncludedr Tha test performance signature page will then be initialed;

3) An entry will be made to the ' Test and kapair Log

using the format illustrated in Appendix A, to mark the commencement of the test on a cabinstr

4) The unique identification of the cabinet under test will be entered on tha test performance signature pager 57 The page number of any amt all pagwr of the log book associated with the cabinet under test will also be recorded on the test performance signature pager and

6) The CPI identification numbers, where applicable, of the test ,

equipment used to perform this acceptance test will be noted l in the required test equipment section (section 4.) of the i copy of the procedure. l l

A module identifier block appears in each verification / validation i section of this pecedure. Successful completion of applicable steps i of. the procedure on an individual product or product met shall be Lndicated by entering the location identifier of the module in the ,

controller and the controller's identifier and initialed by the test j conductor and a wLtnass. )

A signature block appears at the end of each verification / validation section of. this procedure. Successful completion of an applicable section on all products specified by the procedure shall be indicated-by the signatures of the appropriate representativer of CPI, NUS, and BGE (wh1re applicable) .

When a section of the procedure is NOT applicable to a cabinet, 'N/A' '

will be entered on the signature lines and will be initialed' by the appropriate representatives.,

l PACE 10 ot- 116 PAGER l l

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACOUISITIOM SYS"sEM at COMPUTER PRODUCTS,, *INC. (FI. LAUDEADALR) 2/2/&4 I Anomalies or non-conformances encountered during the performance of'the test shall be handled as follows: ,

3 II An-entry is made in the Test and Repair Log describing the

. non-conformancer

2) The non-conformance will be documented on a Non-Conforming I

Material Report (NCMR) form (reference AQ 5.01): ,

Il The non-ennformance.Is. corrected; f 4) The corrective action is documented in the Test and Repali Logr

5) The corrective action is documented on the NCMR formt

6) The applicable validation ateps are repeated and successful completion is indicated by the signaturea of the representatives on the signature block.

Note that if a non-conformance is encountered d ' ring the performance of one of the validations of a five percent saegle, the steps above will

, be performed and in addition another sample is selected and tested.

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECIRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

4. TF.ST EQUIPMENT REQUIRED The equipment required ta perfornr this acceptance test- is as- listed belows

~

(All electronic test equipment shall be in compliance with C.P.I.

Quality Assurance- procedura AQ 8.02 - ' Calibration Control SysteJa' .)

4.I DigitaI mtitirseter r Hewlett Packard Co. Model 9 34685 . a, .. CFr ID # 5541 4.2. Programmahle DC Voltage Source a Electronic Development Corp. Model t 501-J CPI LD t 55 /'d 4.3 AC/DC 7-A Source r RFL Industries , Inc. Model No., 821 . .. CPI ID $ C :ri 4.4 Surge Transient Generator r Velonex Model No. 510 . . . . . . . . .. CPI ID 6 CASE _

4 .5 Digital Thermometer Omega Engineering Inc. Model No. 2166A . CPI ID t S EIq 4.6 CPI Analog Input System Test Computer : LSI-11 based (See the 'Descriptierr and Operating' Instructions for the CPI Analog' Input Test Computer and Analog Input Test Programs')

4.7 CPI RTP Corit'rol Panels 2 ea. )

(CPI. t 070-0044-001) 4.8 CPI Universal I/O Controller (CPI 6 070 .0004403) 4.9 CPT Special Relay Output Module with contact protectiorr (CPI 6 000-7066-000) 4.10 CPI Special Fulsing Relay Output Modale with contact protectiort (CPI. 6 000-7067-00Q)-

4.11 CI'I I/O Bus Termination Module (CPI t 021-0004-000) 4.12 CPI RTP I/O Bus Cables (CPL 6 314-0001-010 L cach and.

CPI 6 314-0001-020 1 each )

4.13 CPL 12 Volt Power Supply, panel mounted (CPI t 070-0005-000) 1 PAGE.12. ni 116 PAGER

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fCr NUS CORP./

R&LTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC (FT. LAUDERDALE) 2/2/84 4.14 CPL BTSCA (25 inch, 48 pin) to Test cable / Connector Adapter (CPI 6 000-7077-000) l

) 4.15 CPI Digital Input Surge Procection Test. Connector I (CPI i 000-7078-000) I 1

3 4.16 CPI Pulse Counter Surge Protection Test Connector !

(CPI 9 000-7097-000) 4.17 CPr Analog Input Unbalanced (1 Rotus) Test Termination /Cormector

)

(CPI 6 000-7079-000)

4.18 CPI Digital. Test Cable j (CPI t 000-7080-000) 4.19 CPI Analog Input Test Divider / Connector for BTSCAs (CPI 6 000-7081-000) 4.20 CPI Analog Input Parallel Input Test Connector

, (CPI 6 000-7082-000) 4.21 CPI Analog Input Test Divider / Connector for UTRPs (CPI 6 000-7085-000) 4.22 CPI RTD Resistor Terminations Platinum 200 ohm, 32 s 350 F (CPI i 000-7086-000) .

4.11 CPI RTD Resistor Terminations Platinum 200 ohm, 32 : 850 F (CPI 6 000-7087-000) 4.24 CPI RTD Resistor Terminatierts Platinum. 200 ohn, 31 . 110 F (CPI f 000-7088-000) 4.25 CPI RTD Resistor Termination Copper 10 ohn, -10 a 209 C (CPL 4 000,-70&9-0041 4.26 CPI Up/Down Pulse Counters Test Meaderr w/ diodes (CPI 6 000-7098-000, -001., -001, -a33) '

4.27 AC' Power Receptacle Testar Iria a l Industries, Inc., Model No GI-035 i

PAGE.13.of 116 PAGE.1

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l REMOTE I/O HARDWARE ACCEPTANCE TF9T PROCEDURE fer NUS CORP./

BALIIMORE GAS cnd. EL5CTRIC CALVERT LLIEF3 DATA ACQUISITION CYSTEM i

! at: COMPUTER PRODUCTS, INC (Fr LAUDERDALE) 2/2/84 i 1

1 5- REFERENCE' DOCUMENTS' This section lists the documenta referenced by the procedure and the documents associated with the equipment under test and the test equipment. Other documents may be referred to by the documents listed in this section.

5.L CPI. Univ. A.D.C. Card and Univ., A.I Card Set. (t Q2.L-Q211) l 5.1.1 Parts List (CPI t AP 020-0211) 5.1.2 Parts List (CPI t AP 021-0211) 5.1.3 schematic (CPI # Cs 021-0211) 5.1.4 Assembly Dwg. (CPI 9 CA 021-0211) 5.1.5 Technical Manual (CPI f 980-0021-211) 5.1.6 E'ngineering Specification (CPI t AE 021-0211) 5 .1.7 Test Procedure (C#! 6 AT 021-0211) 5 .2 CPI Digital Input Card ($ 0% -5227) 5.2.1 Parts List (CPI 6 AP 020-522i)

Parts List (CPI $ AP 021-5227) 5.2.2 5.2.1 Schematic (CPI t C1 021-52.2.7) 5.2.4 Assembly Dwg'. (CPI t CA 021-5227) 5.2.5 Technical Manual (CPI i 980-0021-227) 5.2.6 Engineering Specification (CPI t At 021-5227)

( 5.2.7 Test Procedure (CPI $ AT 021-5227) 5 .3 CPI Optically Isolated Digital Input Card ($ 021-5230) 5.3.1 Parts List (CPI & AP 020-5230) 5.3.2 Parts List (CPI $ AP 021-5230) 5.3.3 Schematic (CPI & CS 021-5230) ,

5.3.4 Assembly Dwe., ( CPI 4 CA 021-5230 )

5.3.5 Technical Manual (CPI 6 980-0021-230) 5.3.6 Engineering Specification- (CPI $ AE 021-5230) 5.3.7 Test Procedure (CPI i AT 021-5230)

I 5.4 CPI UnLversal U.S.W.R Analog Input Gate Card- (t 021-5234) 5.4.1 Parta List (CPI 6 AF 020-5234) 5.4.2 Parts List (CPI 6 AP 021-5234) 5 .4 .1 Schematic (CPI F CS 021-5234) 5.4.4 Assembly Dwg. (CPI 6 CA 021-5234) 5.4.5 Technical Manual (CPI 6 980-0021-211)

I 5.4.6 Engineering Specification (CPI 6 At 021-5234) 5.4.7 Engineering Specification (CPI 9 AE 021-0211) 5.4.8 Test Procedure (CPI 6 AT 021-5234) 5.4.9 Test Procedura (C.PL & AT 021-02111 -

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fer NUS CORP./

BALTIMORE GAS rnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTSR at COMPUTER PRODUCTS, 'INC. (FT. LAUDERDALF) 2/2/94 5.5 CPI Digital and Analog Loopback and Cal. Card. (5 021-5271) 5.5.I' Parts List (CPL i AP 021-5271) 5.5.2 Schematic (CPI 4 CS 021-5271) 5.5.3 Assembly Dwg. (CPI f CA 021-3271) 5.5.4 Engineering Specification (CPI 4 AE 021-5271) 5.5.5 Test Procedure (CPL 8 AT 021-52711 5.6 CPE Quad Pulse Countar Carti (t Q2.1-5278) 5.6.1 Parts List (CPI & AP 021-5278) 5.6.2' Schematic (CPL 6 CS 021-5278) l 5.6.3 Assembly Dwg. (CPI $ CA 021-5278) 1 5.6.4 Engineering specification (CPr i Ar 021-5278) 5.6.5 Test Procedure (CPI $ At 021-5278) i 5.7 CPI Change of. State Digital Input Card (6 Q38-5064) 5.7.1 Parts List (CPI $ AP 038-5064) 5.7.2 Schematic (CPI # CS 038-5064) 5.7.3 Assembly Dwg. (CPI i CA 038-5064) '

5.7.4 Engineering Specification (CP:t 6 AE 038-5064) 5 .7.5 Test Procedure. (CPI & AT.Q38-5064) 5.8 CPI Analog Input Signal Conditioning Module (9 038-5097) 5.8.1 Parts List (CPI & AP 038-5097) 5.8.2 Schematic (CPI i CS 038-5097) 5.8.3 Assembly Dwg. (CPI t CA 038-5097) 5.8.4 Engineering Specification (CPI t AE 038-5097) 5.8.5 Test Procedure (CPI 6 AT 038-50977 5.9 CPI Digital Input Signal Conditioning Module ($ 038-5098) 5.9.1 Parts List (CPL t AP 078-5098) 5.9.2 Schematic (CPI $ CS 038-5098) 5.9.3 Assembly Dwg. (CPI 9 CA 038-5098) 5.9.4 Engineering Specification (CPI i AE 038-5098) 5.9.5 Test Procedura (CPI & Ar Q38-5098) 5.10 CPI C.O.S. D.I. Signal Conditioning- Module (t 038-5099) 5.10.1 Parts tJ.st. (CPI & AP 038-5099)

5.10.2 SchematLc (CPI i CS 038-5099) 5.10.3 Assembly Dwg. (CPI 6 CA 038-5099) 5.10.4 Engineering Specification (CPI 6 Ar 038-5099) 5.10.5 Test Procedura (CPI 9 AT G38-5099) i FACE 15 of,116 PAGES l

4

l REMOTE I/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ l I

BALTIMORE GAS rnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, 'INC. (FT. LAUDE'ADALE) 2/2/84 I

=.

5.17 CPI U-16 Universal I/O Controller (S 040-5462) j 5.17 .L Parta List (CPI 4 AP 040-5462) .

5.17.2 Logic Dwg. (CPI 6 CL 070-5073)

. 5.17.3 Assembly Dwg. (CPI $ CA 040-5462) 5.17.4 Technical Manual (CPI 9 980-0070-004) 5.17.5 Engineering Specification (CPI i AE 040-5462) (

I 5.17.6 Test Procedure (CPI 8 AT 070-5073) .

5.17.7 Wiring Diagram (, CPI 6 CW 318.-5010 1 5.18 CPI Reversed. ETn Signal Conditioning Chassis _ (8 040-5467) l 5.18.1 Parts List (CPI 96 AP 040-5467) 5.18.2 Assembly Dwg. (CPI 6 CA 040-5467) !

5.18.3 Engineering Specification (CPI 9 AE 040-5467) 5r.18 .4 Test Procedure (CPI t AT 040-5467) '

5.18.5 Wiring Diagram (CPI $ CW 040-5467) 5.14.6 Technical Manual (CPI 9 980-0040-213) 5.19 CPI Redundant +/~15 Volt / 2.25 Amp Power Supply (0 040-5482)

, 5.19.1 Parts List (CPI 6 AP 040-5482) 5.19.2 Assembly Dwg. (CPI 6 CA 040-5482) 5.19 1 Engineering Specif,1 cation. (CPI 6 AE 040-5482) 5.19.4 Test Procedure (CPI # AT 040-5482) 5.19.5 Wiring Diagram (CPI 6 CW 040-5482) 5.20 CPI Redundant 5 volt / 30 Amp Power Supply (# 040-5483) 5.20.1 Parts List (CPI i AP 040-5483) i 5.20.2 Assembly Dwg. (CPI F CA 040-5483) ,

5.20.1 Engineering Specif.icatioit (CPI 6 AE 040-5483) l 5.20.4 Test Procedure (CPI I AT 040-5483)

.5.20.5 Wiring Diagram (CPI t CW 040-5483)

Sr.ll CPI Redundant +/-15 Volt / 4.5 Amp, Power Supply (6 040-5484) 5.21.1 Parts List (CPI.9 AP 040-5484) 5 .11.1 Assembly Dwg. (CPL 6 CA Q40-5484) 5.21.3 Engineering Specification (CPI $ AE 040-5484) 5.11.4 Test Procedure (CPL 6 AT 040-5484) 5.1L.5 Wiring Diagram- (CPI i CW 040-5484) 5.2Z CPT Redundar .: 5 volt / 60 Ampr Power supply' (f 040-5485) 5.22.1 Parts List (CPI f AP 040-5485) 5.22.2 Assembly Dwg. (CPI $ CA 040-5485) 5.22.3 Engineering Specification (CPI 9 AE 040-5485) 5.22.4 Test Procedure ( CPI t AT 040-5485) 5.22.5 Wiring Diagram (CPI 6 CW Q40-54&5)

PAGE L7 of Ll4 PAGES

.--..-----,n-- - - - - - - - , . - - - - . . . -

REMOTE I/O NARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

, BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTFJL at COMPUTE 3 PRODUCTS, INC. (PT. LAUDERDALE) 2/2/84-

- 5.23 CPI Redundant +/-15 Volt / 9.0 Amp Power Supply (t 040-5486) 5.23.L Parts List (CPI $ AP 040-5486) 5.23.2 Assembly Dwg. (CPI f C', 040-5486) 5.23.3 Engineering Specification (CPI 9'AE 040-5486) 5.23.4 Test. Procedure (CPI # AT 040-5486) 5.23.5 Wiring Diagram (CPI 6 CW 040-5486) l 1.28 Cyg n=Aindane i valt/ 120 Amp Power Supply (4 04Q-5487) l 5.24.1 Parts List (CPI 9 AP 040-54&7) 5.24.2 Assembly Dwg. (CPI $ CA 040-5487) 5.24.3 Engineering specification (CPI & AE 040-5437) ,

5.24 .4 Test Procedure (CPI & AT 040-5447) 5.24.5 Wiring Diagram (CPI t' CW 040-5487) 5.25 CPI A.I. Gate Card ta RID Sig. Cond. Mod. Cable (6- 040-5505) f 5.25.1 Parts List (CPI 9 AP 040-5505) l 5.25.2 Assembly Dwg. (CPI # CA 040-5505) !

, 5.25.3 Engineering Specification (CPI 6 AE 040-5505) !

5.25.4 Wire List.(CPI 6 AN 040-5505) 5.26 CPI ReenadN L25 volt / r.2 Amp Power Eupply (t 040-1509) 5.26.1 Parts List (CPI 0 AP 040-5509) '

1.26.1 Assembly Dwg. (CPI 6 CA Q44-5539) 5.26.3 Engineering Specification (CPI 9 AE 040-5509 ) l 5.26.4 Test Procedure (CPI $ AT 040-5509) i 5.26.5 Wiring Diagram (CPI 6 CW 040-5509) 5.27 CPL AC. Power Distribution / Indicatoc Panel (6 04Q-5511) 5.27.1 Parts List (CPI $ AP 040-5511) 5.27.2 Assembly Dwg. (CPI 6 CA 040-5511) i 5.27.3 Engineering specificatierr (CPI D AE 040-5511)

5.27.4 rest Procedure (CPr P Ar 040-5511) ;

5.27.5 Wiring Diagram (CPI 6 CW 040-5511) i r

l l

) t

! I i t j l i l i

PAGE 18 of 116 FACES

)

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMQRE GAS cnd ELECTRIC CALVERI CLIFFS DATA ACQUISITION SYSTE3 at COMPUTER. PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 5.28 CPI Pulse Counter Card to S.C.M.. Cable (9 040-5517) 5.28 .1 Varts List (CPI & AP. 040-5517) 5 .28 .2 Assembly Dwg. (CPI i CA 040-5517) f.71.3 Engineering Specification (CPI f AE" 040-5517) 5.28.4 Wire List (CPI $ AW 040-5517) 5.27 CPI Up/Down Pulse Counter Card to S.C.M. Cable (6 040-5518) 5.29.1 Parts List- (CPI f AP 040-5518)

5.29.2 Assembly Dwg. (CPI f CA 040-5518) 5 .29 .3 Engineering Specification (CPI $ AE 040-5518) 529.4 Wira List (CPI i AW G40-5518) 5.30 CPI Digital Barrier Terminal Strip Cable Assembly (t 040-5519) :

5.30.1 Parts List (CPL 6 AP 040-5519) 5.30.2 Asserubly Dwg. (CPI 6 CA 040-5519) 5.30.3 Engineering Specification (CPI & AE 040-5519) 5.30.4 Wire List (CPI # AW 040-5519-0) 5.30.5 Wire List (CPI 6 AW 040-5519-1) 5.31 CPI Analog Barrier Terminal Strip Cable Assembly (6 040-5520) t 5.31.1 Parts List (CPI 6 AP 040-5520) 5.31.2 Assembly Dwg. (CPI f CA 040-5520) 5 . 3 1 . 36 Engineering Specification (CPI 6 AE 040-5520) 5.31.4 Wire List (CPI i AW 040-5520) 5.32 CPI RTD S.C.M. Barrier Tortninal Strip Cable Ass'y ($ 040-5521) 5.32.1 Parts List (CPI 8' AP 040-5521) 5.32.2 Assembly Dwg. (CPI i CA 040-5521) 5.32.3 Engineering Specification (CPI i AE 040-5521) 5.32.4 Wira List (CPI i AW 040-5521) 5.37 CPI Uniforte Temperature Reference Plate (# 040-5522) 1 5.33.1 Parts List (CPI P AP- 040-5522) 5.33.2 Assembly Dwg. (CPI 6 CA 040-55271 5 33.3 Engineering Specification (CPI f AE 040-5522) 5.33.4 Wire List (CPI 6 AW 040-5522) 5 11.5. Technical Manual (CPI 6 980-0070-052) e I

PAGE LS of 116 PAGES

- _ . . _ _ . .,_,, ..____-.,y . , . _ _ . _ . ..,, _. __

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE far NUS CORP./

BALTIMORE GAS End ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84-

- = - - - - - - - - - - - _ _ - -

= - - ._-- -.

5.34 CPI Redundant Access Universal I/O. Controller (# 07G-5083) 5.34.1 Parta List (CPI i AP 070-5083) -

5.34.2 Parts List (CPI i AP 069-5083) 5.34.3 Logic Dwg. (CPI f CL 070-5076) 5.34.4 Assembly Dwg. (CPI I CA 070-5080) 5.34.5 Assembly Dwg. (CPI 6 CA 069-5083) 5.34.6 Technical Manual (CPI 6 980-0070-004) 1.14.7 Enginwartng SpeciELcation (CPL & AE MEQQ70-50&3) .

5.34.8 Engineering Specification (CPI $ Ar 070-5076) 5.34.9 Test Procedure (CPI i AT 070-5076) 5.35 CPI Analog Barrier Terssinal Strip Cable Assembly .(f 075-0053) 5.35.1 Parts List (CPI $ AP 075-0053) 5.35.2 Assembly Dwg. (CPI & CA 075-0053) 5.35.3 Engineering Specification (CPI 6 AE 075-0053) 5.35.4 Wire List (CPI $ AW 075-0053) 5.36 CPI Digital Barrier Terminal Strip Cablu Assembly (f 075-5227)

Parts List (CPI $ AP 075-5227) 5.36.1 5.36.2 Assembly Dwg. (CPI i CA 075-5227) 5.36.3 Engineering Specification (CPI & AE 075-5227) 5.36.4 Wire List (CPI i AW 075-5227) 5.36.5 Technical Manual (CPI $980-0075-227) 5.37 CPI DALCAL Card Barrier Terminal Strip Cable Ass'y (f 075-5271) 5.37.1 Parts List (CPI t AF 075-5271) 5.37.2 Assembly Dwg. (CPI 6 CA 075-5271) 5.37.3 Engineering Specification (CPI t AE 075-5271) ,

5.37.4 Wire List (CPI $ AW G75-5271) ,

I 5.;s 3 CPI I/O Bus Cable (t 314-5043) 5.38.1 Parts List (CPI i AP 314-5043) 5.38.2 Acsembly Dwg. (CPI i CA 314-5043) 5.38.3 Engineering specification (CPI & AE 314-5043) 5.39 CPI Current. Source Temperature Transducer (i 559-5002) 5.31.1 Pa rta LLat (CPI & AP 539-5002) i 5.39.2 Assemb'.y Dwg. (CPI 6 AA 559-5002) ;

l l

PAGE 2tL c1 lli PAGER l I

ew _ * -r*

y- -

---y- -

m. - _ - -

y y--. ,- ,

--g - -- - - - - ~

l l

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

SALT 3MORE GAS and ELECTRIC CALVERT CLIFES DATA ACQUISITION SYSTER at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 5.40 CPI Universal r/O Controller ($ 070-0004) l 5.40.1 Parts List (CPI $ AP 070-0004) 5.40.2 Parts List (CPL F AP 069-0004) 5.40.3 Logic Dag. (CPI # CL 070-0004) 5.40.4 Assembly Dwg. (CPI f CA 070-0004) 5.40.5 Assembly Dwg. (CPI i CA 069-0004) 5.40.6 Technical Manual (CPI 9 980-0070-004) 5.40.7 Engineering Specification (CPI 4 AF. 070-0004) 5.40.8 Test Procedure (CPI D AT 070-0004) 5.41 CPI RTP Control Panel (6 070-0044) 5.41.1 Parts List (CPr t AP G70-0044) 5.41.2 Logic Dwg. (CPI # CL 070-0044) 5.41.3 Assembly Dwg. (CPr & CA 070-0044) 5.41.4 Technical Manual (CPI & 980-0070-044) 5.41.5 Engineering Specification (CPI $ AE 070-0044) 5.41.6 Test Procedure (CPI 9 AT 070-0044) 5.42 CPI 12 V Power Supply, panel mounted (# 070-0008) 5.42.1 Parts IJ.at (CPI i AP 070-0008) 5.42.2 Assembly Dwg. (CPI $ CA 070*O)DIF) 5.42.3 Technical Manual (CPI 6 980-0070-008) 5.42.4 Engineering Specification (CPI t AE 070-0008) -

5.42.5 Test Procedure (CPI 6 AT 070-0008) 5.43 CPI SpeciEl Relay Out. Card w/ Contact Prot. (6 000-7066) 5.4J.1 Phr:ts list (CPI i AP 000-7066/7067) 5.43.2 Schematic (CPI 6 CS 000-7066/7067) 5.43.3 Assembly Dwg. (CPI i CA 000-7066/7067) 5.43.4 Technical Manual (CPI i 980-0021-232) 5.43.5 Engineering Specification (CPI t AE 021-5232) 5.41.6 Test Procedure (CPE 9 AT 021-5232) 5.44 CPI Spec. Pulsing Relay Out. Card w/ Contact Prot. (t 000-7067) 5.44.1 Parts List (CFT P AP 000-7066/7067) 5.44.1 Schematic (CPI t CS' 000-7066/7067) 5.44.3 Assembly Dwg. (CPI f CA 000-7066/7067) 5.44.4 Technical Manual (CPI t 980-0021-232) 5.44.5 Engineering Specification (CPI 6 AE 021-5232) gi 5.44.6 Test Procedura (CPI i AT 021-5232)

W PAGE 11 of,116 PAGES

REMOTC r/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ ,

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM ct. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 5.43 CPI BTSCA (25 inch, 48 pin) to Test Cable / Connector Adapter (CPI 9 000-7077)

F.45.1 Assembly Dwg. (CPI t- AA 000-7E77) 5.45.2 Wire List (CPI i AN 000-7077) 5.46 CPI Digital Input Surge Protection Test Connector '

(CPI i 000-7078) .

5.45.I. Scherratic (CFT f AS 00G-7078) 5.47 CPI Pulse Counter Surge Protection Test Connector (CPI t 000-7097) l 5.47.1 Schematic- (CPI t A5 000-7097) n 5.48 CPI Analog Input Unbalanced (1 Kohn) Test Termination / Connector (CPT I 000-7079 )

5.48.1 Schematic (CPI i AS 000-7079) 5.49 CPI. Digital Test Cable (CPI 4 000-7080) 5.45.1 Schessatic (CPI i AS 000-7080) 5.@0 CPI Analog Input Test Divider / Connector for BTSCAs (CPI i 000-7081) 5450.1 Schematic (CPI i AS 000-7081) 5.51 CPI Analog Input. Parallel Input Test Connector (CPI & 000-7082) 5.51.1 Schematie (CPr i AS 000-7082) 5 .5 Z CPI Analog Input Test Olvider/ Connector for UTRPs (CPI i 000-7085) 5.52.1 Schematie (CPr P AS 000 '085)

~

PAGE 22. of llE PAGES

l REMOTE I/O fiARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

l BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATI. ACQUISITION tiYSTEM i at COMPUTER PRODUCTS,'INC. (FT. LAUDERDALE) 2/2/84 1 --- -

5.53 CPI RTD Resistor Tertcinations 5.53.1 Platinum 200 ohm, 32 t 350- F (CPI i 000-7086) .

. 5.53.1.1 Information Dwg. (CPI f AH 000-7086) 5.53.1 Platinum 200 ohm, 31 s 850 F (CPI i 000-7087) 1.51.1I Information Dwg (CPI 6 AH 000-7087) 5.53.3 Platinum 200 ohm, 32 s.110 F (CPI i 000-7088) 5.53.3.1 Informat;ior. Dwg. (CPI 6 AR 000-7088) 1.51.4 Copper LQ che, -10. t 209 C (CPI i 000-7089) 1.51.4 A Informat. ion Dg. (CPI 4 AH 000-7089)

PAGE 23 of Lli. PAGES.

REMOTC I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS Ond ELECIRIC CALVERI CLIFFS DATA ACQUISITIOB3 SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 5.54 CPI Quality Assurance Procedure (CPI t- AQ 8.02) -

' Calibration Control. System' 5.55 CPI Quality Assurance Procedure (CPI $ A0 S.01) -

'Non-Conforming Material Control System' 5.56 CPr ' Description and. Operating Instructions for the CPI Analog Input Test Computer and Analog Input Test Programs' 5.57 IEEE Standard t 472-1974 ' Guide for Surge Withstand Capability (SWC) Testing' 5.58 Hewlett Packard Co

Operator's Manual for 3468A/R Multimeter*

1 1.59 Velones ' Instruction Manual for Model 510 Surge Transient Generator

5.60 Electronic Development Corp. ' Operator's Manual for Model 501 Programmable DC Voltage Standard'

(

5.6L Omega Engineering, Inc. ' Instruction Manual for Model 2166A Multipoint Digital Thermometer' 5.67 RFL Industries, Inc. ' Instruction Manual for Model 628 AC/DC' V-A Source' l

l PAGE lt of. 114 PAGES.

l

g REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

$ BALTIMORE GAS and ELECTRIC at COMPUTER CALVERT PRODUCTS, INC. CLIFFS DATA ACQUISITION SYSTEM (FT. LAUDERDALE) 2/2/84 1

3 6. CONFIGURATION OF EQUIPMENT FOR TESTING Specific or special configurations of the test squipment shall be as

, follows:

' 6.1 One RTP Control Panel (070-0044-001), with Device Address Select

, switches set for '111111', shall be labelled 'll'.

)

6.2 The test Universal I/O Controller (070-0004-003), with First Device Code set for '111111', shall contain 6.2.1 a I/O Bus Termination module (021-0004) in slot 2;

)

6.2.2 a Special Relay Output Module (000-7066) with contact protection in slot 6; and 6.2.3 a Special Pulsing Relay Output Module (000-7067) with contact protection in slot 7.

6.3 One RTP I/O Bus Cable (314-0001-020) shall connect the control

' Panel 1).

il (slot 5) to the test Universal I/O Controller (slot 6.4 The output of the panel mounted 12 volt power supply shall be wired terminal block TB 1 of the test universal I/O controller to supply the 12 volts necessary to drive the relay output modules.

6.5 The other RTP Control Panel (070-0044-001) shall be labelled r '92';

l 6.?

l ar.u RTP I/O Bus Cable (314-0001-001) shall be connected to Control Panel 42 (slot 5) with the other end to be connected to the equipment in the cabinet under test.

6.7 The AC/DC V-A Source shall be configured to output 600 Volts AC

RMS, 60 Hertz.

6.8 The Surge Transient Generator shall be configured as described r in Appendix D.

l l

PAGE 25 of 116 PAGES g,-e, ,. -- .m = =mm. --

L REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

r BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM

? ct COMPUTER PRODUCTS, INC. (PT , LAUDERDALE) 2/2/84 r

h 6.9 Connect the I/O Bus Cable (314-0001-010) from C: crol Panel t2 to the ' first' I/O controller (slot 1 of. stancard Universal I/O Controllers (040-5462) or slot 4 of Redundant Access .

( Universal I/O Controllers (070-5083)) in I/O daisy-chain of

[ . the cabinet set under test.

6.10 Set the first device code of the ' first' I/O controller in the cabinet set daisy-chairr to 'I10000*- (binary) ('48 (decimal))

f and the second device code of the first, controller to 'L10001' (binary) (49 (decimall) . Set the devices codes of the.

successive controllers in the daisy-chain as follows:

DSVICE CODE FIRST SECOND (binary) (decimal) (binary) (decimal) second controller '110010' 50 '110011' 51 third controller '110100' 52 '110101' 53

(, fourth controller '110110' 54 '11011L' il fifth ecatroller *111000' Sfr ' L1100L' 17

( sixth controller '111010' 58 '111011' 59 seventh controller '111100' 60 '111101' 61 4 eighth controller '111110' 61 'lL111L' 63 6.11 Set the 'One Device Code /Two Device Code

switch on all I/O controllers to 'Two Device Codes' .

6 .12 Install the Up/Down Pulse Counters Test Headers (000-7098) ort any Up/Down Pulse Counters (038-5115) in the cabinet under test (-000 for counter 40 (DS2), --001 for counter il (DS1),

-401 for countec 62. (DS3),, arut -Cal for counter 63 (Da4)) .

i

(

{

PAGE 24 of 116 PAGES

REMOTE 8/O HARDWARE ACCEPTANCE TEST PROCEDURE foc NUS CORPo/

BALTIMORE' GAS and ELECTRIC CALVERT CI.IFPS DATA ACQUISITION SYSTEM

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

) . _ _ _ -

i 7. EQUIPMENT UNDER TEST CONFIGURATION VERIFICATION Verify that the ccafiguration of the equipment in the cabinet corresponds to the equipment cabinet configurat-lon drawings of Attachment 2.

l If a non-conformance is noted during the configuration verification, the

'. non-conformance will be dispositioned pec Section 3., the non-conformance will be corrected, and the verification oE the L

configuration will continue with the item found to ba non-conforming.

EQUIPMENT PERFORMED BYr 1 d 'h h_ _

C.P.I.

C PG TION APPROVED BY T #9 N .U .S .

APPROVED BY: , It B.G.E.

/7M, ,4,/2 /

L 1

PAcx 27 oe tra excEs g l _ _ _ . _ _ _ . . _ _ _ _ . . _ _ - - - - - - - - - - -

^

REMOTE I/O NARDWARE ACCEPTANCE TEST PRCCEDURE"for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM ct COMPUTER PRODUCTS, INC (FT LAUDERDALE) 2/2/84

8. AC POWER DISTRIBUTION / INDICATOR PANEL AND POWER SUPPLY VALIDATION .

The purpose of this tant is to validate the operation of the the power supplies (040-5482, 040-5483, 040-5485, 040-5486, 040-5487, 040-5509)r to validate the accuracy-of the power supp1.y to chassis cabling to validate the functionality of the AC Power Distribution /

Indicator Panel (040-5511).

The validation of the AC Distribution / Indicator Panel is accomplished by validating the T, resence of contact closures at. the circuit breaker indictaor points with a multimeter, then applying AC power and "alidating the presence of AC voltage at the AC power (listribution receptacles with e AC power receptacle tester and the closure of the-relay contacts indicatlng the presence of the AC power with a multimeter. Then one of the circuit breakers is turned of f and the presence or absence of Ac voltage at the appropriata distribution receptacles will be validated This. is then repeated for the other circuit.

) The validation of the power supplies is accomplished by measuring the l voltages at the voltage inputs to the I/O controllers in tha caoinet subsystem under test with a digital multimeter and validating that the measured voltage is within the specifications of the power supply .-

l plus a tolerance for voltage loss in the length of the power supply w to chassis cabling.

1

! (Note that in this section and other sections of the procedure, the individual power supplies of the redundant power supoly assemblies are dif ferentiated with the designations ' A' and 'B' which are not to

be confused with unit subdivisions ' Channel A' and ' Channel B'.)

AC PWER DISTRIBUTION / INDICATOR PANEL VALIDATION l

8.1 Remove all AC power plugs from the distribution receptacles of the AC Power Distribution / Indicator Panel S2 Turn both circuit breakers (S1 and S2) ON.

8 .3 tTsing the digital multimeter,, validate the presence of contact closures (less than one obst resistance) between the following pointss TBI-I tc"TE3-4 (Circuit Breaker A) k TB3-8 to TB3 (Circuit Breaker B)

J o 8.4 Using the digital c:ultimeter, validate the absence of contact closures (more than one megacha resistance) between the following pointsr TE3-L to TBI-2 ( AC Monitor Relay Al TB3-6 to TB3-7 (AC Monitor Relay B) f .

l - _. _ - . -

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMQRE OAS and. ELECTRIC CALVERI CLIFFS DATA ACQUISITION SYSTEM at COMPUTE 3 PRODUCTD, INC.

(FT , LAUDERDALE) 2/2/84 3.1 Flug power cord ' A' (connected to the AC Distribution / Indicator Panel) into a source of AC power .

E .& Using the digital multimeter, validate the presence of contact closures (less than one ohm resistance) between the following -

points:

TB3-1 to TB3-2 (AC Monitor Relay A)

T&l-3 to TRI-4 (circuit areaker A) ,

Tm3-8 to Tm3-9 (circuit Breaker 3) ,

87 Using the digital multimeter, validate the absence of contact closures (more than one negaohar resistance) between the following points:

TB3-4 to T33-7 (AC Monitor Relay 3) 8.E Flug power cord 'B' (connected to the AC Distribution / Indicator !'

Panel) into a source of AC power 8 .9 Using the digital multimeter, validate the presence of contact closures (less than one ohn resistance) betceen the following !

pointa r.

8 TB3-1 to TB3-2 ( AC Mo'titor Relay A)

TB3-3 to TB3-4 (circuit Breaker A)

Tal-6 to TR2-7 (AC Monitor Relay B) 4 TB3-8 to T83-9 (Circuit Breaker E) 8.10 Plug power cord 'C' (connected to the AC Distribution /

Indicator Panel) 1.nto a source of AC power.

3.11 Using the AC power receptacle tester, validate that the AC power, at all receptacles (J1, J2, J3, J4, J5, J6, J7, J8, J9, J10, J11, and Jll) is ON (indicates ' CORRECT WIRING') . l 8.11 Turn the 'A' circuit breaker (SI) Orr. Validate that the AC' power is ON or OFF (no lamps lighted on tester) at the recept- 1r per the following tables l JL OFF J 2. OFF J3 OFF" J4 OFF i J5 ON JE ON J7 ON J8 ON JS- GI J10- Q18 JLL ON J12. ON 8.13 Turn tne 'A' circuit breaker (51) ON and the 'B' circuit breaker

(- (52) 0FF. Validate that the AC power is ON or OFF at the receptacles pse the following table:

j JL ON J2. ON II On J4 ON #

J5 ON J6 ON J7 ON JS ON 3

J9 OFr J10 Orr J11 OFF J12 OFF PAGE.19 of 116 EAGES.

I wwww-ew9-~wwwp--m-- ----

-.m*p-w-9me--w w w w 9---

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REMOTE I/O HARDWARE. ACCEPTANCE TEST PROCEDURE for NUS CORP./ )

SALTIMDRE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

P at COMPUTER PRODUCTS, INC. (FT LAUDERDALE) 2/2/8.4

" 8.14 Turn both circuit breakara OFF. Validate that the AC powar is i ON or OFF at. the receptacles per the following. tables J1 OFF J2. OFF J3 OFF J4 OFF J5 ON J6 OFF' J7 OFF J8 OFF J9 OFF J10 OFF Jll OFF' J12 OFF

~

4.L5' Install the AC power plugs inta the AC Distribut.Lon/ Indicator Panel per Attachment 2. l

l 5.16 validate that the cabinet blower La operational.

9.17 Turn both circuit breakers OR.,

AC DISTRIBUTION / PERFORMED REs %M. C.P .I . l INDICATOR PANEL VALIDATION WITNESSED BYE -

p N.U.S.

/ ;

i If a non-conformance is noted during the validation of the AC' 1

~

Distribution / Indicator Panel, the non-conformance will be dispositioned per section 3., the non-conformance will be ecerected, and the validat. ion of the AC Distribution / Indicator Panel will be t

.. repeated (steps 8.2 to 8.17).

i 2

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REMOTE I/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

SALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM ct COMPUTER PRODUCTS *INC (FT. LAUDERDALE) 2/2/84

+15 VOLT POWER SUPPLY VALIDATION 8.19 Using the digital multimeter, validate that the +15VDC at each .

of the I/O controllers (terminal block points 6 (grouai) and 7

. (+15 volts)) wired for +15 volts per Attachment 2 measures

+(14.7 r 15.3) volts. Record the chassis ID number and voltage belows l.

CHASSIS ID 50. JE-I#l VULTAGEt IS.0of v IIITTALKs 4 L. /

CHASSIS ID NO.: VOLTAGE: INITTALSt /

CHASSIS ID NO.3- VOLTAGE t INITIALSt /

CHASSIS ID NO. VOLTAGE: INITIALS: /

CHASSIS ID NO.r ._

VOLTAGEr INITIALS: /

CHASSIS ID NO.t VOLTAGE: INITIALS: / _

CHASSIS ID NO.t VOLTAGE INITIALSt / __

CHASSIS ID NO.t VOLTAGE INITIALS: /

+15 VOLT PERFORMED BY W3 e - C.P.I.

POWER SUPPLY /D_ -j VALIDATION WITNESSED BY f/ ? - N.U.S.

/

If. a non-conformanca La noted. during. the val uation of. tha +11. Volt Power Supply, the non-conformance will be dispositioned pec Section' 3., the non-conformance will be corrected, and the validation of the

+15 Volt Power Supply will be repeated (step S.19) .

I l

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PAGE 32. of 116 PAGES

o REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

EALTIMORE GAS and ELECTRIC CALVERT CLIFF 3 DATA ACQUISITION SYCTEM at COMPUTER PRODUCTS, INC. ( FT. IJ.'JDERDALE) 2/2/84_

i

-15 VOLT POWER SUPPLY VALIDATION ,

i a 8.20 Using the digital multimeter, validate that the -1SVDC at each of the I/O controllers (terminal block points 8 (ground) and 9

(-15 volts)) wired for -15 volts per Attachment 2 measures 3

i

-(14.7 a 15.3) volts. Record chassis ID number and voltage i below CRASSIS ID NO. TI- 1 F l ver/IAaE -l5at I.NIrIALs: A t, /

, CHNSSIS ID NO.s VOLTAGEr INITIALS: / ,

CHASSIS ID NO.s VUI.TAGE: INITIALS: /

CHASSIS ID NO.r- VOLTAGE: INITIALS: /

CHASSIS ID NO.- VOLTAGES INITIALSt /

CHASSIS ID NO. VOLTAGE: INITIALS: /

CHASSIS ID NO.s VOLTAGE: INITIALS: / ;

CNASSIS IU NO. VUCTAGE: INITIALS: / _

-15 VOLT PERFORMED BYr %Ax7 h C.P.I.

POWER SUPPLY /.

/ VALIDATION WITNESSED EYt [ ? M .U .S .

If a non-conformance is noted during the validatiort of the -15 Volt !

Power Supply, the non-conformance will be dispositioned per Section 3., the non-conformance will be corrected, and the validation of- the

-15 Volt Power Supply will be repeated (step E.20)

(

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMO2E GAS and ELECTOIC CALVERT CLIFra DATA ACQUIELTION SYSTEM at COMPUTED PRODUCTS, INC. (Fr LAUDERDALE) 2/2/84

! 125 VOLT POWER SUPPLY VALIDATION

( 8.21 using the digital multimeter,. val.idate that the 125VDC at the power supply assembly (040-5509) Iterminal blocks TB 4 (+125 i volts) points 1-8 and TB 5 (ground) points 1-8) measure

+(112.5 : 137.5) volts. Record the voltage belows f

TB4-1/TES-la ynr.vanN a INT.TIAtat _ V/A /__

TB4-2/ TBS-2: VOLTAGE: INITIALS: /

l TB4-3/TB5-3s VOLIAGEs. INITIALS /

TB4-4/TB5-4: VOLTAGE: INITIALS: /

TB4-5/TR5-53, VOLTAGEt INITIALSs. /

l TB4-6/TB5-6: VOLTAGE: INITIALS: /

TB4-7/TB5-7: VO'. TAG E : INITIALS: /

TS4-8/TE5-4: Vnr.vacr e. INITIALSt. _ /

125 VOLT PERFORMED BY: H/A W LL C.P.I.

I POWER SUPPLY '

/ y j_

)

VALIDATION WITNESSED BY: -

8/^ Y-T N .U .S .

/

If a non-conformance is noted during the validation of the 125 volt Power Supply, the non-conformance will be dispositioned per Section ;

3., the non-conformance will be corrected, and the validation of the '

l 125 Volt Power Supply will be repeated. (step S.21) . -

i 1

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PAGE. 34 of 11E PAGES )

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

p RALTIMORE CAS cnd ELECTRIC CALVERT CLIEFS DATA ACQUISITION SYSTER.

at COMPUTER PRODUCTS,. INC. (FT. LAUDERDALE) 2/2/84 t

h .

4 9. OPTICALLY ISOLATED DIGITAL INPUT MODULE VALIDATION The purpose of this test is to validate the operation of the Optically 3 Isolated Digital Input modules (021-5230) and their associated signal conditioning circuits (038-5098) and to validate the accuracy of the input module to signal conditioning module cabling (040-5456) and the signal conditioning module to terminal strip cabling (040-5519) .

This valldation is accomplished by using a. control panel to control a relay output module in a test I/O controller to simulate ' contacts

l 1 on the terminal strip which sources the input module. The simulated I

data is monitored by a second control panel connected to the I/O l controllers in the cabinet under test. (Reference Figure I of Attachment 1) 9.1 Install the 'BTSCA to Test cable / Connector Adapter' (000-7077)

[

on the selected BTSCA. in the cabinet under test per Attachment 2.

) 9.1 Connect the ' Digital Test Cable' (000-7080) between the 'Special l Relay Output Module' (000-7066) in the test I/O controller

( (slot 6) and, the 'BTSCA to Test Cable / Connector Adapter' .

i 9.3 Configure Control Panel $1 as follows:

INSTRUCTION SELECT t COM, OUT, and WAIT TEST UP COMMAND WORD : to select random mode, disable interrupts, and to address the

'Special. Relay Output Module' (address 'O')

INSTRUCTION RATE a 50K range - vernier midrange 9 .4 Configure Control Panel $Z as fntt =ss.

I i DEVICE ADDRESS SELECT to address the first device code of the !

I/O Carreroller containing the I f Optically Isolated Digital Input i Rodule_ under test per Attachment 2,. l l Section 6, and Appendix R. '

l INSTRUCTION SELECT t COM, WAIT TEST and IN UP

)

COMMAND WORD : to select. random mode, disable

. interrupts, and to address the module under test using Attachment 1, j Appendix B, and Appendit C.

I 13STRUCITON RATE r, 500 range - vernier midrange l l

l FME 15 of 11E FMES i

i REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

SALTIW1RE CAS rnd ELECTRIC CALVERT CLIFFS DATK ACQUISITION SCTEM-at COMPUTER PRODUCTS, *INC., (FT. LAUDERDALE) 2/2/84 I

l 9.5 RESET both control panels.

! 9.6 Starting with an Output Word at '0000 0000 0000 0000* from l

Control Panel ll, validate that the Data Word Display of l

Control Panel 92 matches the Output Word Select switches of i l Control Panel ll. Validate the operation of each bit. l l

BODULES TESTEDs l

CHASSIS 9 SLOT f INITIALS CHA&3IS 9 SLOT'S INITIAIK yA/ /--

/ /

/* __ _/

9.7 Repeat steps 9.1 to 9.6 for all Optically Isolated Digital Inpu Modules in the cabinet. under tas t,.

OPTICALLY ISOLATED PERFORMED BY W8r- M/A C.P.I i

DIGITAL INPUT Te -

VALIDATION WITNESSED BYt / N.U.S ,

}'

If a non-conformance is noted during the Optically Isolated Digital Input validation, the non-conformance will be dispositioned per Section 3., the non-conformance will be corrected, and the validatio of the O.I.D.L. will be repeated on the modula / cable rset where the l man-coninemanem was noted. .

l l

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4 PAGE 36 ni 116 PAGE

REMO'TE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

l BALTIMORE GAS cnd ELECTRIC CAL, VERT CLIFFS DATA ACQUISITION SYSTEM l Gt COMPUTER PRODUCTS, INC. (FT. LAUDERDALR) 2/2/84

, 10. OPTICALLY ISOLATED DIGITAL INPUT MODULE SURGE WITHSTAND CAPABILITY l VALIDATION I The purpose of this test is to validate a sample of the surge withstand i

capability provided by the signal conditioning modules (038-5098) by simulating contacts on the input terminal.3 to the digital input module under test, then applying a surge to the inputs while i j monitoring the data input from the module under test with a control i panel to validate that no data changes during the application of the <

surge. Each bit of the module tested will then be revalidated for j functionality as per Section 9. (Reference 71gure 2 of Attachment 1) ;

10.1 Select a sample of up to five percent or at least one of the !

surge protected Optically Isolated Digital Input Modules ;

(021-5230 / 038-5098) in the cabinet under test to have the !

surge withstand capability tested.

{

f 10.2 Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077) 4 on the selected BTSCA in the cabinet under test per {

i

Attachment 2. +

10.3 connect the ' Digital Input Surge Test connector' (000-7078) to !

i the 'BTSCA to Test Cable / Connector Adapter'. Connect the red l 1 lead of the surge transient generatnr cable to the test t l connector. Connect the black lead of the surge transient j

j generator cable to the surge ground bus bar in the cabinet 1 i under test, t 10.4 Cor.2igure Control Panel 42 as follows:

i

' DEVICE ADDRESS SEidCT : to address the first device code of the I/O Controller containing the Optically Isolated Digital Input j Module under test per Attachment 2, 7 Section 6, and Appendix B. l

(

INSTRUCTION SELECT : COM, WAIT TEST and IN UP 1

i r COMMAND WORD : to select random mode, disable l" interrupts, and to address the module f i

under test using Attachment 2, j Appendix B, and Appendix C.

INSTRUCTION RATE : 50K range - vernier midrange

{

! 10.5 RESET Control Panel 42.

1 I

! 10.6 Ready the surge transient generator to output a surge per .

j Appendix D. -

I l t

PAGE 37 of 116 PAGES 1

l i i f _. _ _ , . . , . . . . . _

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[

t REMOTE I/O HARDWARE ACCEPTANCE TEST PROCE RE fcr NUS CORP./

f .W.T IMORE GAS and ELECTAIC CALVERT CLIFES DATA ACQUICITION SYSTElk at COMPUTER PRODUCTS,*INC. (PT. LAUDERDALE) 2/2/94

> 10 .7 Depress the surge transient generator Start pushbutton to apply the surge voltage for two seconds and validate that. no bit in

the Data Word Display of Control Panel $2 changes state .

g during oc atter the application of the surge voltage.

( looDULE(S) SELECTED and TESTED: -

CEAssIS 6 'ftIar i IEIILu.E . CuAssIs. t ' stat 6 InLITIALs j .2/21 /

1 l / /

/ /

t l

10.8 Repeat steps 10.2 to 10.7 on all of the Optically Isolated Digital Input modules in the selected sample, 10.9 Install the "BTSCA to Test cable /ccmnoctor Adapter * (000-7077) on the selected BTSCA in the cabinet inrf.or test per

Attachment:

2 ,

10.10 Connect the ' Digital Test Cable' (000-7080) between the .

'Special Relay Output Module' (000-7066) in the test I/O controller (slot. 6) and the 'RTSCA to Test Cable / Connector Adapter *. l 1 1 f 14.11 Configure Control Panel $2. as follows: I

} -

DEVICE ADDRESS SELECT s ta address the first. device code of j the I/O controller containing the-l Optically Isolated Digital Input I Module under test per Attachment.2 ,

secticer b and Appendia B.

IRSTRUCTION GELECT

CIDt, MAIT TEET'and IE UP CDetMAKIL WQED s. to select random mode, disable interrupta, and to addre9s the module under test using Attachment 2, Appendix R, and Appendix C.

I l

I IMSTRUCTIO.! RATK s 50K range - vernier midrange 10.12 RESET both control panels.

PAGE 38 of. lli FAGEE e

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURF for NUS CORP./

RALTIMORE GAS cnd ELECTR!f: CALVERT CLIFFS DATA ACQUISITION MYSTER-at CDMPUTER PRODUCTS, INC., (FT. LAUDEADALE) 2/2/84 10.13 starting with an output word of '0000 0000 0000 0000' fra l Control Panel 41, validate that the Data Word Display of l l Control Panel $1 matches the output. Word Select switches of

! Control Panel 41. Valldate the operation of each bit. l I

i MODULE (S ) SELECTED and TESTED: !

l raassIs $ ELOT $ EBLTIALE CEASSES 6 SIDE 6 IRLIIALE dlpr/ __, ./

/ / '

/ .

/

} __/_ ,__ - / r i

10.14 Repwat steps 10.9 to 10.13 for each of the Optically Isolated ,

, Digital Input Modules selected for surge withstand l

,, capability testing.

i ,

1 OPTICALLY ISOLATED PERFORMED BY: N/A C.P.I.

R I D J.PPROVED BY N .U .S . !

CAPABILITY /

VALIDATION APPROVED bfa j //0 7' A W N 4 A d d 8.G.E.

t

) {

11 a non-conformance is noted during the optically Isolated Digital

Input Surge Withstand Capability validation, the non-conformance will. t i bu dispositioned per section 3., the non-conformance will be

' corrected, and the validation of the Optically Isolated Digital Input surge Withstand CapaL'ility will be repeated on the module / cabling set where the non-conformance was noted. Af ter the test is complete, 4

an additional sample of five percent, or at least one, of the '

Optically Isolated Eigital Inputs with eurge protection will be selected and tested. This will be repeated it another j non-confar=ancy is identified in the second sample. I i

I ;

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! l l

l Pans.se of. Ils PAcza. i

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,, ,- - - - - , . - - , , - - - , . . - - - . , . . , ,,.---.,---,-,-..-,,.,,-,,..r--.-

--n,. , . . - . . . . - - - -

REMOTE I/O RARDWARE ACCEPTANCE" TEST PROCEDURE fCr NUS CORP./

i RALTIMORE GAS cnd ELECTRIC CALVERT CLIFF 3 DATA ACQUISITION SYSTEM at COMPUTER PROOUCTS, INC. (PT. LAUDERDALE) 2/2/84 II. CRANGE OF STATE DIGITAL INPUT VALIDATION The purpose of this test is to validate the operation of the Change of state Digital Input modules (038-5064) and their associated signal conditioning circuits (038-5099) and to validate the accuracy of the

)

input module to signal conditioning module cabling (040-5456) and the signal conditioning module to terminal strip cabling (040-5519).

B This validation is accomplished by using a control panel to control a relay output module in a test I/O controller to simulate ' contacts *

, on the terminal strip which sources the input module. The simulated data is monitored by a second control panel connected to the I/O controllers in the cabinet under test. (Reference Figure 3 of Attachment 1) 11.,1 Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077) ,

' on the selected BTSCA in the cabinet under test per Attachment 2..

11.2 cont.ect the ' Digital Test Cable' (000 '7080) between the j 'Special Relay Output Module' (000-7066) in the test I/O controller (slot 6) and, the 'RTSCA to Test Cable / Connector Adapter *.

i i 11.3 Configure Control Panel 61 as follows:

C INSTRUCTION SELECT : COM, OUT, and WAIT' TEST UP COMMAND WORD to select random mode, disable interrupts, and to address the a 'Special Relay Output Module'

! (address 'O')

INSTRUCTION RATE r 50K range - vernier midrange LI.4 Configure Control Panel 92 as follows:

DETICZ num SELECT a to address- the first, device code of the I/O Controller containing the Change of State Digital Input Module under test per Attachment 2, Section E, and Appendix R.

INSTRUCTION SELECT

COM, INT QRY, and IN UP, WAIT INT DOWN j

COMMAND WORD t ts select random mode, enable ,

interrupts, and to address the module under test using Attachment 2,, 1 Appendix B, and. Appendix c.

INSTRUCTION RATE : 50 range - vernier midrange PAGE,40 of 116 PAGES i

i

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS rnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at ConPuTER PRooucIs, INC. (FT. LAUDERDALF.) 2/2/44

\

11.5 RESET both control panels.

11.6 Starting with an Output. Word of. '0000 0000 0000 0000' from control Panel 61, validate that the Data Word Display of l Control Panel #2 m.stches the Output Word Select switches of control Panel fl. Validate that the interrupt request display of Control Panel 92 flashes ON then OFF when a bit is toggled. Validate that the interrupt vector displayed corresponda ta the controller first device address and the 1 modula slot address. Validate the operatton of each bit.

MODQtES TESTED:

CNASSIS 9 SLOT 9 INITIALS CNASSIS & SI,OT F INITIAIX

, M/A/ _ /

i

/ /

/ _ /

/ /

I

! 11.7 Repeat steps 11.1 to 11.6 for all Change of State Digital Input i modules in the cabinet under test.

CHANGE OF STATE PERFORMED BYs M / .'. M# C.P.I.

DIGITAL INPUT

! VALIDATION WITNESSED BYr

~'

b '

N .U .S .

l . /

If a non-conformanes is noted during the Change of State Digital Input

( Validation, the non-conformance will be dispositioned per Section 3.,

the non-conformance will be corrected, and the validation of the i C.O.S.D.I. will be er.psstod. on the module / cabling set where the non-conformance was noted I

i

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l PAGE 41 of 114 PAGE5 l

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> REMOTE I/O HARDWARE ACCEPTANCE T8ST PROCEDURE for NUS CORP./

RALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM I

at COM"UTER PRODUCTS,INC. (FT. LAUDERDALE) 2/2/84

> 12 CHANGE OF STATE DIGITAL INPUT MODULE SURGE WITHSTAND CAPABILITY VALIDATION The purpose of this test is to validate a sample of the surge withstand capability provided by the signal conditioning modules (030-5099) by simulating contacts on input terminals to the digital input module un.ier test, then applying a surge to the inputs while monitoring the data input from the module under test with a control panel to saltdate that, no data shall change during the application of that surge. Eacte bit of the module tested will then be revalidated for functionality as per Section 11. (Reference Figure 4 of l Attachment 1) i l

l 12.I select a sample of up to five percent or at least one of the surge protected Change of State Digital Input modules (038-5064 / 038-5099) in the cabinet,under test to have the i surge withstand capability tested.

12.2 Install the 'BTSCA to Test cable / Connector Adapter' (000-7077) on the selected BTSCA in the cabinet under test per l

Attachment 2.

12 T Connect the ' Digital Input Surge Test Connector * (000-7078) ta the 'BTSCA to Test Cable / Connector Adapter'. Connect the red j lead of the surge transient generator cable to the test I connector. Connect the black lead of the surge transient f generator cable to the surge ground bus bar in the cabinet l under test.

f 12.4 Configure Control Panel 62 as follows:

DEVICE ADDRESS SELECT & to address the first device code of the I/O controller containing the Change of State Digital Input Module under tsat per Attachment 2, Sect.lon 6, and Appendix 5.

INSTRUCTION SELECT g CDit, INT' QRT, and IE UP, WAIT INT DOWN CDMMAND WORD t to select random mode, disable interrupts, and to address the module under test using Attachment 2, Appendix 5, and Appendix C.

INSTRUCTION RATE : 50E range - vernier midrange 12'.5 RESET Control Panel 91. ,

12.6 Resdy the surge transient generator to output a surge per Appendix D.

l PAGE 41 of 116 PAGES 1

REMOTE I/O MARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMQRE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT., LAUDERDALE) 2/2/84 t

12.7 Depress the surge transient generator Start pushbutton to apply

' the surge voltage for two seconds and validate that no hit in the Data Word Display of Control Panel $2 changes state.

during or af ter the application of the surge voltage.

MODULE (S) SELECTED and TESTED:

CMASSIS 6 SLOT 4 IMITIALS CHASSIS & SLOT $ INITIALS ,

1

//A / . /

I

/ '/

i / /__

/ /

12.5 Repeat steps 12.2 to 12.7 on all of the Change Of State Digital Input modules in the selec*.ed sample.

l r 12.9 Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077) on the selected BTSCA in the cabinet under test per

[

Attachment 2. .

I2.10 Connect the ' Digital Test cable' (000-7080) between the l

'Special Relay Output Module' (000-7066) in the test I/O l controller (slot E) and the 'MTSCA to Test Cable / Connector Adapter'. i j 12.11 Contigure control Panel 02 as follows:

DEVICE ADDRESS SEI.ECT : to address the first device code of ,

j the I/O controller containing the Change of State Digital Input Module under test per Attachment 2, 5ece != 6, and, Appendia E., ;

J.

l INSTRUCTION SELECT : COM, INT QRY, and IE UP, i

) MU IE MW COMMAND WORD r ttr select randose mode, enable interrupts, and to address the 1

module under test using i Attach.aent 2, Appendix 5, and j Appendix C.

INSTRUCCION RATE 50 range - verniec mLdrange i

I PAGE 43 of 116 PAGES

. _ _ . - _ . , , - . .--,.----,re-.e-n,-,-._..-,----_,4.- .,-e , , _,,._,- , - - . , , ,--

i REMOTS I/O 11ARDWARE ACCEP CANCE TEST PROCEDURE 10r MUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT QLIFFS DATA ACQUISITION SYSTEM Ct. COMPUTER PRODUCTS, INC. LFT. LAUDERDALE) 2/2/84 i

! 12.12 RESET both control panels.

12 13 starting with an Output Word of '0000 0000 0000 0000' froar control Panel 91,, validate that the Data Word Display of I

Control Panel 62 matches the dutput Word Select switches of Control Panel #1. Validate that the interrupt request

, display of Control Panel 42 flashes on then off when a bit is toggled. Validate that the interrupt vector displayed corresponds to the controller first device address and the module slot, address. Validate the operatio#6 oE each, bLt.

t MODULE (5) SELECTED and TESTEDs CHASSIS 9 SIJr 9 INITIALK CBASSIS 9 SIDF 9 INITIATE W4 / _

/

/ /

l 12.14 Repeat steps 12.9 to 12.13 on the Change of State Digital Input modules selected for surge withstand capability l tes ting. J CHANGE OF STATE PERFORMED BYr N/ A %E XM '

C.P.I.

1 DIGITAL INPUT '

SURGE WITMSTAND AFFROVED BYr N .t! .5.

CAPABILITY /

/A/dr AV#446cf 4

VALIDATION APPROVED BY: E .G .E .

If a non-conformance is noted during the Change of State Digital Input l

Surge withstand Capability validation, the non-confornance will be i dispositioned per sectiort 3., the non-conformance will k corrected,.

and the validation of the Change of State Digital Input Surge withstand capability will be repeated on the module / cabling set where tDe non-conformance was noted. Af ter the test is complete, an 4 additional sample of f tve percent, or at least one, of the Change of State Digital Input with surge protection will be selected and tested. Thi.s will be repeated if another non-conformance is identified in the second sample.

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE CAS rnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 13 QUAD PULSC COUNTER MODULE VALIDATION The purpose of this test is to validate that the Quad Psalse Counter modules (021-5278) and their associated signal conditioning circuits (038-5099) are operational and to valldate the accuracy of the counter module to signal conditioning module cabling (040-5517) and the signal conditioning module to terminal strip cabling (040-5519) .

This la accomplished by using a control panet ta control a relay ou,tput.

module in a test I/O controller to simulate ' contacts

pulsee an the-terminal strip which sources the input module. The simulated data is monitored by a second control panel connected to the I/O cont. rollers in the cabinet under test. (Reference Figure 5 of Attachment 1) 13 1 Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077) on the selected BTSCA in the cabinet under test per Attachment 2.

13.2 Connect the ' Digital Test Cable' (000-7080) between the

'Special Pulsing Relay Output Module' (000-7067) in the test

'. I/O controller (slot 7) and the 'BTSCA to Test Cable /

! Connector Adaptec' .

13.3 Configure Control Pane 1 91 as follows:

INSTRUCTION SELECT r COM, OUT, WAIT TEST, and IN UP COMMAND WORD to select random mode, disable interrupts, and to address the

'Special Pulsing Relay Output Module' (address 'l')

INSTRUCTICN RATE r. 50 range - vernier utdrange l OUTPUT' WORD t '0000 0000 0000 0000' 17.4 Configure Control Panel 62 as follows:

DSVICE ADDRESE SELECT r to' addrest the firtt device code of the I/O Controller containing the Quad

< Pulse Counter Module under test per

]

Attachment 2, Sect.ica E, anni j Appendix 3.

' l I

INSTRUCTION SELECT t COR, OUT, WAIT TEST, and IN UP i I

l COMMAND WC'D R to select randos mode, disable i interrupts, and to address the module under test using Attachment 2, Appendis 3, and Appendix C.

f INSTRUCTION RATE . SK range - vernier aldrange l

PAGE 45 of 116 PAGER l l -% e

REMOTE. T/O NARDWARE ACCEPTANCE TEST PT.0CEDURE fcr NUS' CORP./

RALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at. COMPUTER PRODUCTS, INC.

(FT LAUDESDALE) 2/2/84 ,

i 13.5 RESET both control panels. j L1.1 Initialize the four counters of the module under test to zero counts from the Output Word of Control Panel 92. Set the

Output Word to all zeros.

13.7 Validate that counter to (Data Wcrd Display of Control '

l Panel 62) indicates a count of zero (all LEDs OFF) .

LT.E SeIact counter 91 from Control Panel 92 Output word and

! validate that counter el indicates a. count of aero.

I L3.S- select counter 92 and salidate that counter 62 indicates a l count of aero.

13.16 Select counter 63 and validate that counter 63 indicates ar J

count of zero.

13.11 select counter 60 from Control Panel 92 Output Word.

i 13.12 Set the appropriate bit (in the Output Word of Control Panel

01) from the table below corresponding to counter 60 and which hood of the Quad Pulse Counter to S.C.M. Cable (OM-5517) la connected to the module undt: . tast.

13.L3 validate that the Data Word Display of Control Panel 92 ,

i incrasants. Usint2 the Output. Word of Control Panel ti, select counters #1,92, and 93 and ve.11date that these counters are not incrementing.

13.14 Reset the bit set in the Output Word of Control Pane ( $1.

13.15 Select counter 91.

13.lE set the appropriate bit. (in the Output Word of Control Panel

61) from the table below corresponding to counter DL and .

which hood of the Quad Pulse Counter to 5.C.M. Cable l.

(040-5517) is connected to the module under test.

I.1.17 validate that counter 6I increments validate that counters to,. 62, and 63 do not increment.

13.18 Meset, the bit. set is t.he Output. Word of Control Panet iL.

L3.19 Select countee 92. '

i 13.20 set the appropriate bit (in the Output word of control Panel

] $1) from the table below corresponding to counter 82 and which hood of the Quad Pulse Counter to 5.C.M. Cable (O M -15L7) la connected. to the. module under taat.

l FAGE 4E of 116 PAGES l

REMOTF. I/O HARDWARE ACCEPTANCE TEST PROCEtX1RE fCr NUS CORP./

0 SALIIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACOUISITION SYCTEM l

at COMPUTER PRODUCTS, INC. (FT. LAUDERDAL2) 2/2/84 13.11 Validate that counter 62 increments. Velidate that counters 60, 61, and 63 do not increment.

13.22. Reset the bit set in. the output Word of Control Panel $1. !

13.23 Select counter $3.

1 f 13.24 Set the appropriate bit (in the Output Word of Control Panel

61) from the table below corresponding to counter 63 and, l

which hood of the Quad Pulse Counter to 5.C.M. Cable (040-5517) is connected to the module under test.

13.25 validata that counter 63 increments. YaIidate that counters 60, SI, and 62 do not increment 12.25 Roset the bit, set in the output word of ControI. Fanet SI.

ROOD of 040-5517 COUNTER NUMBER <

P!/SCM CABLE on MODULE UNDER TEST to il 42 03 ,

...... .... e . ... .......

HOOD PL l' 0 L 2 1 Output. Word bit set,on Control Panel PI tar HOOD P2 l 4 5 6 7 control pulsing relay ROOD P3 l 8 9 10 11 l

, HOOD P4 l 12 la 14 15 MODULES TESTED:

' t CHASSIS 0 SLOT 9 INITIALS CRASSIS 6 SI4T 4 DLITIALE 3

$A/ .__ /

/ _ . -.

/

13.27 Repeat steps 13.1 to L3.25 for aLL Qud Pulaa counter modules '

in the cabinet under test.

QUAD PULSE PERFORMED BYr N/A M m - C.F.I A I .

WITNESSED BYs 81 N.D.S.

/

If a non-conf.ormance is noted during the Quad Pulse Counter Module iralidetton, the non-conformance will be dispoeitioned per section J.,

the non-conformance wt11 be corrected and the validation of the Quad ,

Pulse Counters will be repeated on the module / cabling set where the non-conformance was noted.

PAGE 47 of 116 PAGES w - -- . _ _ , . - - - - - - . , ,em< - - - . , , - - , - . - , , - - - - -- --

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE foe NUS CORP./

) DALTIMORE' GAS and ELECTRIC CALVERT CLIFFS DATA ACOui.SITION SCTE!t at COMPUTER PRODUCTS, INC. (FT., LAUDERDALE) 2/2/84

- - . . _...-- =

If. QUAD PULSE COUNTER MODULE SURGE WITHSTAND CAPABILITY VALIDATION The purpose of this test is tar validate a sample of the surge withstand capability provided by the algnal conditioning modules (038-5099) by applying a surge to the terminals that source the input module while monitoring the data input from the mcJule under test with a control

, panel to validate that the data shall not change during the -

l application of the surge. The module tested will then be revalidated for functionality am per sect.ioes ib (Reference Figure 6 at Attachment 1) 14.1 select a sample of up to five percent or at least one of the surge protected Quad Pulse Counter Modules (021-5275 /

038-5099) in the cabiner. to have the surge withstand capability tested.

14.2 Install the 'BTSCA to Test cable / Connector Adapter' (000-7077) on the selected BTSCA in the cabinet under test per Attachment 2. ,

i 14 3 Connect the ' Pulse Counter Surge Test connector * (000-7097) to the 'BTSCA to Test Cable / Connector Adapter' . Connect the red lead of the surge transient generator cable to the point on j the test connector marked with the number on the hood of the Quad Pulse Counter to S.C.M. Cable (040-5517) installed on the module to be tested. Connect the black lead of the surge r

transient generator cable to the surge ground bus bar in the l cabinet under test. ,

14.4 Configure Control Panel 92 as follows:

DEVICE ADDRESS SELECT t to address the first device r:odt of the I/O Controller containing the Quad Pulsa Counter Modu.la under test per i Attachment 2, &tction 6, and.

Appendir R.

INSTRUCTION TEI.ECT s COM,. 0U7 MitIT TEST,. and IK UP COMMAND WORD a to select: random modte, dist.ble inter rupts , and to address the module under test using Attachment 1 l Appendix B, and Appendix C LMSTRUCTION RATE : Sit range - vernier midrange 14.5 RESET Control Panel 92 14.6 Initialize the four counters of the module under test tar enro counts f raa the output Word of Control Panel 02.- Validate that counters to, 91, 82, and !3 all indicate countn. of zero.

l PAGE. 44 ot lite PAGl;5 l

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j REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NOS CORP./

BALTIMORE CAS and ELECTRIC CALVf*RT CLIE't*S DATA ACCUISITION SYSTEN at COMPUTER PRODUCTS, INC. (FT. LAUDERDl6E) 2/2/84

. ------ _ =- -== -

=. - .--

[

i 14.7 Ready the surge transient, generator to output a surge per.

< Appendix D.

14.8 Depress the surge transient generatur Start pushbutton to apply the surge voltage for two seconds and validate that no bit in the Data Word Display of Control Panel 42 changes state during or af ter the application of the surge voltage.

l 14.9 validate that counters 60, 61. 41, and 63 all indicate counts of zero. .

MODULE (S1 SELECTED and. TESTED:

1 CHASSIS & IIOT & TNITIALS CRASSIS t SCOT & INITIALS H! h. / /

/ /

14.10 Repeat steps 14.1 to 14.9 on all of the Quad Pulse Counter modules in the selected sample.

14.11 Instd1 the 'BSCA to Test Cable / Connector Adaptee' (000-7077) on the selected BTSCA.in the cabinet under test per Attachment 2.

14.12 Conn?ct the ' Digital Test cable' (000-7040) between the

'Special Pulsing P.elay output Module' (000-7067) in the test I/O controller (slot 7) and the 'ETSCA to Test.

Cabic/ Connector Adapter' . ,

1 14.13 configurs control Panel. 62 aa follows:

I DEVICE ADDRE.55 St.1:SCr t to addresir the first device code of the I/O Controller containing the Quad Pulse Countas Module under test, ,

per Attachment' 7,. Eaction 6, and Appendir R.

IJt*TRUCTION SELECT : CDM, OUT, NAIT TEST',. and IN OF COMMAND HORD s to select rundce mode, disable interrupts, and to adcirrss tne sm:rdule ,

under test using Attachment 2, Appendix 3, and Appendix C. j IMSTRUCTICM RATE t SE cange,- Vernier midranga !

14.14 RESLT both control panels.

l l . Ace.4. us mes .

1

[

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE' for NUS CORP./

) BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM nt COMPUTER PRODUCTS, IMC. . (FT. LAUDERDALE) 2/2/84 B 14.15 Select counter 90 from C7ntrol Panel 92 Output Word.

14.16 Set the appropriate- bit. (irt the output Word of Control Panel ,

3

91) from the table below corresponding to counter 80 and

. which hood of the Quad Pulse Counter to S.C.M. Cable (040-5517)'is connected to the module under test.

?

14.17 Validate that the Data Word Display .ot Control Panel 92 increments.

> 14.18 Roset the hit set in the Output word of* Control Panst #1.

14.19 Select counter 61.

?

14.20 set the appropriate bit (in the Output Word of Control . Panel

61) from the table below corresponding to counter el and which hood of the Quad Pulso Counter to S.C.M. Cable (040-5517) is connected to the module under test.

l 14.21 validate that counter el increments. '

L 14.22 Reset the hit set in the Output Word' of Control Panel 41.

! 14.23 Select counter 62., l f

l 14.24 Set the appropriate bit (in the Output Word of Control Panel. l l 61) from the table below corresponding to counter 92 and. i l

' uhich hood of the Quad Pulse Counter to S.C.M. Cable l (040-5517) is connected to the module under test. l l

14.25 validata that counter 92 increments.

14.26 Reset the bit set in the Output Word of Control Panel 41.

14.27 Select counter 63. l I4 .28 set the appropriate bit (irt the Output 9Rrrd of Control Panel

61) f rom the table below corresponding to counter t3 and which hood of the Quad Pulse Counter to 5.C.E. Cable (040-5517) is, connected to the module under tsst. -

14.23 validata that courtter 63 increments.

14.30 Reset the bit met in the Output Word of C,JntrQ1 Panel 91.

1 PAGE' 50 of 114 PAGES

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURC for NUS CORP./

J BALIIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC (FT. LAUDERDALE) 2/2/84 HOOD of 040-5517 COUNTER NUMBER PI/E".M CABLE on MODULE UNDER TEST to el 02 63 eine === = = = = = = = = = sr= = + = == sw.==mu a = = = == wu en-HOOD P1 l 0 1 2 3 Output Word bit set on

- - - - --+----------- Control Panel il to HOOD P2 l 4 5 6 7 control pulsing relay NOOD P3 l 5 9 10 11 - .

HOOD P4 ( 12 13 14 li MODULES TESTED: .

CHASSIS 6 SLOT $ IEITIALS CHASSIS 6 SLOT 4 INITIALS Nih / /

/ /

14.31 Repeat steps 14.11 to 14.30 ont the Quad Pulse Counter moduler selected for surge withstand capability testing.

QCAD PUhSE PERFORMED BY: N/A W M / '

/ C.P.I.

COUNTER SURGE '

WITHSTAND APPROVED BY N.U.S.

CAPABILITY /

VALIDATION APPROVED BY 1/07 At#mv#44 B.G.E.

If a non-conformance is noted during the Qdad Pulse Counter Surgo Withstand Capability validation, the non-conformance will be dispositioned per Section 3., the non-conformance will be corrected, and the validation of the Quad Pulse Countar Surge Withstand capattility will be repeated on the module / cabling set where the non-conformance was noted. After the test is complete, an additional sample of fLve percent,. or at least one, of the Quad Pulse Counters with surge protection will be selected and tested. This will be repeated Lt. an another non-confnrmarica is identified. in the second sample.

I PAGE il of 116 PAGES 1 ,

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BALTIMORE GAS End ELECTRIC CALVERT CLIFFS DATA ACQUISITION S'fSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

15. UP/DOWN PULSE COUNTER MODULE VALIDATION The purpose oE this test. is to validate that the Up/Down Pulse Countar-Modules (038-5115) and their associated signal conditioning circuits i (038-5099) are operational and to validate the accuracy of the counter module to signal conditioning module cabling (040-5456 or

{ 040-5518) and the signal conditioning module to terminal strip cabling (040-5519). .

This is. accomplished by using a control panel to control a relay output module in a test I/O controller to simulate ' contact' pulses on the j

terminal strip which sources the counter module. The simulated data is monitored by a second control panel connected to the r/O controllers in the cabinet under test. (Reference Figure 7 of Attachment 1)

Note that the ' Channel A' Up/Down Pulse Counters are configured

' differnetly than the ' Channel B' Up/Down Pulse Counterr,. The

' Channel B' counters have their 16 inputs conditioned / sourced by one l signal conditioning module / tenninal strip. The ' Channel A' counters i r have their 16 inputs conditioned / sourced by two signal conditioning l

[ modules / terminal strips ( the UP, DOWN, and SET inputs by one SCM/TS, and. the RESET inputs by another SCM/TS) . I f Also note that the counters can be set to a count determined by a L

customer selected configuration of diodos on the module. The modules are normally factory configured for a count of zero. This creates a r problem in testing in that the SET input yields the same count as the l RESET input. For the purpose of this acceptance test, the modules are configured to give counts of 119 (decimal) ('01110111' binary),

187 (decimal) ('10111011' binary), 221 (decimal) ('11011101' binary), l and 238 ( decimal) (*11101110' binary) for counters DO, 61, 62, and #3 respectively on a SET input. Prior to shipment, the normal factory configured diodes will be installed on the modules.

} 15 .1 Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077)

) on the selected BTSCA in. the cabinet under test per Attachment 2. for ' channel B' counters or on each of the selected BTSCAs for the ' Channel A' counters.

J 15.2 Connect the ' Digital Test Cable' (000-7080) between the

. 'Special Pulsing Relay Output Itodule' (000-7067) in the test.

I/O controller (slot.7) and the 'BTSCA to Test Cable /

- Connector Adapter' on the selected BTSCA for 'Channsl B" counters or on the 'BTSCA to Test Cable / Connector Adapter' 5

on the selected BTSCA which sources the UP, DOWN, and SET ,

inputs to the ' Channel A' cou n te rs . For ' Channel A' counters, :onnect a second ' Digital Test cable' between the

'Special Relay Output Module' (000-7066) in the test I/O controller (slot 6) and the 'BTSCA to Test Cable / Connector Adapter' on the selected BTSCA which sources the RESET inputs to the ' Channel A' counters. l PAGE 52 of 116 PAGES

REMOTO 1/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

l BAI.TIMORF. GAS rnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM i at COMPUTER PRODUCTSr *INC. (FT.--LAUDERDALE) 2/2/84

! 15.1 Configure Control Panel #1 as'follows:

INSTRUCTIOtt SELECT t. COMc OUT, WAIT TEST, and IN UP .

COMMAND WORD : to select random mode, disable

! interrupts, and to address the

'Special Pulsing Relay Output Module'

. (address 'l') .

! IBKIROCTION RATE r 50 range - vernier aldrange OUTPUT WORD a *0004 0004 0000 0000' 15.4 Configure Control Panel 92 as follows:

DEVICE ADDRESS SELECT s to address the first device code of the I/O Controller containing the Up/Down Pulse Counter Module under test per Attachment 2, Section 6, and Appendix B.

INSTRUCTION SELECT t COM, OUT, WAIT TEST, and IN UP COMMAND WORD to select random mode, disable interrupts, and to address the module undet test using Attachment 2, Arpendix B, and Appendix C.

INSTRUCTION RATE z SK range - vernier midrange 1

l 15.5 RESET both control panels. ,

l 15.6 Set the countee to of the module under test to a count of j

'10000000' (binary) froar the Output Word, of Contral Panel 92. '

I

! 15.7 Validate that counter 80 indicates a. count of '10000000' irt the j Data Marti Display of Contral Panel 62.

l 15.E set counter tl to a count of *10000000*

f 11.9 Validate t hat- ceunter iL indicates a count of '10000000' .

4 15.10- Set counter 62 to a count. of '10000000' .

15.11 Validate that counter #2 indicates a count of 'I0000000' .

15.11 set counter 63 to a count. of '1000000G* .

15.11 validate that. countee 93. indicates a count of *10000000* ;

PAGE.53 of Lin PAGES

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

3ALTIMORE GAS cnd ELECTx1C CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE

_ _ _ _ _ _ _ _ . _ _ _ . _ _ _ _ _ _ _ _ _ _ _ m . u _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _______...________ _ . _ _ _ _ _ _ _ _ _ _ _ _ _) _ _

i For ' Channel A' Up/Down Pulse Counters, proceed with steps 15.14 to 15.31, then continue with step 15.48 .

For ' Channel B' Up/Down Pulse Counters, proceed with steps 15.32 to

> 15.47, then continue with step 15.48 .

' CHANNEL A' COUNTERS ONLY (15.14 to 15.31) 15..4 Set the COMMAND WORD of Control Panel #1 to address the

)

'Special Relay Output Module' (address 'O').

15.15 Select coanter 60 from Control Panel #2 Output Word.

15.16 set bit 0, 4, 8, or 12, per the table below depending on the I position of the card under test on the counter to SCM cable (040-5518), in the Output Word of Control Panel il to cause a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter 90.

( 15.17 Reset the bit set in the Output Word of Control Panel fl.

i 15.18 Validate that counter 90 indicates a count of '00000000' in the Data Word Display of Control Panel #2.

{

< l 15.19 Select counter #1 from Control Panel #2 Output Word.

5 15.20 Set bit 1, 5, 9, or 13, per the table below depending on the position of tho card under test on the counter to SCM cable

) (040-5518), in the Output Word of Control Panel #1 to cause a relay on the Special Relay Output Card to 'make contact' on j the RESET input to counter $1.

15.21 Reset the bit set in the Output, Word of Control Panel fl.

15.22 Validate the Datathat counter Display#1 of indicates a count

$2 of '00000000' in i

Word Control Panel 15.23 Select counter #2 from Control Panel #2 Output Word.

15.24 Set bit 2, 6, 10, or 14, per the table below depending een the I

{ position of the card under test on the counter to SCM cable J (040-5518), in the Output Word of Control Panel il to cause a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter #2.

)

15.25 Reset the bit set in the Output Word of Control Panel 41.

I 15.26 Validate that counter 92 indicates a count of '00000000' in I

the Data Word Display of Control Panel 42.

l

(

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g REMOTE 1/0 HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORPc/

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 s

15.27 select counter DJ from Control Panel f 2 Output Word.

15.25 See bit 3, 7, II, or 15, per the table below depending on the 8

position of the card under test on the counter to SCM cable (040-5518), in the output Word of Control Panel il to cause a relay on the Special Relay Output Card to 'make contact' on l

? the RESET input to counter $3.

15.29 Raset the bit set in the Output Word of Conteni Panel 91.

15.30 validate that counter 63 indicates a co[. int of '00000000' in i the Data Word Display of Control Panel 62.

15.31 set the COMMAND WORD cf Control Pane! #1 to address the

'Special Pulsing Relay Output Module * (address 'l').

POSITION OF MODULE ON COUNTER #

( 040-5518 CABLE O 1 2 3

===========+===+===+===+m

FIRST CARD l0 1 2 3 Output Word bit set

on Control Panel iL to h SECOND CARD l4 5 6 7 control pulsing relay

- - + - - - - - on RESET inputs of TEIRD CARD l8 9 LQ L1 Channat A counters e e ---- - ' ---

FOURTH CARD l12 13 14 15 b

o PAGE Si of 116 PAGEE 9

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BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

=- - - - - - - - - - - - - _--. _- ----

' CHANNEL E' COUNTERS ONd- (15.32 to 15.47)

15 .3 2 Select counter 90 from Control Panel il Output Word.

l 15.33 Set bit 2 in the output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the RESET input to counter 60.

15.34 Reset tinr trit set in the Output Word of Control Panel 61.

15.35 Validate that counter 40 indicates a count of 'C0000000* in the Data Word Display of Control Panel $2.

. 15.36 Select counter el freie Control Panel #2 Output Werd.

15.37 Set bit 6 in the Output Word of Control Panel #1 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the RESET input to counter #1.

, 15 .32 Roset the bit set in the Output Word of Control Panel $1.

15.39 validate that counter PI indicates a count of '00000000 .

15.40 Select counter F2 from Control Panel #2 Output Word.

15.41 Set bit 10 in the output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the RESET input. to counter bl.

15.42. Reset the bit set in the output Word of Control Panel 91.

15 .43. Validata that countec #2. indicates a count of '00000000' .

15.44 Select counter 83 from Control Panel #1 Output Word.

15.45 Set bit 14 in the Output Word' of Control Panel 91 to cause a relay out the. Special Pulaing Relay Output Card to start.

' pulsing' orr the RESET input to counter 43.

15.4E Roset, the hit. set. in the Output Word of Control Panel ll.

15.47 validate that counter 63 indicates a count of '00000000* .

4 PAGE 56 of.116. PAGES l e o

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/

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

===.

' CHANNEL A' and ' CHANNEL B' COUNTERS 15.48 Select. counter 40 frort Control Panel $1 Output Word.

15.49 Set bit 3 in the output Word of Control. Panel $1 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the SET input to counter 80.

15.50 Reset the bit sat in the Output Word of Control Panal $1.

15.5I validate that counter- 90 indicates a count of *01110111' in-the Data Word Display of Control Panel 62. -

15.52 seleet counter $1 froar Control Panel 92 Output Word.

15.53 Set, bit 7 in the Output Word of Control Panel SI to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the SET input to counter 61.

15.54 Reset the bit met in the Output Word of Control Panel ll.

15.55 Validate that counter 91 indicates a count of '10111011' .

15.56 Select counter 42 from Control Panel 62 Output Word.

15.57 set bit II in the Output Word of Control Fans 191 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the SET input to counter 42.

15.58 Reset the bit set in. the Output Word. of Control Panel 61.

15 .59 Validate that counter 92 indicates a count of '11011101' .

l 15.60 Select counter. 63 frous Control Panel 92 Output Word.

15.61 set tilt 15 in the Output Word. of Control Panaf 6L to cause a.

relay on the Special Pulaing Relay Output Card to-start ,

'pulaing' on the SLT input to counter 61. l 1

15.62 Roset the bit set in the Output Word of Control Panel 91.

15.63 Validate that counter 63 indicates a count of '11101110" .

l l

l PAGE 57 of 114 PAGES i

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l REMOTE I/O RARDWARE ACCEPTANCE' TEST PROCEDURE for NUS CORP./

BALTIMORE GAS End ELECTRIC CALVERT CLIPPS DATA ACQUISITION SYSTEM 4.

at COMFUTER, PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 I l

15.64 Select counter 90 from Control Panel 92 Output Word.

l 15.65 set bit 0 in the Output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the UP input to counter 40.

15.56 Validate that counter 50 (the Data Word Display of Control

. Panel 92) increments.- ,

15.67 Reset the trit set in: the Output Word of Control Panel 91.

15 .68 Set bit 1 in the output Word of Control Panel $1 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' ort the DOWN input to counter 90 15.69 Validate that counter to ( t.e Data Word Display of Control l Panel t2) decrements.

15.70 Reset the bit set in the output Word of Control Panel fl.

15 .71, Select, counter 61 freet Control. Panel 62 Output Word.

I S .72' Set bit 4 in the output Word of Control Panel fI to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the UP input to counter 61.

15.73 Validate that counter 61 (the Data Word Display of Control

\

Panel 62) increments.

15 .74 Rasat the bit sat. inc the Output Word. of Cant mf Panel.41.

I 15.75 Set bit 5 in the output Word of Control Panel 91 to cause a relay on the Special Pulsing Relay Output Card to start l ' pulsing' on the DOWN input to counter 61.

15.7% Validate that counter 61 (,the Data. Word. Display of Control Panel 62) decrements.,

15.77 Reset t;he bit set irt the Output Word of Control Panel $1.

! PAGE 58 of 116 PAGES

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REMOTE I/O HARDWARF. ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE' CAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM st cot 4PUTER PRODUCTS,*INC. (FT. LAUDERDALE) 2/2/84 15.78 Select counter 52 from Control Panel 92 Output Word.

15.79 set hit 8 in the Output Word of Control Panel 81 to cause a .

relay on the special Pulsing Relay Output Card to start

. 'pulaing' on the UP input to counter #2.

15'.80 Validate that counter $2 (the Data. Word Display of Control Panel 62) increments. .

15.81 Reset the bit set in the Output Wortt of Control Panel fl.

15.8Z Set bit 9 is the Output word' of Cont:rol Panel il to cause a i relay on the Special Pulsing Relay Output Card to start "pulsing

on the DOWIS input to counter 62. .

15.83 Validate that counter 92 (the Data Word Display of Control Panel 92) decrements.

15.84 Reset the bit set in the output Word of Control Panel ll.

15.85 Select counter $3' from Control Panel 92 Output Word.

15.06 Set bit 12 in the Output Word of Control Panel il to cause a relay on the Special Pulsing. Relay Output Card to start

' puls ing' on the UP input to counter t3.

15.87 validate that counter 93 (the Deta Word Display of Control Panel 921 increments.

> 15.88 Reset the bit set in the Output Word of Control Panel #1.

, 15.19 Sat bit 13 in: the Output Word. of Control Panel $1 to cause a relay on the Special Pulsing Relay Output: Card to start

' pulsing' on the DOWN input to counter $3.

II.9G Yalidate that counter 93 (the Data Word Display of Control Panel 61) decrements I

1

, 15 JL Raset, tha hit. set in. the Ottput. Word. of Cnntrol Panel 61.

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PAGE' 59 of 116 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST' PROCEDURE for NUS CORP./

) BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. -(FT. CAUDERDALE) 2/2/84

}

IE3DULES TESTED:

CHASSIS # SLOT S '

INITIALS CHASSIS t SLOT $ INITIALS

)

Af/A / /

) -

/ /

)

/ /

/ '

/

)

/ /

~

\ / /

\ l i

f / /

/ /

l 1 / /

)

/ /

IEJZ Repeat steps 15.1 to 15.9L for all Up/Down Counter modules in the cabinet.

, UP/DOWN PULSE PERFORMED BYr N/A W b / C.F.E.

l COUNTER MODOLF. /

) VALIDATION WITNESSED BYr. NM ~

M .U .S .

/

If a non-conformanes is noted during the Up/Down Pulse Counter Module validation, the non-conformance will be dispositioned per Section 3.,

the non-conformanca will be corrected, and the validation of tha l Up/Down Pulse Counters will be repeated on the module / cabling set where the non-conformance was noted.. .

PAGE.64 of. 116 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PRCCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM (Fr. LAUDERDALE) 2/2/84 at COMPUTER PRODUCTS, INC.

16. UP/DOWN PULSE COUNTER MODULE SURGE WITHSTAND CAPABILITY VALIDATION Tha purpose of this test is to 7alidate a sampla of the surge withstand capability provided by the signal conditioning modules (038-5099) by applying a surge te the Up/Down Pulse Countar terminals that source the input modules while monitoring the data input from the module under test with a control panel to validate that the data shall not change during the application of the surge. The module tested will then be revalidated for functionality as per Section 15. (Reference Figure 8 of Attachment 1) 16.1 Select a sample of' up to five ; ercent or at least one of the surge protected Up/Down Counter modules (038-5115 / 038-5099) in the cabinet to have the surge withstand capability tested.

IEr .2. Install the 'BTSCA to Test Cable / Connector Adapter' (000-7077) on the selected BTSCA in the cabinet under test per Attachment 2 for ' Channel B' counters or on each of the selected STSCAs for the ' Channel A' counters.

16.3 Cannect the ' Digital Input Surge Test Connector' (000-7078) to the 'BTSCA to Test Cable / Connector Adapter' on the selected BTSCA for ' Channel B' counters or on the 'BTSCA to Test L.Able/ Connector Adapter' on the selected BTSCA which sources-the UP, DOWN, and SET inputs to the ' Channel A' counters.

For ' Channel A' count,ers, connect the ' Pulse Counter Surge Test Connector' (Q00-70971 to the ' BTSCA to Test Cable /

Connector Adapter' on the selected BTSCA which sources the RESET inputs to the ' Channel A' counters.

I 16.4 Connect the red lead of the surge transient generator cable to ,

the ' Digital Input Surge Test Connector' on the BTSCA for j

' Channel B' counters or on the BTSCA which sources the UP, DOWN, and SET inputs to the ' Channel A' counters. Connect the black lead of the surge transient generator cable to the surga ground bus bar in the cabinet under test.

I6.5 Configure Control Panel 92 as follows:

l DEVICE ADDRESS SELECE .s tcr address the first device code of the. I I/O Controller contairring the Up/Down '

Fulse Counter Module under test per Attachment 2, Section 6, and Appendix B.

INSTRdCTION SELECT z COM, OUT, WAIT TEST, and IN UP

~ COMMAND WORD t to select random mode, disable interrupts, and to address the module under test. using Attachment 2, Appendix B., and Appendia C.

INSTRUCTION RATE : SK range - vernier midrange l

PAGE 61 of 116 PAGF.S 1

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REMu l t. 1/0 HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTER at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 16.6 RESET Control Panel 92.

16.7 set counter 60 of the module under test to a count of

'10000000' (binary) from the Output Word of Control Panel 62 16.8 Validate that counter 80 indicates a count of *10000000' in the

' Data Word Display of Control Panel $2.

16.9 Set counter 61. to a count of *10000000' .

16.10 validate that counter il indicates a count of '10000000* .

16.11 Set counter 62 to a count. of '10000000* .

16.12 Validate that counter 42 indicates a count of '10000000' .

16.13 Set counter 63 to a count of '10000000' 16.14 Validate that counter 43 indicates a count of '10000000' .

16.15 Select counter 60. ,

16.16 Ready the surge transient generator to output, a surge per Appendir D.

16.17 Depress the surge transient generator Start pushbutton to apply the surge voltage for two seconds and validate that no bit in the Data Word Display of Control Panel $2 changes state during or after the application of the surge voltage.

16.18 validate that counter 60 indicates a count of '10000000' in the Data Word Display of Control Panel 92.

16.L9 Validate that counter 61 indicates a count of '10000000' .

16 .20 Validate that counter 62 indicates a count of '10000000 * .

16.21 Validate that counter il indicates a count. of '10000000' .

PERFORM STEPS 15.22' TO I6.28 for ' CHANNEL. A' CDUNTERS ONLY 16 .12. Connect the red lead of the surge transient generator cable to the ' Pulse Counter Surge Test Connector' on the BTSCA which sources the RESET inputs to the ' Channel A' counters.

Connect the black lead of the surge transient generator i cable to the surge ground bus bar 1.rt the cabinet under test.

l

'l PAGE 62. of. Ll4 PAGEJE.

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ f BALTIMORE- GAS and ELECTRIC at COMPUTER PRODUCTS,'INC. CALVCRT LFT. QLIFFS DATA ACQUISITION LAUDERDALE) 2/2/84SYSTEM t

15.23 Ready the surge transient generator to output a surge per Appendit D.

16.24 Depress the surge transient generator Start pushbutton to apply the surge voltage for two seconds and validate that no bit in the Data Word Display of Control Panel #2 changes state during or after the application of the surge voltage.

16.25 validate that counter 90 indicates a count of '1000000Q* irr the Data Word Display of Control Panel 42.

16.26 validate that counter 6L Ladicates a count. of *1000000G*

16.27 validate that counter 92 indicatr,s a count of '10000000' .

16.2E. Validate that counter 93 indicates a count of '10000000* .

MODULE (S) SELECTED and TESTED:

CHASSIS 4 SLOT 4 INITIALS CHASSIS 9 SLOT f' INITIALS M/k/ /

/ _

/

/ /

/_ _ _

/

/ /

16.19 Repeat steps 16.2 to 16.28 (as applicable) on all of the Up/Down Pulsa Countar modulea in the sample selected.

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I REMOTE 1/0 NARDWAnd ACCEPTANCE TEST PROCEDURE fot NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM j ct COMPUTER PRODUCTS , INC. (FT. LAUDERDALE) 2/2/84 16.30 Install the 'BTSCA to Test Cable / Connector Adapter" (000-7077) on the selected BTSCA in the cabinet under test per Attachment 2 for ' Channel B' counters or on each of the selected BTSCAs for the ' Channel A* counters.

9 16.31 Connect the ' Digital Test Cable' (000-7080) between the I 'Special Pulsing Relay Output Module' (000-7067) in the test

) I/O controllet (slot 7) and the 'BTSCA to Test Cable /

Connector Adapter' on the selected BTSCA for ' Channel B' opunters oc on the 'BTSCA to Test Cable / Connector Adapter

on the selected BTSCA which sources the UF, DOWR, and SET 3

inputs to the 'Channsi A' counters. For ' Channel A' counters, connect. a second ' Digital Test cable' between the

'Special Relay Output Module' (000-7066) in the test I/O controller (slot 6) and the 'BTSCA to Test Cable / Connector Adapter' on the selected BTSCA which sources the RESET inputs to the ' Channel A' counters.

16.32 Configure control Panel il as follows:

) INSTRUCTION SELECT COM, OUT, WAIT TEST, and IN UP l

l* COMMAND WORD s. to select random mode, disable interrupts, and to address the t *Fpecial Pulsing Relay Output Module

l (address 'l')

INSTRUCTION RATE : 50 range - vernier midrange OUTPUT WORD : '0000 0000 0000 0000*

16.37 Control Panel 92 as- follower DEVICE ADDRESS SELECT t to address the first device code of the l

j I/O Controller containing the Up/Down Pulse Counter Module under test per l Attachment 2, Section 6, and Appendix 1.

INSTRUCTION SELECE s COM,. OUT,. WAIT TEET, and IN UP CDRMAND WORD s to select randcar mode, disable

interrupts, and to address the module under test using Attachment. 2,.

Appendia 5, and Appendit C.

INSTRUCTION RATE : 5E range - vernier-midrange PAGE,64 of 116 PAGES

l REMOTE' r/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS' CORP./

BAI.TIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM i at COMPUTER PRODUCTS,, 'INC (FT. LAUDERDALE) 2/2/84 )

k 16.34 RESET both control panels.

16.15 Set P.e counter 40- of the module under test to a count of ,

'10000000' (binary) from the output Word of Control Panel 5

. 42 .

16.36 Validate that counter to indicates a count of '10000000' in g the , Data Word Display of Control Panel 62.

lifr.3Y Wet, counter SL tCL & Count of '10000002* .,

16.38 validate that counter il (Data Word Display of Control Panel

61) indicates a count of *10000000' .

16.3F Ket. counter $2 to a count of '10000000*

f 16.40 validate that counter #2 (Data Word Display of Control Panel

92) ind1 Cates a count of *10000000' .

16.41 Set counter 93 to a count of '10000000' .

16.41 validate that counter 63 (Data Word Display of Control Panel 621 indicates a count of '10000000' .

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PAGE 65 of 116 PAGES l

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 Por ' Channel A' Up/Down Pulse Counters, proceed with steps 16.43 to i

16.60,, then continue with step 16.77 .

1 For

channel n' Up/Down Pulse Counters, proceed with steps 16.61 to

. 16,76, then continue with step 16.77 . ;

' CHANNEL A' COUNTERS ONLE (16.43 to 16.60) 16.43 Set the CDRMAND WORD of Control Panel #1 to address the

'Spe;ial Relay Output Module' (address 'O').

16.44 Sale .:t counter 60 from control Panel 62 Output Word.

16.45 Se , bit 0, 4, 8, or 12, per the table below depending on the position of the card under test on the counter to SCM cable (040-5518), in the Output Word of Control Panel 61 to cause

( a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter 60 I 16.46 Reset the bit set in the Output Word of Control Panel Gl.

l 16.47 Validate that counter to indicates a count of *00000000' in the Data Word Display of Control Panel 92.

16.48 Select counter il from Control Panel 92 Output word.

16.49 Set bit 1, 5, 9, or 13, per the table below depending on the position of the card under test on the counter to SCM cable (040-5518), in the output Word of Control Panel #1 to cause a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter $1.

16.53 Reset the bit set in the Output Word of Control Panni el.

15.51 Validate that counter $1 indicates a count of '00000000* in' the Data Word, Display of Control Panel 92.

16.52 salect. counter #2.fecus Control Panel. $Z Output Word. '

16.53 Set bit 2, 6,.10, or 14, per- the table below depending on the position of the card. under test on the counter to SCM cable-(040-5518), in the Output Word of Control Panel 91 to cause a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter 42.

16.54 Reset the blt set in the Output Word of Control Panel el.

IG.55 validate that counter- tZ indicater a count of '00000000* in-the Data Word Display of Control Panet t2.

l PAGE,66 of 116 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fce NUS CORP./ I BALTIMORE GAS (:nd ELECTRIC CALVERT CLIFF,'1 DATA ACQUISITION SYSTEM l at. COMPUTER PRODUCTS, INC (FT LAUDERDALE) 2/2/84 16.56 Select counter G3 from Control Panel 42 Output Word.

16.57 set bit 3',. 7,11, . or 15, per the table below depending on the ponition of the card under test arr the counter to SCM cable (040-5518), in the Output Word of Control Panel #1 to cause a relay on the Special Relay Output Card to 'make contact' on the RESET input to counter 43.

16.58 Easst. the hit set in the Output Notti of Control. Panel 91. -

- l 16.57 validate that counter 93 indicates a cohnt of '00000000' in the Date. Woru Display of Control Pansi 02.

16.62 Set.the COMMAND WORD of Control Fanel SI to address the l 'Special Pulsing Relay Output Module' (address 'l').

POSITION OF MODULE ON COUNTER 9 040-5518 CABLE O 1 2 3 mammassmaamme+sas+=am+=am+sma --

FIRST CARD l0 1 2. 3 Output Ford bit set on Control Panel il to SECOND CARD l4 5 6 7 control pulsing ewley

- - - - - - - - + - - - - - - - - - on RESET inputs of

, THIRD CARD l8 9 10 11 Channel A counters FOURTH CARD l12 13 14 15 1

I

)

t l

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PAGE 67 of. LL6 PAGr.S e- < o-m . e

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE

for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFE'S DATA ACQUISITION SYSTEM l Et COMPUTER PRODUCTS, INC. (FT LAUDERDALE) 2/2/84 9 'CRANNEL B' COUNTERS ONLY (16.61 to 16.76) 16 .61. Se ect counter 60 from Control Panel il Output Word.

16.62 Set bit 2 in the Output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the RESET input to counter 80.

16.E3 Reset tha bLt. set irt ths Output Word of Control Panel 41.

) 15.54 validate that counter 90 indicates a count of '00000GCF in the Data Word Display of Control Panel 42.

f 16.65 Select counter #1 from Control Panel #2 Output Word.

16.66 Set bit. 6 in the output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start l

' pulsing

on the RESET input to counter $1.

16.67 Reset the bit set in the Output Word of Control Panel $1.

. 16.68 validate that counter il (Data Word Display of' Control Panel

, 62) indicates a count of. *00000000 * .

16.69 select, counter 62.fcom Control Panel 42 Output. Word.

16.70 set bit 10 in the Output Word of Control Psnel il to cause a relay on the Special Pulaing Relay Output Card to start

' pulsing' on the RESET input to counter $2.

16.71 Reset the bit set in the Output Word of Control Panel fl. ,

! 16.72 validate that counter $2 (Data Ward Display of Control Panel

62) indicates a count of. '00000000*

16.71 Select, counter 61 from Control Panel 91.Ontput. Word.

16.74 set bit.14 in the output Word of Control Panel il to cause a relay on the special Pulsing Relay Output Card to start

' pulsing? on the RESET input to counter 43.

16.75 Reset the bit set in the Output Word of Control Panel 61.

l 16'.76 validate that counter 93 (Data Word Displar of Control Panel I 92) indicates a count of '0000000E' .

PAGE. 6a of 116 PAGES

REMOTE I/O' EARDWARE ACCEPTANCE TEST PROCEDURE for MUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, 'INC. (FT. LAUDERDALE) 2/2/84 .

CHANNEL A' and ' CHANNEL B' COUNTERS 16.77 select. counter 80 front control Panel 61. output word. ,

16.78 Set bit 3 in the Output Word of Control Panel $1 to cause a relay on the Special Pulsing Relay Output Card to start j

' pulsing' on the SET input to counter 80. !

16.79 Raset the bit set in the Output Word of Control Panel 91.

, 15.80 validate that counter to indteates a count of '01110111* in l l the Data Word Display of Control Panel 62.

It.8I select counter FI from Control Fanel 92' Output ' Word.

i 15.82 set bit 7 in the Output Word of Control Panel 91 to cause a relay on the Special Pulsing Relay Output Card to start i

' pulsing' on the SET input to counter 41.

16.83 Reset the bit set in the Output Word of Control Panel $1.

16.84 validate that counter $1 (Data Word Display of Control Panel !

62) Ladicates a count.af.'10111011' .

16.85 Select counter 62 from Cor. trol Panel #1 Qutput Word. i 16.86 set bit 11 in the Output Word of Control Panel 91 to cause a relay on the Special Pulsing Relay Output Card to start pulsing

on the SET input to counter $1.

If.57 Reset the bit set in the Output Word of Control Panel fl.

16.88 Validate that counter 42 (Data Word Display of Control Panel

61) indicates a count of '11Q11101' .

1&.19 Salact er-*=r 61 from ContraL Panel 62. Output. Word.

16.9Q Set bit 15 in the output Word of control Panel $1 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the SET input to counter $3.

16.91 Roset the bit set in the Output Word. of Control Panel fl.

16.32. Validata that counter 43 (Data Word Display of Control Panal

62) indicates a count of '11101110' .

~

PAGE 69 of 116 7 AGES-I i

s. a mes< we -as ~a -

,*e -

>s em .

.----m._%---,-. y.,---.----,wv.,-+. ----,,,,rw- , - - - , - - . ------,-w.. w,-r-, - , ,,v,. - , - - ., - . . - , -,y,,,--+-------,---,,ve-eme-- - 4 e -4 t e -c+ai-.py n e--w-

I

\

REMOTE I/O FTARDWARE ACCEPTANCC TEST' PROCEDURE for NUS Cune./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM ,

at COMPUTER PRODUCTS, INC (FT. LAUDERDALE) 2/2/84 l

____________________ _____ ___ _ _ ____ i 16.93 Select counter 90 froe Control Panel #2 Output Word.

16.94 Set. bit 0 in the Output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start j ' pulsing' on the UP input to counter 90.

16.95 Validate that counter 60 (Data Word Display of Control Panel

92) increments.

16.96 Esset. the bit set in the Output Word of Control Panel #L 16.97 Set bit 1 in the Output Word of Control Panel il to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the DOWN input to counter 60.

16.98 Validate that counter 90 (Data Word Display of Control Panel

42) decrements.

16.99 Reset the bit set in the Output Word of Control Panel 41.

16 100 Select counter 61 front Control Panel 62 Output Word.,

16.101 Set bit 4 in the output Word of Control Panel il to cause a relay on the *Special Pulsing Relay Output Card to start

' pulsing' on the UP input to counter $1.

16.102 Validate that counter il (Data Word Display of Control Panel

62) increments.

16.103 Reset the bit set in the Output Word of Control Panel ll.-

1 16.104 Set bit 5 in the Output Word of Control Panel 91 to cause a relay on the Special Pulsing Relay Output Card to start

' pulsing' on the D0hN input to counter ll.

16.105 validate that counter SL (Data Word. Display of Control Panel

62) decrements.

16.106 Reset the bit set in the Output Word of Control Panel ll.

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PAGE 7G of 116 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLil'FS DATA ACQUISITION SYSTEM l at COMPUTER PRODUCTS, *INC. (FT. LAUDERDALE) 2/2/84 1

16.107 Select counter 92 from Control Panel #2 Output Word.

16.108 Sat. bit 8 in the Output. Word of Control Panel il to cause a. .

relay on the Special Pulsing Relay Output card to start

- ' pulsing

on the UP input to counter #2.

16.109 Validate that counter 52 (Data Word Display of Control Panel

92) increments. .

15.I1@ Reset. the hit set in the Output Word of Control Panel 31 16.111 set bit 9 in the Output Word of Control Panel il to cause a I relay on the Special Pulsing Relay Output Card to start

' pulsing' on the DOWN input to counter #2 16.112 Validate that councer 92 (Data Word Display of Control Panel

92) decrements.

16.113 Reset the bit set in the output Word of Control Panel fl.

16.114 Select counter 63 from Control Panel 92 Output. Word. l I6.115 Set bit I2 in the Output Word of Control Panel SI to cause a relay on the Special Pulsing Relay output Card to start l

' pulsing' on the UP input to counter 63.

16.116 validate that counter 63 (Data Word Display of Control Panel

62) increments.

16 117 a. east the bit. set in the Output Word of control Panel 91.

16.118 Set bit 13 in the Output Word of Control Panel 61 to cause a relay on the Special Pulsing Relay Output Card t.o start

' pulsing' on the DOWN input to counter 63 16.119 Validate that counter $1 (Data Word. Display of Control Panel (2) decrements.

16.120 Reset the bit set in the Output Word of Control Fanel 91.

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l PAGE 71 of 116 PAGES l

i REMOTE' I/O RARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at- COMPUTER PRODUCTS, INC. (PT. LAUDERDALE) 2/2/84 MODULE (S) SELECTED and.TESTEDt CHASSIS 9 STAT $ INITIALS CHASSIS 6 SLOT $ INITIALS

~

g/A / /

/ /

I

/ /

16.121 Repeat steps 16.30 to 16.120 on the remaining Up/Down Pulse Counters selected for surge withstand capability testing.

l UP/DOWN PULSE PERFORMED BY: N / tt TAL.i$ '

SM C.P.I.

COUNTER MODULE '- /

SURGE WITHSTAND APPROVED BYs .

t/ - N .U .S .

CAPABILITY /

VALIDATION APPROVED BY: //C7~ M# W4t.4- 8.G.E.

If a non-conformance is noted during the Up/Down Pulse Counter Surge Withstand Capability validation, the non-conformance will be dispositioned per Section 3., the non-conformance will be corrected, and the validation of the Up/Down Pulse Counter Surge Withstand Capability will be repeated on the module / cabling set where the non-conformance was noted. After the test is complete, an additional sample of five percent, or at least one, of the Up/Down Pulse Counters with surge protection will be selected and tested. This will be repeated if an another non-conformacca is identified. in the second sample. .

{

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j REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIPPS DATA AC00LSITION SYSTDt at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

/ - ______

17. DIGITAL and ANALOG LOOPBACK and CALIBRATION MODULE VALIDATION The purpose of this test is to validate the operation of the different

> functional blocks of the Digital and Analog Loopback and Calibration modules (021-5271) where applicable; to validate the accuracy of the DALCAL module to terminal strip cabling (075-5271) where applicables t

and to validate the functionality of the temperature transducer (559-5002) within the cabinet where applicable.

j The Universal Analog to Digital Converter module (02I-02II) fr also validated when configured in a controller cont'aining a DALCAL module.

The digital loopback functional block validation La accomplished by using a control panel to output data to the module under test and validating, that, the data input Irom the module echos the data output.

The analog loopback/ calibration functional block validation is accomplished by using a test computer system (see the CPI Description and Operating Instructions for the CPI Analog Input Test Computer and Programs) to run a test program to acquire analog data from the

( DALCAL / Universal A/D Converter module pair under test and validate the data acquired per data derived from the specifications of the Universal A/D Convertec module (Ar. 021-011.1.) and, the DALCAI. module (AE 021-5271).

[

The temperature transducer monitoring functional block is. validation is r accomplished by using the test computer system to run the test

[ program to acquire analog data from the DALCAL / Universal A/D Converter module pair sensing the output of the temperature transducer. The test program displays the raw analog data and also

[ converts the data to the corresponding temperature. The temperature-L measured is compared to the temperature measured by a digital thermometer and the data is validated per data derived from the specifications of the Universal A/D Converter module, the DALCAL module, the temperature transducar, and the test. digital. thermamater r

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PAGE 71 of. LLE P14E1 l

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Rt; MOT 8 1/U tfAHunARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 DALCAL MODULE DIGITAL LOOPBACK VALIDATION f 17.I Configure control Panel t2,,as follows:

DEVICE ADDRESS SELECT : to address the first device code #f the I/O controller containing the DALCAL

{ Module under test per Attachment 2, Section.6, and Appendia R.

INSTRUCTION SELECT

COM, OUT, WAIT TEST, and IN UP COMMAND WORD r to select random mode, disable interrupts, and to address the module under test using Attachment 2, Appendiz 8, and Appendix C.

INSTRUCTION RATE r SK range - vernier midrange 17.2 Starting with an output Word of '0000 0000 0000 0000' from Control Panel 62, validate that the Data Word Display of Control Panel 62 matches the Output Word Select switches of Control Panel 67. Validate the operation of each bit.

MODULES TESTEDt CHASSIS 6 SLOT $ INITIALS CHASSIS & SLOT # INITIALS "EE.- 11: 1 to R L. / /

/ / ,

17.2 Repeat steps 17.1 to 17.2. for all DALCAL modules in the cabinet under test.

DALCAL MODULE PERFORMED BYa W.21- C.P .I ..

DIGITAL LOOPBACK 7 L /

{

VALIDATION WITNESSED BYt A />T~/ M M.U ,s.

If a non-conformanew is noted-during the DALCAL module digital loopback validation, the non-conformance will be dispositioned per Section 3.,

the non-conformance will be corrected, and the validation of the DALCAL module digital loopback will be repeated on the module where the non-conformance was noted. -

h .

PAGE 74 of. lla PAGES

RCMOTE I/O RARDWARB ACCINTANCE TEST PROCEDUR8 fcr NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLtPFS DATA ACQUISITION SYSTEM

( at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 f DALCAL MODOLE ANALOG LOOPBACK VALIDATION 17.4 Load the DALCAd module test program into the Analog Input Test Computer per the CPf Description and Operating Instructions for the Analog Input Test Computer.

17.5 t/se information f rom the operating instructions, Attachmen,2, Appendix C, Section 6, and the following steps to inswet the program prompts to run the DALCAL test program on the DALCAL

=adiilm / Analog to Digital

Converter Module pair under test.

17.6 Run an offset test at gain code 0 for 10'0 scans and validate an j offset within (-0.050 t +0.050)V.

17.7 Run an offset test at gain code 1 for 100 scans and validate an offset within (-0.015 t +0.015)v.

17.8 Run an offset test at gain code 2 for 100 scans and validats an

{ offset within (-0.0125 : +0.0125)V.

17.9 Run an of fset test at gain code 3 for 100 scans and validate an of f set within (-0.00625 s +0.00615)V.

L7.13 Run a positive full scale test at gain code O for 100 scana

(

and validate a voltage within (+9.950 +10.050)V.

17.11 Run a positive full scale tcst at gain code 1 for 100 scans and validate a voltage within (+4.975 : +5.025)V.

17.12 Run a positive full scale test at gain code 2 tor 100 scans

,- and validate a voltage within (+2.4875 s +2.5125)V.

17.17 Aun a positive full scale test at gain code 3 for 100 scans-

and validate a voltage within (+1.24375: +1.25625)V.

17.14 Run a negative. full scale test at gain code Q for 100 scans and validate a voltage within (-9.950 a -10.050)T.

L7.15 Run a negative full scale tast,at. gain coda i for 10Q memna and validate a voltage within (-4.975 -5.025)T.

17.16 Run a negative full scale test at gain code 2 f or 100 scans

{ and validate a voltage within (-2.4875 s -2.5125)V.

17.17 Run a negative full scale test at gain code 3 for 100 scans and validate a voltage within (~L.24375 : -1.256 25 ) V.

, PAGE 75 of 116 PAGES

RsM0it', I/O RARDWAkt. ACt.c.r*Tn.we. Tes t' FxOCEDURE fcr NUS COPP.'/

EALTIMORC GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM

) at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 I

MODULE PAIRS TESTEDr DALCAL / A.D.C CHASSIS S SLOT 4* SLOT & INITIALS

'E -\*\ )o \\ h/

)

~

/

l i - . .

/ i l

17.1& Repeat steps 17.5 to 17.L7 on all DALCAL modules configured with Analog to Digital Converter cceds in the cabinet under ten. .

DALCAL HODULE PERF0RMED BYs Wd '

C.P.I.

f* ANALOG LOOPBACE/ /

CALIBRATION VALIDAIION APPROVED BYs N M N .U .S .,

f APPROVED BYs LM- At/4 > c A A ( /C B.G.E.

, If a non-conformance is noted during the DALCAL module analog loopback l validation, the non-conformance will be dispositioned per Section 3.,

the non-conformance will be corrected, and the validation of the DALCAL module analog leopback wiLL be. repeated on the module where the non-conformance was noted.

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( PAGE 76 of.116 PAGES i

L REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and RLECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, *INC.

( FT. IJ.UDERDALE) -- _

2/2/84 DALCAL MODULE TEMPERATURE MONITORING VALIDATION 17.19 Using the Digita-1 Thermometer, measure the temperature iin .

Celsius) at the temperature transducer (559-5002) monitored

_ by the DALCAL module in the cabinet under test. Record the temperature measured below.

17.20 use information from the operating instructions, Attachstent 2, Appendia C, Section 7, and the following steps to answer ther.

program prompts to run the DAtCAL test program on the DALCKL modules cenfigured to measure the cabinet temperature l

f L7.21 Run the system monitor test for 100 scans and validate *. hat l the ITALCAL modules configured to measure cabinet temperatute L

indicate a temperature within 3 degrees Celsius of. tkn temperature measured with the digital thermometer.

MODUt.ES TESTEDr !

CHASSIS 9 SLOT 4 INITIALS W - 1 5'l to 9V/

l CABINET TEMPERATURE USING DIGITAL THERMOMETER 1 ~2- P C' ,

CABINET TEMPERATURE US.tNG DALCAL t* 2_ 5 54 -73

C l

CHASSIS $ SLOT $ INITIAf.S

(

/

CABINET TEMPERATURE USING DIGITAL THERM 0 METER r l CARIMET T::MPERATURE USING DALCAL s i

17.22 Repeat stepe 17.19 to 17.2L on all DAI.cnn modules configured tn measu.ra cabinet, temperature..

DALCAL MODULT PERFORMED BYr h 5 O "

C.F.I.

f TEMPERATURE . /

MONITORING WITNESSED BY M N.U.S.

VALIDATION i

j If. a non-conformance La noted during the DM. cat. module temperature monttacing validation, the non-conformance will be dispositioned per i Section J.,. the non-conformance will be corrected, and the validation l of the DALCAL module temperature monitoring .will be repeated on the module where the non-conformance was noted.

PAGE.77 of. L16 FAGES

f kuMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS anc ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM

! at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 18 . POWER SUPPLY MONITORING VALIDATION The purpose of this test is to validate the gross operation of the analog input modules (021-5234) monitoring cabinet power supplies and

) thp RTD signal conditioning module power suppliest to validate the accuracy of the input modale to terminal strip cabling (075-0053) and the terminal strip to power supply dividers or terminal strip to RTD SCM power supply cabling and to validate the operation of. the digital input module (021-5227) monitoring the contact sense (125' l Volt) power supply and the accuracy of the input module to terminal strip cabling (075-5227) and any other associated cabling.

The validatioit of the analog inputs monitoring the power supplies is accomplished by using the test computer system to run a test progra ,

to acquire analog data from the analog input gate module under tesc )

and validatir,g that the data acquired represents voltages represer.ts:<..a of the outputs from the power supply dividers. Then Each pan-: eupply will be powered down and the corresponding data must inL .ste a less of power supply.

The validation of the digital inputs monitoring the contact sense (125 volt) power supscIy is accomplished by using a control panel to monitor the digital input module under test, removing the source of 125 Volts.to the module under test and validating that the appropriate digital bit changes state.

CABINET POWER SUPPLY MONITOR VALIDATION 15.1 Use information front the analog input test computer operating instructions, Attachment 2, Appendix C, Section 6, and the i following steps to answer the program prompts to run the analog input test program on the analog input gata =~%1e that is wired to monitor cabinet power supplies 11.2. Validate that the channels monitoring the +5 volt power supplier, where applicable,. measure (4.0 t 6.0) volts.

l

( 18.3 validate that the channels- monitoring the +15 volt power supplien, where applicable, measure (4.0 : 6.0) voltz.

! 18.4 Validate that the channels monitoring the -15 volt power supplies, where applicable, measure (-4.0 : -6.0) volts.

18.5 Validate that the channels monitoring the +125 volt power 3

supplies, where applicable, measure (4.11 r, 6.0) volts.

i

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) REMOTE I/O HARDWARE ACCF:PTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPI.1TER PSODUCTS, INC (FT. LAUDERDALF.) 2/20/84

.- _ =---- - _ _ - _ - - - - -

18.8 Unplug the ' A' power cord of the 5 volt power supply monitored by the analog input module under test, where applicable, from-its AC panel.

18.T Rerun the analog input test program and validate that the channel monitoring the 'A' 5 volt power supply indicates a voltage between (0.0 t 1.0-) volts.

14.1 Reinstall the ' A' powee corti in the AC panel and unplug the 'n' power cord.

LE J Rerun the analog input test program and validate that the channel monitoring the 'n' 5 volt power supply indicates a voltage between (0.0 s. 1.0) volts.

15.13 Reinstall the 'B' power cord la the AC panel.

( 18.21 Unplug the 'A' power cord of the +15 volt power supply monitored by the analog input module under test, where applicable, from its AC panel.

18.12 Rerun tEhe analog input test program and validate that the channel monitoring the 'A' +15 volt power supply indtcates a voltage between (0.0 r 1.0) volts.

18.13 Seinstall the ' A' power cord in the AC panel and unplug the

'n' pcwor cord.

18.14 Aerun the analog input test program and validate that the channel monitoring the 'B' +15 volt. power supply indicates a voltage betweert (Q.0 s 1.0) volts.

18 .15 Reinstall the 'n' power. cord in the AC panel.

18.15 Unplug the ' A' power cord of the -15 volt power supply monitored by the analog input module under test, where applicable, from its Ac panel.

18.17 Rerun the analog input test program and validate that the channel monitoring the 'A' ~15 volt power supply indicates a voltage of between (0.0 s -1.0) volta.

18 .18 Reinstall the ' A' power cord in the AC. panel and unplug the

'B' power cord.

18.19 Rerun ths analog input test program and validate that the channel monitoring the 'n' -15 volt power supply indicates a voltage of between (0.0 -1.0) volta.

3 13.2R Reinstall the 'E' power cord in the6 AL' panet. .

J PAGE,79 of 116 PAGER 4

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fer NUS CORP./

mALTIMORE CAS and. ELECTRIC CALVERT CLIFFS DATA AC UISITION SYSTER at COMPUTER PRODUCTS,. INC. (FT. LAUDERDALE 2/20/84 18.21 Unplug the 'A' power cord of the 125 volt power supply l monitored by the analog input module under test, where applicable, from its AC panel.

18.22 Rerun the analog input test program and validate that the I channel monitoring the 'A' 125 volt power supply indicates a voltage between (0.0 1.0) volts.

11 23 meinstall. the 'A' power cord in the. Ac panel ans unplug the

'B' power cord.

18.24 Rerun the analog input test program and validate that the channel monitoring the 'n' 12.5 volt power supply indicates a l voltage between (0.0 : 1.0) volts.

18.25 ReinstaII the 'B' power cord in the AC panel.

MODULES TESTED:

CHASSIS 8 SLOT 9 INITIALS CHASSIS S SLOT 9 INITIALE H- Ws 0 %L / /

/ /

) 18.26 Repeat steps 18.1 to 18.25 for all analog inputs in the )

cabinet wired to monitor cabinet power supplies. I CABINET PERFORMED BTs. U C .P .I..

POWER SUPPET l MONITORING VALIDATION WITNESSED BY k N.U.K.

l l

l If a non-conformance is noted during the cabinet power supply monitoring-valtdatton, the non-conformance wLil be disposttioned per Sectiort 1..,

i the non-conformance will be corrected, and the validation of the cabinet. power supply monitoring will be repeated on the modula where the non-conformance was noted.

i PAGE. 84 of 1.16 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP,/

BALTIt! ORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 RID SCM POWER SUPPLY MONITORING VALIDATION

~

18 .27 Use information from the analog input test computer operating instructions, Attachment 2, Appendix C, Section 6, and the follo. sing steps to answer the program prompts to run the analog input test program on the analog ' input gate module that is wired to monitor. RTD signal Conditioning Modula power supplies.

18.28 validate that the channels monitoring RTD SCM power supplies, where applicable, measure (+9.9 : +10.1) volta 18.29 Remove the first NTD signal conditioning module from its backplane connectoc with its hood still attached.

11.30 Allow thirty seconds or more to allow the filter capacitors of the analog input module monitoring the RTD SCM power supply to settle.

18.31 Rerun the analog input test program and verify that the channel monitaring the power supply of the RTD SCM removed from the baci?lsie 2sdicates a. voltage of. less than 1.0.

volts.

18.32 Repeat steps 18.29 to 18.31 on each of the RTD SCMs monitored by the analog input module under test.

18.33 Unplug the power cord of the RTD signalling conditioning chassis from the AC panel and reinstall the RTD SCMs removed from the backplane then reinstall the power cord. ,

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REMOTR I/O RARDWARE ACCEPTANCE TEST PROCEDURE fCr NUS CORP./

RALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM

)

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 i

MODULES TESTED:

CHASSIS 9 SLOT t IKITIALS CHASSIS 9 SLOT $ INITIALS g /

/ /

18.34 Repeat steps 18.27 to 18.33 for all analog inputs in t.he cabinet under test wired to monitor RTD SCM power supplies.

RTD SCM PERFORMED BYE Al/#

C.P.I.

POWER SUPPLE MONITORING WITNESSED BY: N.U.S.

VALIDATION /

i l

'. If a non-conformance is noted during the RTD SCM power supply monitoring validation, the non-conformance will be dispositioned per Section 3.,

the non-conformanew will be corrected, and the validation of the RID 3CM power supply monitoring will be repeated on the module where the non-conformance was noted. ,

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k REMOTE I/a BARCWARE ACCEPTANCE TEST PROCEDURE fer NUS CORP./

EALTINORE CAS' and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at. COMPUTER PRODUCTS, IHC. (FT. LAUDERDALE) 2/2/84 1

/

o CONTACT SENSE VOLTAGE MONITORING VALIDATION-( 18 .15 Configure control. FansL 61 as follows:

DEVICE ADDRESS SELECT : to address the first device code of the I/O controller containing the

. digital input module monitoring the 121 volts under test per Attachment 2,Section 6, and I Appendix 3.

INSTRUCTION KELECT & COR,. WAIT TEST, AND. IN UF CORNANT1 NORD t to select random mode, disable interrupts, and to address the module under test using Attachment 2, Appendix B, and Appendia C.

INSTRUCTION RATE . 50E range - vernier midrange 18.36 RESET the control panel.

18.37 validate that the bits, in the control panel Data Word Display, associated with the contact sense voltage are 05.

18.38 For input modules monitoring the contact sense voltage of

' Channel n' Up/ Down Pulse Counters, unplug both power cords of the 125 volt power supply supplying the contact sense voltage being monitored by the input module under test and validate that- the bits, in the control panel data word display, associated these pulse counter modules are OFF.

t 18.39 Yar input modules monitoring the contact sense voltage of suodules other than the ' Channel B' Up/ Down Pulse Counters, remove the hood from the 300/400 side of the signal conditioning module and validata that the bit associated mitte the module whose hood men disconnected is OPP". Repeat this for all =~* !1*s monitored by the module under. test PAGE E3 of 114 PAGES

3 REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fec NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFE DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 l

3 MODULES TESTED: l l

CNASSIS & S LOT t - INITTALS CHASSIS # SLOT f INITIALK l i

e lA /

/

a

/ . . _

/

3 18.40 Repeat steps 18.35 to 18.39 for all digital inputs in the cabinet under test wired to monitor contact sense voltage. i CottTACT SENSE

PERFORMED BYE WA W/=e_/ C.F.I.

PUT WITNESSED BY: N .D .S .

VALIDATION /

If. a non-conforsmance is noted during the contact sense voltage monitoring validation, the non-conformance wil.1 be dispositioned per Section 3., the non-conformance will be corrected, and the validation of the contact senso voltage monitoring will be repeated on the module where the non-conformance was noted. ,

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REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

, BALTIMORE GAS and ELECTRIC.CALVERT CLIFFS DATA ACQUISITION SYSTER I at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 )

19. VOLTAGE SENSING ANALOG INPUT GATE MODULE VALIDATION :

The purpose of this test is to validate the gross operation of the Universal High Gpeed tride Range Analog Input modules (021-5234) and their associated signal conditioning circuits (038-5097) and to validate the accuracy of the input module to signal conditioning module (040-5455) and the signal conditioning module to terminal strip (040-55201 or Uniform Temperatu,ra Reference Plate cabling (040-5512). It is not intended taL v&lkdate the

accuracy of IMS 4

analog input cards.

This validation is accomplished by connecting a voltage divider network to the terminals sourcing the analog input module, and applying a voltage to the divider. Then data is read from the analog input module using the Analog Input Test Computer and test programs. This data is validated against a table of voltages derivsd from the divider network and the voltage applied. (Reference Figure 9 of Attachment 1) 19.1 Set the programmable DC voltage standard to zero volts. :

L9.2 Install the 'BTSCA to Test cable / Connector Adapter * (00G-7077) on the selected BTSCA in the cabinet under test for those analog inputs terminated with BTSCAs.

, 19.3 Connect the Analog Input Test Divider / Connector for BTSCAs (000-7081) to the STSCA to Test Cable / Connector Adapter for

, STSCA terminated analog inputs. Connect the Analog Input Test Divider / Connector for UTRPs (000-7085) to the UTRP terminals for UTRP terminated analog inputs.

I L9 .4 Connect the output of the programmable DC voltage standard to the test divider inputs corresponding to the module under t test. l i

19.5 Set the programmable DC voltage standard to +4.070 volts i (voltage senadard. switch,settin6 : MC00 besidecimal). ;

19.5 Use information from the analog input test computer operating i instructions, Attachment 2, Appendix C, Section 6, and the following steps to answer the program prompts to run the- l analog input test program on the analog input gate module under test.

19.7 Run the Analog Input Test Program on the selected module for

100 sc'ans at Gain Code 8. Validate that the mean voltages of each channel scanned are within the following voltages

CE S = +(35 r 421 mr CE 4 - +(18 r 22) m7 CR 1 = +(33's 37) mV CN 5 = +(13 r 17) av i CH 2 = +(28 : 32) mV CH 6 = +( 8 : 12) mV ,

CH 3 = +(13 27) mv CH 7 = +( 3: 7) mV l f PAC.E 85 of 116 PAGES.

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> RSMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

i BALTIMORE GAS and ELECTRIC CALVERT CLIFTS DATA ACQUISITION SYSTER

) at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 MODULES TESTEDt CHASSIS i SLOT i I5ITIALS CRASSIS 9 SLOT & INITIALS'

) Lwt it 96/ /

S- t Ff \$ %.V / , /

tr- t ar t 14 Rt / /

Tr - i 4-) ,

is %/ ,

/

H-I f l IC. %/ /

/ -

/

( / .. ]

.~s

/ /

. / /

/ '

/

/ /

. / /

l-f

/- _/

19.8 Repeat steps 19.1. to 19.7 for all analog input inodules with voltage. sense taputa in the cabinet. under tast.

ANALOG IMPUT PERFORMED BYr MJ b_,d C.P.I.

s WITNESSED B 7 N .U .S .

VALIDATION

/

LL a non-conformanca La noted, during the voltage sensing analog input anodule validation, the non-conformance will be dispositioned per 7

Sectiott 3., the non-conformance will be corrected, and the validatiert of the voltage sense analog input monitoring will be repeated on the imodule whero the non-conformance was noted.

PAGE RE of Ils FAGET l

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l 3 REMOTC I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ l BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM '

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 1

20. VOLTAGE SENSING ANALOG INPUT GATE MODULE ACCURACY, COMMON MODC REJECTION, and SURGF. WITHSTAND CAPASILITE VALIDATION The purpose of this test is to validate that the accuracy and common mode rejection of a sample of the analog to digital converter module /

analog input gate module (021-0211/ 021-5234) pairs and associated signal conditioning circuitry (038-5097) and cabling are within the published CPI specifications for the products being tested Also validated is the surge withstand. capability of this sample of the 3 signal conditioning modules (038-5097). The diift/ stability of this sample will also be validated in section 23.

)

The validation of the accuracy and common mode rejectiorr are-accomplished by using the analog input test computer to run the analog Lnput. test prograar to acquLee data from the analog input module sets. First, the module set will be run with zero ccamon moda

) voltage to record the baseline noise on the inputs, then a common mode voltage source will be connected to the inputs to the gate module and the test program will be rerun to record the input noise with common mode voltage applied. The two runs will be compared and l

the dif ference between the baseline noise and the noise with common mode voltage applied must be less than specifiations derived frase the specifications at the module set. Then a precision voltage standard will be used to exc we the inputs of the gate module in parallel and the test program will be run to record baseline of fset in the channels then the precision voltage will be applied and the program

, will be rerun. The dif ference between the of fset run and the voltage applied must be within specifications derived from the specifiations

! of the module set. (Reference Figures 10 and 11 of Attachment 1) l The validation of the surge withstand capability la accomplished by simulating transducers with one kiloohm resistors between the HIGK and LOW input terminals to the module. Then a surge is applied to one side of the resistors. Data is not ac input module during the surge application. quired Afterf rom the the surgeanalog has beert applied, the accuracy and conaton mode rejection of the module set will be retested to validate that the surge did not affect the perfor==ae= at the @ le net iRateren".m Figure.12 af. Attachment, Ib 2G.I Select up ter five percent or at least one of the surge protected analog inputs modules with voltage sense BTSCA l terminations in the cabinet to have common mode rejection, (

) accuracy, surge withstand capability and drif t/ stability (in section 23.) validstion performed on them. ,

1 20.2 Install the 'BTSCA to Test cable / Connector Adapter' (000-7077) l on che selected BTSCK in the cabinet under test per M tmehment 2.

20.3 Install the 'Analo7 Input Unbalanced Test Termination /

Connector' (000-7079) on the 'BTSCA to Test Cable / Connector Adapter'.

PAGE 47 of.116 PAGEE l

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h REMOTC I/O HARDWARE ACCEPTANCE TEST PROCEDURE 'fCr NUS CORP./

P EALTIMORE GAS and ELECTRIC CALVERT CLIFFC DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 20.4 Connect the output of the AC/DC V-A Source between the bussed inputa (red /high lead) corresponding to the module under test on the unbalanced test termination / connector and the surge ground bus bar (black / low lead) in the cabinet under test.

20.5 With the AC/DC V-A source at zero volts, run the Analog Input Test Program on the selected module for 100 scans at Gain Coda 8. This is to record the baseline noise on the channels of the =rukte under teet.

20.5 Set the AC/DC V-A source to 600 volts RMS (1697 Y P-P), 50 Hr.

20.7 Run the Analog Input Test Program on the selected module for

( 100 scans at Gain Code 8. This is to record the increase in noise due to the commort mode voltage not rejected.

20.t set the common mode voltage source to zero.

20.9 Validate that the peak'to peak noise with the common mode voltage applied does not increase more than 2.7 millivolts for 021 5234-002 analog input gate modules, or more than 540 micravolts for 021-1234-003 analog input gate modules.

20.10 set the programmable DC voltage standard to outg.ut zero volts.

10 .11 Replace the ' Analog Input. Unbalanced Test Terminator /

Connector' with the ' Analog Input Parallel Input Test Connector' (000-7082) on the 'BTSCA to Test Cab',e/ Connector Adapter' .

2a .12. Connect the output of; the programmable DC. voltage m*=ad=rd, to, the input on the ' Analog Input Parallel Input. Test Connector' corresponding to the module under test.

20.13 Foc 021-5234-003 analog input gate modules, tilow a minimum of thirty seconds before continuing to allow the filter ;

capacitors to settle. ;

20.14 with the programe@le DC voltage standard at rero volts, run the Analog Input Test Program on the selected module for 100 1

scans at Gain Code 8. This is to record the baseline of fset

(,

on the channels of. the module undar test.

20.15 Set the, programmable.DC voltage standard for +0.070 volts I (programmable DC voltage standard setting r OlC00 hexa-I decimal). j l 27.If ror 021-5234-003 analog input gate moduler, allow e minimum of

! thirty seconds before cont.inuing ta allow the filter capacitors to settle. j l

i PAGE 85 af.116 FAGEE- l l

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1 REMOTE I/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BM.TIMORE GAS and ELECTRIC CALVEAT CLIFFS DATA ACQUISITION SYSTER .

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/20/84 '

J l 20.17 Rsran the Analog Input Test Program on the selected module for 100 scans at Gain Code 8..

20.18 Validate that the mean of each channel scanned with voltage '

applied less the mean of the same channel with zero volts l

l applied in step 20.14 is within +(49.91 : 70.09) millivolta.

28.19 sat. the programmable DC voltage standard for -0.070 volts. !

28.2G For 021-5734-003 analog input gate modules, allow a minimum of thirty seconds before continuing to allow the filter .

a v t* - a to settia.

20.21 Rerun the Analog Input Test Program on the selected module for 100 ecane at Gain Code E. ;

26.22 Validate that the mean of eactr channel scanned with voltage I applied less the mean of the same channel with zero volts l applied in step 20.14 is within -(69.91 : 70.09) millivolts. i 20.23 Set the programmable DC voltage standard to output zero volts. ,

20.24 For 011-5234-001 analog inpat gate el, allow a minimum of thirty seconds befora continuing to allow the filter !

capacitors to settle. .

20.25 Run the Analog Input Test Program on the selected module for 100 scans at Gain Code 4. This is to record the baseline offset.on the channels of the module under test. ,

20.26 set.the programmable DC voltage standard for +0.560 volt.s (programmable DC voltage standard setting : OE000 hexa- ,

decimal).

20 .17 For 021-1234 453 analog input. gate moduleg, allow a minimum at ;

thirty seconds before continuing to allow the filter i capacitort to settle. ;

27.2E Rerun the Analaqr Input Test Program on the selected module for ;

! 100 scans at Gain Code 4 24 .29 Validata that the mean of eacts channel scanned with voltage

( 1 applied less the mean of the same channel *sith zero volts

! ap lied in step 10.25 is within +(559.30 : 560.70) at livolts.

20.30 set the programmable DC voltage standarit for -0.560 volts.

24.1L ror 021-1234-401 analog input gate. modules, allow a minismus. at

, thirty seconda before continuing'to allow the fLLter .

j capacitors to settle.

I PAGE 89 of.11E PAGEE f

m wwm wme-+ qu-w*yn--p-----w-am-~- --,--,ym_w wmmm -

, -yw-ny m w, mg wmm wm,,m m m ,s,-mpyp ymm w mpa

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BP.tTIMORE GAS cnd ELECTRIC CALVERT CLIFFS DATA ACr)UISITIC. SYSTEN at COMPUTER PRODUCTS, INC. (PT. LAUDERDAI.E3 2/20/84 20.31 Ratun the Analog Input Test. Program on the selected module for 100 scana G Gain Code 4.

20.33 validate chat the mean of each channel scanned with voltage applied less the mean of the same channel with zero volts applied in step 20.25 is within -(559.30 560.70) millivolts.

20 .34 Set the prograsmaable DC voltage standard to output. seco volta 20.35 For 021-5234-003 analog inpu*, gate modules, allow a minimum of thirty seconds before continu.it4 to allow the filter capacitors to settle.

10.36- Run the Analog Input Test Program on the selected module for 100 scans at Gain Code D. This is to record the baseline offset. on the channels of the module under test.

f 20.37 Set the programmable DC voltage ~ standard for +8.960 volts (programmable DC voltage standard setting : E0000 hexa-decimal).

20.38 For 02.1-5234-003 analog input gate modules, allow a minimum of thirty seconds before contihuing to allow the filter capacitors to settle.

20.39 Rerun the Analog Input Test Program on the selected module for 100 scans at Gain Code 0.

20.40 validate that the mean of each channel scanned with voltage applied less the mean of the same channel with zero volts applied in step 20.36 is within +(f.950 e 8.970) volts.

20.41 set the programmable DC voltage standard for -8.960 volts.

20.42 For Q21-52J4-003 analog input gata modules,. allow a minimum of l thirty seconds before continuing to allow the filter capacitora ta set.t.la 2G.43 Rerun the Analog Input Teet. Progran na the malected. module for -

100 scans at. Gain cada 0 20.44 Validate that the mean of each channel scanned with voltage applied less the mean of the same channel with zero volts applied in step 20.36 is within -(8.950 0.970) volts.

20.45 set. the prograsosable DC voltage stande.ed to output zero volta.

PAGE 90 of. 116 PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fCr NUS CORP./

BALTIMORE GAS cnd ELECTRIC Ct COMPUTER CALVERT PR* DUCTS, INC. CLIFFS DATA ACOUISITION SYSTEM s

(FT. LAUDERDALE) 2/2/84 I

' 20.46 Replace the ' Analog Input Parallel Input Test Connector' with the ' Analog Input Unbalanced Test Terminator / Connector' on the 'BTSCA to Test Cable / Connector Adapter'.

> 20.47 Connect the red lead of the surge transient generator cable to

, the the bussed inputs on.the test connector corresponding to I

the module under test. Connect the black lead of the surge

> transient generator cable to the surge ground bus bar in the cabinet under test.

L 20.48 Ready the surge transient generator to output a surge per i Appendix D.

l 20.49 Depress the surge transient generator Start pushbutton to apply the surge voltage for two seconds.

[

20.50 Repeat steps 20.3 to 20.45 to validate that the module set under test continues to meet specifications.

f 1

l l

1.

( PAGE 91 of 116 PAGES w w . .. .

t REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE, GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/24 MODULE (5) EELECTED and TESTEDs i

CnASsIS 9 StoT 4 INITIALS CnASSIS 9 SLOT 9 INITIAIX st - w Il 9&/ /

~

/ /

/ _

/

/ /

1

/ _

l

/ /

I 20.51 Repeat steps 20.1 to 20.50 on all of the modules in the )

selected sample.

i VOLTAGE SENSING l ANALOG INPUT COMMON MODE PERFORMED BYs N2_o M- e su C.P.I. I l

REJ ECTION , /

ACCURACY, and AFFROVED Bf ^- N.U.S. f

/

SURGE WITHSTAND VALIDATION APPROVED BYa Mr ALW/t. dd;4- 5.G.E.

If a non-conformance is noted during the voltage sensing analog input common mode reject ton, accuracy, and, ausga withstand sapability J.,

relidation, the non-conformance will be dispositioned per Section the nort-conformance will be corrected, and the valide. tion of the voltage sensing analog input comanon r. ode rejection, accuracy, and surge withstand capability will be repeated on the module where the non-conformance was no*;ed. After the test is complete, an additional sample of five percent, or at least one of the voltage sensing analog input modules (with BTSCA terminations) will be selected and tested.

This will be repeated Lt anotaer non-enaf.ormance is identified in the second sample.- -

. I l

1 PAGE,91 41 116 FAfnEE 1

l NEMO!T r/O NARDWARE' ACCEPTANCE TEST FROCEDURE for NUS CORF./

l BALTIMORE CAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

. ....... ..- .~....- .. - - - - - .. - . ....- .-

21. RESISTIVE ERNSING ANALOG INPUT GATEL MODULE VALIDATION The purpose of this test is to validate the gross operation of' the analog input modules (021-5234) whose inputs are conditioned wth resistive thermal device bridge completion circuits (038-5108): to validate the accuracy of the analog input gate module to RTD signal conditioning module cabling (040-5505) and the RTD signal ennditioning module to terminal strip sab1 Lag (040-5511)r and to validate the gross operation of the resistive thermal device in the uniform temperature reference plate (040-5522) and the accuracy of the associated cabling.

l The validation of the analog inputs is accomplished by simulating resistive thermal devices with, resistors on the terminal strip l sourcing the input. circuitry, then monitoring the data read from the l analog input modules with the test computer and validating that the l

data read corresponds to the expected voltage from the RTD SCM per a table of voltage output versus resistance applied. (Reference Figure 13 of Attachment 1)

The validation of the resistive thermal device is accomplished by monitoring the data read from the analog input modules with the teet computer and validating that the data read corresponds to a voltage J corresponding to room temperature (assuming a room temperature range i of 70F to 85F).

11.1 Connect the appropriate RTD Resistor Terminations (000-7086 for

( 038-5108-100, 200 ohn F1, 32-350rr 000-7087 for 038-5108-101, 200 ohn Pl. 32-850Fr 000-7088 for 034-5108-102, 200 ohn F1, 32-110rs 000-7089 for 038-5108-103,10 ohn Cu, 209C) to the appropriate points on the selected RTD BTSCA in the cabinet under test per Attachment 2 escept on the channela i l wired to monitor the UTE RTD.

I 1

FACE 93 of !!6 FAGER <

(

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fer NUS CORP./

BAL'.21MORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITIObi SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDF;RDALE) 2/2/84 21.2 Run the Analog Input Test Program on the selected module set i for 100 scans at gain code 4. Validate that the analog inputs indicate voltages within the voltage range in the following tables (all values in millivolts)

(Each RTD bridge completion module has circuits for the conditioning of four analog channels. Thus the eight channel gate modules require two

, RID bridge completion modules, one for the first,four channels, and another for the second, four channels. This necessitates that the test program be run twice and the data from the SCM. not being tested be j

i igncred. )

I l

I (Note that some analog input gate modules are conditioned with only four '

L channels of RTD conditioning, thus the other four channels are unterminated and their data must, be ignored) .

(

' (The channels (of the 038-5108-100) wired to monitor the UTR RTD must indicate a voltage corresponding to the temperature of the uniform temperature reference plate which is assumed to be at room temperature of between 70F (19 millivolts) and 85F (27 millivolts) .)

RID TYPE = 20Q Ohm PL 200 Ohm FL 204 Olus F1 10 Ohm Cu l TEMP = 32 350 F 32 : 850 F 32 : 110 F -10 : 209 C P/N :

1 038-5108-100 038-5108-101 038-5108-102 038-5108-103

-+. _ .... _ .

CH 0 = +32 : +48 +64 : +96 +6 : +14 +2.0 : +3.0 CH 1 = +72 : +88 +144 : +176 +16 : +24 +4.5 : +5.5 CH 2 = +112 t +128 +224 : +256 +26 : +34 +7.0 : +8.0 CH 3 = +152 : +168 +304 : +336 +36 : +44 +9.5 : +10.5 l -

VOLTAGES (millivalts) OUTPUT FROM RTU BRIDGE COMPLETION CIRCUITS

\ .

l .

t PAGE 94 of 115 FAGES l

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM (FT. LAUDERDALE) 2/2/84 at COMPUTER PRODUCTS, INC.

MODULES TESTED:

CATE MODULE CW 0-3 RTD SCM CE 4-7 RTD SCM CHASSIS 9 SiLOT t CHASSIS 9 SLOT I INITIALS CHASSIS i SLOT 4

%lP~/

/

l /

/

r l

/

I

/

(

Repeat steps 21.1 to 21.2 for all analog input gate modules 1

l 21.3 with resistive thermal device signal conditioning in the I cabinet under test. l 1

ANALOG INPUT PERFORMED BY: BlMedM C.F.I.

C N .U .S .,

s n t WITNESSED BY +

VALIDATION

)

If a non-conformance is noted during the resistive sensing analog input validation, ths non-conformance will be dispositionso per Sect. ion 3.,

the non-conformnce wLil be corrected, and the validation of the resistive sensing analog input modules wiii ce cepeated on the module where the non-conformance was noted.

f

)

FAGE M of Ili PAGES

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

EALTIMORC CAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at COMPUTER PRODUCTS, INO. (FT. LAUDERDALE) 2/2/84 l

l 12. RESISTIVE SENSING ANALOG INPUT CATE MODULE SURGE WITHSTAND l CAPABILITY. VALIDATION The purpose of thLs test is to validate the surge withstand capability

' of a sample of the RTD signal conditioning modules (038-5108). This is accomplished by simulating RTD inputs on the input terminals to the module set, and first acquiring baseline / reference data from the analog input module. A surge is then applied to the inputs. Data is not acquired during tha surge application. Data is again acquired frou the analog input module af ter the surge application and the data is validated as not changing by more than a predefined limit.

(Reference Figure 14 of Attachment 1) 22.1 Select up to five percent or at least one of the surge ;

protected Analog Inputs with RTD signal conditioning l (021-5234 / 038-5108) to have the surge withstand capability l

l tested. Since two RTD SCMs are required to condition one I analog input gate module, two RTD SCMs will be surge tested !

i for every analog input gate selected. l 1

[

22.2 Connect the appropriate RTD Resistor Terminations (000-7086 for 038-5108-100, 200 cha F1, 32-350rt 000-7087 f or 038-5108e101, j 200 ohn P1, 32-850Fr 000-7088 for 038-5108-102, 200 cha F1, 32-110rt 000-7089 for 038-5108-103,10 ohn Cu, 209C) to

the appropriate points on the selected RTD BTSCA in the

[

eabinet under test per Attachment 2 except on the channels l wired to monitor the UTR RTD.

21.3 Run the Analo7 Input Test Program on the selected module set Validate that the analog

! for 100 scans at gain code 4.

inputs indicate voltages within the voltage range in the following tables (all values in millivolts) l (Each RTD bridge completion module has circuits for the conditioning of four analog channels. Thus the eight channel gate modules require two RTD bridge completion ;

modules, one for the first four channels, and another for the second four channels. This necessitates that the test program be run twice and the data from the j SCM not being tested be Lonored.)

(Note that some analog input gate modules are conditioned I with only four channels of RTD conditioning, thus the other four channels are unterminated and their data must be ignured).

l (The channels (of the 038-5108-100) wired to monitor the UTR RTD aust indicate a voltage correspondtng to the temperature of the uniform temperature reference plate which is assumed to be at room temperature of between 70F (19 millivolts) and S5F (27 millivolts).)

l PAGF, % of. 116 PAGES

REMOTE T/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 ETD TYPE = 200 Chm P1 200 Chm P1 200 che PL 10 Ohm Cu TEMP

32 350 F 32 450 F 32 a 110 F -10 a 209 C P/N : 038-5108-100 038-5108-101 038-5108-102 038-5108-103

....____......__+_.-.........+.............+......_..._

CH 0 = +32 : +48 +44 : +96 +6 : +14 +2.0 : +3.0 CN 1 = +72 : +48 +144 : +176 '

+14 : +24 +4.5 : +5.5 CN 2 * +112 r +128 , +124 a +256 +M : +14 +7.0 t +4 .0 CN 3 = +152 r +165 +304 r +336 +3F r +44 +9 .5 +18.5

; -=. +. z --

70LTAGES (mL111 volts) OUTPUT EMcM RTD BRIDGE COMPLETION CIRCUITS 22.4 connect the red lead of the surge transient generator cable ter the RTD test termination on the selected STSCA. Connect the black lead of the surge transient generator cable to the surge ground bus bar in the cabinet under test.

22.5 Ready the surge transient generator to output a surge per Appendix D.

27.6 Depress the surge transient generator Start pushbutton to apply the surge voltage for two seconds.

22.7 Rerun the Analog Input Test Program on the selected module set for 100 scans at gain code 4. Validate that the analog inputs indicate voltages within the voltage range in the table above (all values in millivolts) .

22.8 Validate that the means of the channels on the analog input module conditioned with the selected RTD SCM do not change by more than L bit between the pre-surge sample and the post-surge sample.

22 J validate that the peak to peak noise of the channels on the selected module does not increase by more than 1 bits peak to peak between the pre-surge sample and the post-surge sample.

I I

- - 1 I

PAGE 97 of LIG FRGEE l

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMO'l E GAS cnd ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM l at COMPUTER PRODUC"rS, INC. (FT. LAUDERDALE) 2/2/84

= _____ _ ______

NQDULES SELECTED and TESTEDs ,

GATE MODULE CH Q-3 RTD SCM CR 4-7 RTD SCM l CHASSIS 6 SLOT f CHASSIS f SLOT l CHASSIS 6 SLOT $ INITIALS l

-W /

/

l

/

f 12.10 Repeat steps 22.2 to 22.9 on all of the analog input / RTD signal conditioning modules in the selected sample. l l

l RESISTIVE SENSING PERFORMED BY WM C .F .I .

ANALOG INPUT 4 /

, SURGE WITHSTAND APPROVED BY: / 8 -C N .U .S .

CAPABILITY VALIDATION APPROVCD ST: A'b7" A /A /4 A d W _

B.G.E.

Isote that, due to design constraints, the inputs to the resistive thermal device bridge completion circuita. are not surge protected, but the output of the circuits is surge protected and will protect the analog input gate module.

If a non-conformance La noted during the restative sensing analog input surge withstand capability validation, the non-conformance will be dispositioned per Section 1., the non-conformance will be corrected, and the validation of the resistive sensing analog input surge withstand capability wiLI. be repeated on the module where the non-conformance was noted. Af ter the test is complate, an additional sample of five percent, or at least one of the resistive sensing

( analog input modules will be selected and tested. This will be repeated if another non-conformance is identified in the second.

sampie.

(

l PAGE S& of LL6. PAGES

l l

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for MUS CORP./

l BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/04 i

i 23. ANALOCi INPUT DRIFT / STABILITY TEST [

1 4

Tha purpose of this test is to validate that the sample of voltage sense !

analog input modules selected for common mode rejection, accuracy, i l

and surge withstand capability validation are within the CPI i f published specifications for dri.f t/ stability. -

2.1.3. Using bus wire, st. set the input terminals of the voltage sense analog input modules selected for cosus'n e mode rejaction, accuracy, and surge withstand capability testing . Connect the shorted channels to the surge ground bus bar la the cabinet under test.

23 .1 Allow the cabinet (cabinet subsystem) to stabtLine for a minimum of 2 hours2.314815e-5 days 5.555556e-4 hours 3.306878e-6 weeks 7.61e-7 months .

23.3 Run the Analog Input Test Program on the selected modules for !

100 scans at Gain Code 11 L l

23.4 Using the digital thermometer, record the temperature at the [

temperature transducer inside the cahtuet, under test.

23.5 Repeat steps 23.3 to 23.4 at two hour intervals four times.

1 i

e ;,

i I

l i

l 1

i PAGE SS at Ll4 FAGM I

a

}

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ ,

BALTIMORE CAS and. ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM i at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 '

t W e4 INLTIAL SCANS. TIMEt Q t.4 F o e TEMSt " 2 . 14 *O

)

(Enter neari voltage from scan below) l MODULE TESTED: CHASSIS 9 UT-) F l SLOT 9 I4 INITIALS:_IL /

)

CHAN Q l CRAN 1 l CEAR 2 l CHAN 3 l CHAN 4 l GAR 5 l CuN 6 l CHAN 7 1

l -A.m p.. no(l - i. s ~ I t. 7s~ l4 . ..u l i . u s. , l ...u o a_l-a.nc.

l MODULE TESTED: CHAssrs i sIor t INITIAt.se /

CHAN O l CHAM L l CRAN 2. l CHAN 3 l CHAN 4 l CHAN 5 l CRAN 6 l CHAN 7

_ . w__. . . . . w ._ . . _

f I I I I I I MODutt. TESTED: CHASSIS 9 SLOT 9 LNITIALSt /

CHAN Q: l CHAN 1: l CHAN 2 l CHAN 3 l CHAN 4 l CEAN 5 l CHAN 5 l CRAE 7

.v : :- : : :

l- I l- l l I I MODULE TESTED: CHASSIS 9 SLOT 9 INITIALS: /

CHAN O: l CHAN I l CHAN 2 l CHAR 3 l CHAN 4 l CHAK 5 l CHAN 6 l CHAM 7 1 -

l l l- l l l l MODULE TESTED: CMASSIS 9 SLOT'4 INITIALC /_

CNAN O l CHAN--w

- . _ w. - -

1 l CHAN 2 l CMAN 3 l CRAN 4 l CHAN 5 l CRAN 6 l CHAN 7

-- w. . -

. w.. . . . w.. . . _ .

1 I I I I I I

[ MODUIZ TESTED: CRASSTS S SIOr i INITIALS : /

CMAN O l CHAN I l CHAN 2 l CHAN 3 l CPAN 4 l CHAN 5 l CHAK E l cuAX 7 l l l l l l l

(

FAGE 100 of 115 FAGEE

EEMOTE I/O RARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAD and ELECTRIC CALVERT CLIFFS DATA ACOUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 _

jfl!.//f SECOND SCANr. TIME: f

29 TEMPS 30#C.

(Enter mean voltage from scan below and deviation from initial, scan under mean)

L MODULE TESTED: CHASSIS 6 E-lFl SLOT 9 Is INITIALS: $1 /

CRAN O l CHAM L l CEAM 1 l CHAN 1 l: CHAM 4 l CHAM 5 l CHAM 6 l :CRAN 7 0

<= :

~ 5.C lw - 1.cos a -t..s w ~3. % %J_ ' ~ f 9 tw_ 1. '!3 M_ *t.7c w M 7d e.J

-_l.294 ~ 0.l8 b -l.038 -6.(84 - 0.9 29 0.Tl 3 -l.2*LI -l.139 MODULE TESTED: CHASSIS 6 SLOT 4 INITIALS: /

CHAN O l CHAN 1;-- l CHAN

--.p.-

2 l CHAM 3 :_. l CHAN 4 l CHAN 5 l CHAN 6 l CHAN 7

- _.+ _ .... w .. ...p.....

=__ . . v-MODCLE TESTED.(N m IS 9 SLOT 4 INITIALS: /

CHAN 0 l CHAN 1 l CHAN 2 l CHAN 3 l CHAN 4 l CHAN 5 l CHAN 6 l CHAN 7

-+- p ,

4 MODOLE TESTED: CRASSIS 9 SLOT 9 INITIALS: /

1 CHAN O l CHAN 1 l CRAN 2 l CHAN 3 l CHAN 4 l: CRAN 5 l: CHAN-:'

6 l CHAN 7

MODUI.E TESTED: CHASEIS 9 SLOT 9 _

INITIALS: /

CHAN O l CHAM 1 l CEAN 2.l CHAM 3 l CHAN 4 l CHAN 5 l CRAN 6 l CHAN 7 y w 1

I MODULE TESTED: CHASSIS f SLOT $ INITIALS: /

CHAN 0 l CHAN 1 l CHAN 1 l CHAN 3 l;__CHAN 4 l CHAN 5 l CHAN 6 l :CHAN 7 - -

1 FAGE 101 of 116 PAGES l

l

REMOTE I/A HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE. GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

)

l THIRD SCAN: TIMEt I l '- l C 1 r, TEMPS 2.Q'(

(Enter mean voltage from scan below and devit. tion from initial scan under mean)

MODULE TESTED: CHASSIS $ k _ lEl SLOT $ f( INITIALS: Ak /

j CMAN Q l CHAM 1 l CRAN 1: l CHAN 3 l CHAN 4 l CHAN 5 l: CHAN 6 l: CHAN 7

. 4. WW .2.k V . }. 09 9, / _2.w2,Y _ C 9WW l

l ~ l . 0'?fu / 3. Il3 n / -2.69f a / /

-a 2N -/.6 / -1/N

/

'/.1/9

-d.3 9 3 -/./ 9 7 -/.fs 2 - /. ft$.

MODULE TESTEDr CHASSIS f SLOT f INITIALSt /

4 CHAN Q l CHAM L l CHAN 2 l CRAN 3 l CRAN 4 l CHAN 5 l CHAN 6 l CHAN 7

_ ____+________+________: -_ _ _ _ = + _ _ _ _ _ _ _ _ + _ _ _ _ _ _ _ _ + _ _ _ _ _ _ _ _ + _ _ _ _ _

l j MODut2 TESTEDt CHASSIS 6 SLOT $ INITIALS: /

, CHAN 0 l CHAN 1 l CHAN 2 l CHAN 3 ;l CHAN ---

4 l. CHAN__ _

5 -,l CHAN.6- -_

l CHANg 7

3- ,

MODULE TESTED: CHASSIS 9 SLOT $ INITIALS: /

i, CHAN O l CHAN L l CHAN 2 l CHAN z--___+_____;

3 l CRAN 4 l CHAN 5 l CHAN 6 l -_CRAN 7 =

+

, l MODULE TESTED: CHASSIS 6 SI4T 6 IRITIALS: /

CHAM 0 l CRAN 1 ; l CHAN 2-+_

l CHAN 3 l CHAN 4 *l CHAN 5 l; CHAN 6 l CHAN 7 MODULE TESTED: CHASSIS.9 SLOT 9 INITIALS: /

j CHAN O l CHAN 1 l CHAN 2 ;- l CHAN J l CNAM 4 l CHAN 5 l CHAN 6 l CNAN 7 .

l I

PAGE 101 of. L16 PAGER

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9- . - - , - .u

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3 REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fCr NUS CORP./ i BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYST::N at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

- =--- ___

FOURTH SCAN: TIME: "L ' 17 TEMPS 7. P ' C

) (Enter mean voltage frors scan below and deviation fross init.ial scan under mean) l

?

MODUCE TESTED: CHASSIS 9 TE- ( f / SLOT 4 _ll . INITIALS: b/-

CHAN Q l CHAN 1 ( CHAM 1 l CHAE 1 l CHAN 4 l CHAN 1 l CHAN 6 l CEAR 7 h

[. Y32 atl-2.Shi i /

J 417a i-3.22/d-1.1Hu v' l. 991 /n V - J.4sh

/

-l.29% V

(/ /

~

I.III -0.03G - 0.9 I L - 0 C2 5' -0.993 0.t y7 _f.9 C S~ (l. R 3 NoDULc TESTED: CNASSIS 9 SLOT $ INITIALS: /

CnAN 0 l CnAN 1 l CHAN 2.l CHAN 3 l CHAN 4 l CHAN 5 l CHAM 6 l CHAN 7

--____+_______,.____ _ + _______+ _______+________ ________

1 noDOLE TEsTEn: chassis 6 sIAT 6 INrrIALS: /

CHAN O l CHAN 1:----- l CHAN 2 ._ l CHAN 3 l CRAN 4 l CHAN 5 l CHAN 6 l CHAN 7

-+. -

== l MODULE TESTED: CHASSIS S SLOT # INITTALS: /

CHAN O l CHAN 1-+ l CHAN 2 :l CHAN 3 l CHAN 4 l CHAN 5 l CHAN 6- l, CRAN 7

1 MODULE TESTEDr CHASSIS D SLOT & INITIAL 3r /

I CHAN 0 -:

l CHAN 1_:l CRAN 2.l CHAN 3 l CHAM 4 l CNAM 5 l CHAN 6 l CRAN 7

)

~

! MODULE TESTED: CHASSIS 9 SLOT # INITIALS: /

i CHAN 7 l CHAN 1 l CHAM 2 l CHAN 3 l CHAN 4 l CHAN 5 l CHAN 6 l CHAN 7 l

i i

i l Fact 103 of 116 FACEE 1 .

REMOTE I/D HARDWARE ACCEPTANCE TEST PROCEDURE f:r NUJ CORP./

WALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

~

3] tL/f f- l TEMP MY FIFTH SCAN TIMC Lt 2-4 0 et (Enter mean voltage frora scan below and deviation from initial scan under mean)

MODULE TESTED: CHASSIS 6 TE- W / SI.OT t l 4 INITIALS: b/

Csam a l CnAR L' l CEAm 2. l Can 3 l CMAX 4 l CAAM 5 l CRAN & l CEu 7 * *

: 0

= <*. l 6 E s. J *2 . 89% d_ 1.lo4, / 3. A%/ .I,12 /m V .7,K/ab'1./,D/ d _l,0t h /

I.50 -0.07 3 7C6 0.390 ~

6.720 t0,7I6 -

/ .

phd ~ '. 7 3 /

., MODULE TESTED: CMASSIS 4 SLOT 4 INITIALS: /

CHAN Q l CRAN L l CRAM 2 l CHAN 3 l CHAM 4 l CEAN 5 l CHAM 6 l CHAN 7

= __+. ____________---_____~_______+_____

- - o m TE, m , C.AS m . $m . INImI . ,

Cau o l Can 1 l Can 2 l Can 3 l Ca n 4 l CnAN 5 l CaAN _____ __.

s l CHAN 7

__+___ _ __: ____+- - -- :

norxrJ.E TESTEDr CRA35IS & SICT 6 INITIA!.S /

CHAN O l CHAN 1 l CHAN 2 l CHAN 3 l CRAN 4 l CHu 5 l CHAN 6 l CRAN 7 i

i neDut.E TES EDr CRAssTE 6 _ stDE 9 IIITIALE: /

1

! CnAN o l CnAN t l Ca m 2 l Csu 3 l CmAN 4 l CEAN 5 l CHAM E l CRAN 7

) .

p =:

MODULE TcsTED: CHASSIS 6 SLOT 4 INITIALSt /a ,,,,,

CHAN Q l CRAN 1 l CHAN 2 l CHAN 3 l CHAM 4 l CHAN 5 l CHAN 6 l CRAN 7

) l _

l PAGE 104 of 118 PAGES 4 en e=- , . .m - g . e- w.- .,

y-, -- -- -- yr - - - - - c-w ---w-e w- , ----------T-+

REMOTE I/O EARDWARE ACCEPTANCE TEST PROCEIRTRE for NUE CORP./

! BALTIMORE GAS and ELECTRIC CALVERT CLIFF 5 DATA ACQUISITION SYSTER at COMPUTER PRODUCTS, INC. (rT. LAUDEADALE) 2/2/84 23 .6 Determine the channel with the most deviation Erom the init.ial l scaer for for each successive scan.

SECONDhCAN: CHASSIS 6 3- /#/ SLOT 0 /(

cnAn e 7 MAm. DEVIATION * /.78!

TNrno sCAw : CnASsIS e .5 /#/ stm e n l CEAN 6 7 MAI DEVIATION

d'# Y9 rocura scam : CxAstra e 5 -/// sIor i /4 CRAN 9 7 MAX. DEVIATION - /, IE 3 A I

/

J rtrTu Scan : CnASSIS t I

M / SIM 4 A

! CmAs 6 / nAx. OterATIDs - I 367 A V -

,i

/ ;

j ,

I I

j l

l I l 1

r

'l l l

^

1 i

I l l i I i

)

.i l

1 PAGE IOS of lit Facts

w REMOTE I/O tiARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

EALTIMORE GAS.and ELECTRIC CALVERT CLIFFC DATA ACQUISITION SYSTEM.

at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 l

23.7 Validate that the maximum deviation for each sampling is within

+/- 10 microvolts plus +/- 0.5 miccovolt.s per degree C change.

l in ambient temperature of the initial reading.

Second reading temp change [ C maximum allowable deviation =

(temp change (,

C- E .0.5 ur/Ci + 10 ur = /J. O ur maaimum measured deviation - / 7J // A /

Third reading a temp change [ C maximum allowable deviation =

(temp change [C X 0.5 uv/C) + 10 uv = /2 i uv mawinn= measured. deviation r - J./Vf/, /

/

Pourth reading s temp change Y C maximum allowable deviation =

(temp change V' C 1 0.5 uY/C) + 10 uy - /2 O uV maximum measured deviatiort : __ - / , ST 3 4

/

^

Fifth reading r temp change 5 C maximum allowahla daviation =

~

(temp hange h c X- 0 .5 uv/ C). + 10 uv =- /2.I. uv maximus ===ured. deviation z. - / 16 7 a /

'/

PAGE 106 OL lin PAGES l

1

- - . - - - - , - - . . . , - -- , ,._,---.,-n,- ., ---y..n- - - - - , ,---..----..-,n , ,--

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORPo/ )

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) _

2/2/84 ANALOG INPUT PERPORMED BYa E#- -

7* C.P.I.

DRIFT /

STABILITY TEST APPROVED BYr .

N.U.S.

APPROVED BYt Alor- M A/e# 444.__ B.G.E.

If a non-confonsance is noted during. the voltage sensing analog input drif t/ stability validation, the non-conformance will be dispositioned per Section 3., the non-conformance will be corrected, and the validation of the voltage sensing analog input drift /

stability will be repeated on the module where the non-conformance was noted. After the test is complete, an additional sample of five percent, or at least one of the voltage sensing analog input modules (with BTSCA terminations) will be selected and tested. This will be repeated if another non-conformance is identified in the second sample. -

l 1

FAGE IQ7 of 11E PAGEE

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURET for NUS CORP./

BALTIMQRE GAS and ELECTRIC.CALVERT. CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 AFFENDIX A TEST AND REPAIR LOG BOOK FORMAT Ther Test and Repair Log is used to record any anti all acceptance testing-of the data acquisition systent supplied by Computer Products, Inc. to NUS' Corp. and Baltimore Gas and Electric for the Calvert Cliffs power generation plant. It is also used to record any and all anomalies noted during this testing and.the corrective actiors taken to correct the anomalies.

Entries (in black ink) are to be made in the log as follower Identification of Cabinet under test :

Unit # (I or II), CPI cabinet # (1 - II);

Title of test procedure usrd for testing (or ' Continuation of Anomalies of Unit X Cabinet l' if an additica=1 paga la required to.1.ist the anrunalies);

Date test startedt Data test completed; Nama of test conductor printed and signed; Name of the witness printed and signedt If no anomalies are noted during the test, then NONE is checked in the anomalies noted section; If anomalies are noced, thers a description of the anomaly is entered and tha action taken to correct the anomaly is described. Tha last anomaly is fellowed by 'End of Anomalies'.

The following are sample pages of the log with. typical. responses.

PAC.E. LQE of 116 PAGES.

REMOTB I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

BALTIMORE GAS and. ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM' at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

- - - - THE FOLLOWING IS A SAMPLE ONLY TEST and REPAIR LOG for NUS / BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM supplied by COMPUTER PRODUCTS, INC.

l l

UNIT $ I CPI CABINET & - 3 t TESTED PER REMOTE I/O MARDWARE ACCEPTANCE TEST PROCEDURE dated 1/29/84-(procedurs used for testing)

DATE STARTEDs I MARCN 1984 DATE COMPLETED: 3 MARCN 1984 PERFORMED BY: (conductor's name) (conductor's sign.)

(printed) (signed)

WITNESSED ST: (auditor's name) (auditor's sion.)

(printed) (signed)

ANOMALIES NOTED and CORRECTIVE ACTION TAKEN (NON Es (X) )-

- - - - THE' PRECEDING IS A SAMPLE ONLY. **********

PAGE 109 of 115 PAGES e

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at. COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84

- - - - THE FOLLOWING IS'A SAMPLE ONLY. **********

TEST and REPAIR LOG for l NUS / BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM supplied by COMPUTER PRODUCTS, INC l

l l

URLT & II CPL CABINET & 9 l -

TESTED PER (CONTINUATION OF ANOMALIES NOTED)

(procedure used for testing)

DATE STARTEDs DATE COMPLETED:

PERFORMED BY

. (printed) (signed)

WITNESSED BYr l l (printed) (signed) ;

I ANOMALIES NOTED and CORRECTIVE ACTION TAKEN: (NONES ( );

5) Section 17. t Analoc to Digital Converter (9F3-11) (P/N 021-0211-008 S'/N C0099) out of _ calibration. Recalibrated ADC per AT' 021-0211

.and test rerun.

(END OF ANOMAI5ES) l

- - - - THE PRECEDING ~ IS' A SAMFIX OMIX., * * * * * * * * *

PAGE IIE of 115 PAGES

~~

RD40TE 100 H.N XCCEPTANCEM PROCEDURETGiT NUS CORP. /- ~

BALTIMORE GAS cnd ELECTRIC CAINERT CLIFFS DATA ACQUISITION SYSTEM ct COMPlTTER PRODUCTS, INC. (Fr. LAUDERDALE) 2/2/84 APPENDIX B CPI RTP C0ffrROL PANEL DES.'RIPTION AND OPERATING INSTRUCTION

SUMMARY

Tho following is a condensed descriptiun arx1 summary of operation of the CPI RTP7505/05 Control Panel (P/N 070-0044) required for the parformance of this acceptance test. For more information refer co CPI Technical Manual # 980-0070-044.

The RTP7505/05 Control Panel is used tc provide an easy to use method of exercising the various inputs and outputs of equipment connected via the RTP bus. Connection to the bus is through a ribbon cable connected from slot e5 of the control panel to the 'I/O Bus In' slot of the first chassis in the I/O string. A computer may be connected to slot #1 of the control panel allowing either the computer or the control panel to access the peripheral equipment attached to the RTP I/C bus.

The following controls and indicators are used on the Control Panel:

1. MAN / COMP (Manual / Computer) switch

2. DATA HORD DISPLI.Y

3. INTERRUPT VECTOR DISPLAY

4. OUTPUT HORD SELECT switches

5. COMMAND HORD SELECT switches

6. CONTROL DISPLAY

7. INSTRUCTION RATE controls

8. DEVICE ADDRESS SELECT switches

9. INSTRUCTION SELECT sw!tchea

10. RESLT switch -

O PAGE 111 of 116 PAGES

l REMOTE I/O HARDWARC ACCEPTANCE TEST PROCEDURE for NUS CORP./

RALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM.

at COMPUTER PitODUCTS, INC. (FT. LAUDERDALE) 2/2/84 APPENDIX & cont'd.

l The MAN / COMP (Manual / Computer) switch is a two position switch which is used to select the operating mode of the RTP Control Panel. When the switch is placed in the Manual position, the control panel is set to the manual mode of operation and the computer is disconnected f rom the RTP peripheral devices connected. to the control panel When the switch is placed in the Computer position, the computer is connected.

thru the control panel to the peripheral devices on the RTP I/O bus.

The DATA WORD DISPLAT provides a visual display of the data leaded intar the input buffer. Gixteen light emitting diodes ( LED's) , represent f the 16 data bits. Each data bit will light in the presence of a 'l',

and be dark in the presence of a 'O*. The MAN / COMP switch selects the source of the data to be loaded and displayed. In the Manual mode, the data displayed is the result of a transfer f rom the

( selected peripheral device by an input transfer function from the control panel. In the Computer mode, the data displayed is from the computer. )

The INTERRUPT 7ECTOR DISPLAY provides a visual display of the data bits )

repremnting the address of the current interrupt vector from the-selected peripheral. Ten light emitting diodes (LED's), represent the 10 data bits. Each data bit will light in the presence of a 'l' , j and be dark in the presence of a 'O' . The data displayed is the '

result of a transfer from the selected peripheral device by an Interrupt Query (INT ORY) instruction from the control panel.

The OUTPUT WORD SELECT' consists of 16 two positiorf toggle switches, representing the 16 data bits, which are used to format an output data word. In the Manual mode, the data word is transfered to the selected peripheral. In the Computer mode, the data word La transferred to the computer during a DATA INPUT instruction addressed to the first device address of the control panel. The UP position of each switch represents a 'l', and the DOWN position represents a 'O' .

The COMMAND WORD SELECT consists of 16 two positiorr toggle switches, representing the 16 data bits, which are used to format a command data word In the Manual mode, the data word is transferred to the selected peripheral.. In the Computer mode, the switches perform no functiort. The UP position of each switch represents a. *l.' , and. tha DOWN position represents a 'Q* .

FACE 112 of lif FAGEE

_ , . . , _ . ~ _ _ . -

,.___.,_.m - - m. , , , , . _ .

REMOTE I/O HARDWARE ACCEPTANCE. TMST PROCEDURE. for NUS CORP./

SALTIMORE GAS and ELECTRIC CAT. VERT CLIFFS DATA ACQUISITION SYSTEM-at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 APPENDIX. E cont' d The CONTROL WORD DISPLAY provides a visual display cf the status of various functions using 6 1~ight emitting diodes (LED's), to represent the 6 functions as follows:

DEV SEL - The Device Select display, when lighted, indicates that the device address switches in one. of the RTP peripheral devices connected to the control panel fr set to the address corresponding to the setting of the DEVICE ADDRESS SELECT switchem This display is only active in the Manual mode INT - The Interrupt request display, when lighted, indicates that one or more RTP peripheral devices connected to the control panel are requesting interrupt service. The priority of the interrupts is determined by the electrical proximity of the devices to,the control panel. Interrupt requests are always reset by an INTERRRUPT QUERY instruction, and depending on the type of device, by either an INPUT, OUTPUT, or COMMAND ia= &_iction.or Master Reseh. Ttds, display is only active in the Manual mode.

DATA RDY - The DATA ready display, when lighted, indicates that the peripheral device being addressed is in a ready state.

Notes the DATA RDY indicator actually monitors the RTP TEST RETURN line. This display is only active in the Manual mode.

RUN - The RUN display, when lighted, indicates that an instruction is in the instruction register and is baing executed.

MAN - The Manual display, whett lighted, indicates that the control panel is in the manual mode.

CDMF = The Computer dispImy, when lighted,. indicates tnat the control panel is in.the computer mode l The INSTRUCTION RATE controls concist of a six position rotary switch designated RANGE and a potentiometer designated VERNIER. The overall instruction rate can be varied, usicg the two controls, over the total range of about 0.5 to 500,000 instructions per second.

RANGE. - The ' RANGE selector switch is designated 5, 50, 500,SK '

(5000), SOE (50,000), and.500E (500,000) which define the nasiaal. instruction rate per second for each range. .

VERNIER - The VERNIER potentiometer varies the instruction rate within each range from the maximum rate down to the minimum rate for that. range.

Pact II.T of IIS FAGFX

l l

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./ )

EALTIMORE GAS and ELECTRIC CALVERT CIJFPS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 APPENDIX B cont' d i

The DEVICE ADDRESS SELECT consists of 6 two position toggle switches representing the 6 data bits, which are used to format the DEVICE ADDRESS lines on the RTP I/O bus. Thesa switches are only active in the Manual mode and'are designated 32, 16, 8, 4, 2, and 1. The UP l position of eac.tt switch regrasen*.s a ' L* ,, and. the DOWE position.

represents a '0*

The INSTRUCTION SELECT consists of 5 three position toggle switches with an I.ED indicator associated with each switch The five switches are used to select Manual mode instructions to be executed and have no function in the Computer mode.

Four switches, Command, Output, Interrupt query, and Input each have three positions : UP - (locked) allows continuous execution; CENTER -

skip execution (or no execution)r and DOWN - (momentary contact with spring return) single cycle execution.

The WAIT TEST / WAIT INT switch is also a three position switch. The UP position (WAIT TEST) causes a wait in the execution sequence until the test return line tests ' ready' . The CENTER position causes a skip or no execution, and the DOWN position causes a wait in the execution sequence until an interrupt request is initiated from one of the RTP peripheral devicer.

Any of the four instructions COMMAND, OUTPUT, INTERRUPT QUERY, or INPUT, can be single cycle executed in any order manually. When any of the instruction select switches are set to the up position '

(continuous execution), the instructions are executed in the-following order COMMAND, OUTPUT, WAIT TEST / WAIT INTERRUPT, INTERRUPT QUERY, INPUT. When the last belected instruction is executed, the sequence starts over are cont.inues until Lt is stopped. l or the switches are changed., l Each switch has a IIn associated. with. Lt whb h Lights during esecution of that particular instruction The RESET switch is a momentary contact witir spring return switch, which when depressed, resets the logic circuitry in the RTP Control Panel and also causes an I/O Reset to all peripheral devices ort the RTP I/O bus. This switch is only active in the Manual mode.

8 PAGE 114 of Ils FACES m & = e -w e w=

+- - .

-r-- -- - - - - - - - - - - - . , _ . , --_ ,m, , , , , , - . - - , - - _ -.----.--.-,,.=---y ---

f

.I J REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE far NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/04 f'

j APPENDIX C PRYSICAL. SLOT EUMBER to SLOT ADDRESS CROSS- REFERENCE TABLE

!! mEDuMomr ACCESS 9 UNIVERSAL I/O CONTROLLERS UNIVERSAL I/O CONTROLLERE (070-0004 & 040-5462) (Q70-5081)

I SEOT ADDRESS SEOF ADDRESS' (binary) (deciraal) (binary) (decimal) 6 0004 00 10 0000 00 7 0001 01 11 0001 01 8 0010 02 12 0010 02 9 0011 03 13 0011 03

, 10 0100 04 14 0100 04 11 0101 05 3.5 0101 05 12 0110 06 16 0110 06 13 OIII 07 17 0111 07 14 1000 08 15 1001 09 16 1010 10

- 17 1011 11 18 1100 12 19 1101 13 20 1110 14 21 1111 15 Thase addresses (binary) represent data. bits 12 - 15 of the (*nemand Word.

wherr used to address an option card.,

1 i

l l

l l 1

i PAGE 115 of 116 PAGER t

- . . - . . e= .

- - ,,,-, - - ,q -w w -,,m.,, -e e -- ,, --g --,,,,.pe-mw--,, ,

_,,__-,+_y,,--,,-~_----,---~-,---e a w_y,,_m,, - -

-m-w--p --,

REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE fcr NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (FT. LAUDERDALE) 2/2/84 APPENDIX D OPERATING INSTRUCTIONS AND CONFIGURATION FOR TEST oft the VELONEX SUEGE TRAMSIENT GENERATOR

- * *

m e * * ** *

e e n e s ** s e e ee e e e ** * *** * *e s ****** * ***

m e s * ** m e e.n o m e * *******

THIS GENERATOR IS CAPABLE OF OUTPUTTING VOLTAGES THAT ARE LETHAL.

USE EXTREME CAUTION AT ALL TIMES WHEN USING THIS GENERATOR.

- e .......e****** e***e****eene*****e eeee**emesse eeeeo****eeeeeee.

This piece of test equipment is used to generate surge transients. The surge transient required for thir test is defined by IEEE Standard 6 472 (' Surge Withstand Capability Testing') . Configure the generator as foIIowe to generate the required surge transient.

Set the BURST MODE selector switch to '2Jt LINE FREQUENCY' r set the OUTPUT TIMER MODE selector switch to ' TIMED OUTPUT'; set the OUTPUT l TIMER DURATION control to '2 seconds'; and set the SOURCE IMPEDANCE l selector switch to '150 OHMS * . The settings of the BURST FPEQUENCY and. BURST PHASE controls art ignored in this operating mode.

Install a connector on tha LOW OUTPUT terminal to connect the LOW OUTPUI

to the chassis ground (connected internally to the connector) .

Install. a 'HV connector to alligator clip cahle* to the HIGH OUTFUT terminal.

Depress the whits POWER Ott pushbuttors: to put the generator in standby mode Tts ready the generator for generatisus a surge transient, connect the !

output cable to the item to be tested (black to the surge ground l reference and red to the point (s) to be tested); depress the two red i HV ON pushbuttons simultaneously; adjust the OUTPUT AMPLITUDE control, to the full clockwise position To apply the surge transient, depress the START pushbutton, 'will eeuse a dangerous high voltage to be present at. the outpuu the generator for two seconds. USE CAUTION. 1 i

l To put the generator back into standby mode, push one of the red uv ON pushbuttons.

PAGE 111 of 115 PAGES

-- .---------% -..-.--y ---.w. - - -- -- -- - - - . , , . - -,- -----,-,,y--

REMOTE I/O BARDWARE ACCEPTANCE TEST PROCEDURE far NUS CORP./

BALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PRODUCTS, INC. (PT. LAUDERDALE) 2/2/64 ATTACHMENT 1 TEST CONFIGURATION DRAWINGS The follcwing figures are drawings depictirig the conElquration of test equipraent used to perforar the dif ferent sections of the- procedure 1

e

' CDFIROL PANEL SI .

f 070-0044

+= -+- -

lI/O CABLE l

+-+314-0001 +-+

. \ /- -

UNIVERSAL I/O CONTROLLER f 070-0004 SPEC REIAY OUT MOII.

000-7066 . . .

DIGITAL TEST

+-+ CABLE M

\ 000-7080 /

. % _--+__ +

lBTSCA/ CONN. ADAPTER l

+-+ 000-7077 +-+

\ - -

/

_ - ---+

l DIGITAL BTSCA l=== = ===++

SYSTEM l

UNDER l l 125 VOLT l TEST +-+ +-+ P .S .

[ \ / :

I r SIGNAI. CONDLILONING CHASSIS

( : :

l DIGITAL S.C.M. l l l

[ l l I

+-+ +-+- l

\ /

r

^

L l O.I. DIT. IN. MOD.l r/O CONTROLLER

{

.lI/O CABLE l

+-+314-0001 +-+

[

. \. ./ .

. CONTROL PANEL $2 .

070-0044 )

[

{

OPTICALLY ISOLATED DIGITAL INPUT VALIDATION <

FIGURE L r--. -.

L _ _ _ _ _ _ _ _ _ _ _ . _

l l 'ScaGE TFANSIENT i asmEmaTom ,

: t ;

l : :

v. .

DIGITAL SURGE TEC

+ =+- CONN. +-+

\ 000-7078 /

lBTSCA/ CONN. ADAPTER l

+-+- 000-7077 +- ,

\ / v l DIGITAL BTSCA l l'-SURGE GNU l SYSTEM : ;- - -+----+ -+

UNDER l l TEST +-+ +-&

f \ /

l :

SIGNAL CONDITIONING CHASSIS

( '

MGITAL 5.C.M.

I I

~ +-+- ,

\ '

/

l 0.I. DIG .JR . MOD. l I/O CONTROLLER lI/O CABLE l

+-+-314-0 0 01 +-&

\ /

CONTROL PANEL $1 070-0044 OPTICALLY ISOLATED DIGITAC INFUT r SURGE WITHSTAND CAPABILITY VALIDATION L

FIGURE 1 y

1 s

J i

l

' CONTROL PANEL f1 .-

h 070-0044 l

-+- - ; -9 l r lI/O CABLE l b +-+314-0001 +-+ .

\ /

UNIVERSAL r/D CONTROLLER

070-0004

.y :

SPEC RELAY OUT MOD.

000-7066

^

DIGITAL TEST

+= + CABLE +-+

\ 000-7080 /

+_--_,.._____ .+.___+

l8TSCA/ CONN. ADAPTER l

+-+ 000-7077 +-+

\ /

-+ = --_ -_ : _

l' DIGITAL BTSCA l=========++ ]

SYSTEM : :' - :-

UNDER l l 125 VOLT TEST +-+ +-+

( \ /

P.S.

j 4

; )

r SIGNAL CONDITIONING CHASSIS l OPT. ISOL. S.C.M.

l I I

) +-+. +-+.

\ /

) : : : : . --+.

Ic.O.s_ oIG.In. non.t:

]

) -

I/O CONTROLLER lI/O CABLE l '

+-+314-0001 +-+

\ /

~ ' -

CONTROL PANEL $2 .

070-0044 1

CHANGE OF STATE DIGITAL INPUT VALIDATION FIGUEE 1 e

see m s- e o , ,

b 5

\ .

F F SURGE TRANSIENT t GENERATOR l

Y

0 t-DIGITAL SERGE TEST

+=> CONW. +-+

\ 000-7078 /

BTSCA/ CONN.kDAPTERl

+-+- 000-7077 +-+ .

- \ / 7 l DIGITAL BTSCA l l SURGE GNDl SYSTEM : -------+- + -----+

UNDER l [

TEST +-& +-+

\ /

-+ --+

SIGNAL CONDLTIONING CHASSIS l OPT. ISOL. S.C.K.

l l l

+-+- +-*

\ / "

/ lC.O.M. Ric.IE. MOD.(

l I/O CONTROLLER lI/O CABLE l

+-+314 -0 0 0 L +-+-

. \. T T

l CONTROL PANHL 61 070-0044 CRANGE OF STATE DIGITAL INFUT SURGE WITHSTAND CAPABILITY VALIDATION FIGURE 4

)

CONTROL PANEL $1 070-0044 lI/O CABLE l

+-+314-0001 +-+

\ /

UNIVERSAL I/O CONTROLLER

070-0004

- - __ = _ : --

SPEC RELAY 00T MOD.

000-7067 l

' DIGITAL

) TEST

+-+ CABLE +-+

\ 030-7080 /

w_____ _ +____+

lBTSCA/ CONN. ADAPTER l

+-+ 000-7077 + \ /

.l DIGITAL BTSCA l=========++

SYSTEM .

r: :

UNDER l l 125 VOLT TEST +-+ +-+ P.S.

\ '

/

SIGNAL CONDITIONING CHASSIS l

i l DIGITAL S.C.M. l 1

+- : : :

1 I

+-+- +-+-

\ -

/ <-

l QUAD PULSE CNTN, l i

I/O CONTROILER

[ : :

lI/O CABLE l

+-+314-000L'+-+

l \ /

--+

CONTROL PANEL f2 070-0044 p.

QUAD PULSE COUNTER VALIDATION TIGURE i

i

, 4-SURGE TRANSIERT ~

GENERATOR

+ *

-t l H- .

v.

7 DIGITAL SURGE TEST

+-+- CONN. +-+

\ 000-7078 /

w ___+._ ___...,____4 lBTSCA/ CONN. ADAPTER l

. +-+-- 000-7077 %

. * \ .

Y .

l DIGITAL STSCA l l SURGE GNDl SYSTEM

-- t -t -- -- t : ---+

UNDER l l TEST +-+ +-+

\ /

3 SIGNAL CONDITIONING CHASSIE l DIGITAI. S .C.M. l I I

+-+ +-+-

l \ /

-+

l QUAD PULSE CNTE. l l

I/G CONTROLLER. -

i lI/O CABLE l j

+-+314-0001 +-+ i

. \. ./ .

l

, CONTROL PANETL 02 l 070-0044 .

QUAD PUESE COUNTER SURGE WITHSTAND CAPABILITY VALIDATION FIGURE.&

l

l f .

- F

, CONTROL PANEL 81 ,

! 070-0044 l -

: : 0 lI/O CABLE l

. +-+314-000L +-+

l

\. :

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l GEIVERSAL r/t2 CONTROLLER l

070-0004 1 : _-_

r l

SPEC' RELAY OUT MOD.

l 000-7067 1 ; . .

DIGITAL TEST

+-+ CABLE +-+

\ 000-7080 /

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+-+ 000-7077 +-+

\ /

l DIGITAL BTSCA l=========++ *

! SYSTEM b : -

i : ?? -^-

l UNDEA l l 125 VOLT I TEST +-+ +-+ l

( +

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l-l l l l

+-+- +-* *

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l OPT ~. ISOL. S'.C'.M. l

. . . . \

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+-+-314-0 0 01 +-+-

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l CONTROL PANEL 61 070-0044 l

1 UF/DONK PUISE COUNTER l SURGE. WITHSTAND CAPABILITY VALIDATION FIGURE 8 )

I l

l

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[ VOLTAGE STANDARD (

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+---+--+--+ ,

P VOLTAGE nIvroEn. '

TEST L CONN.

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\OR 000-7085r/

lBTSCA/ CONN. ADAPTER l

+-+ 000-7077 +-+

^

\ /

t l ANALOG BTSCA / UTRPl

} SYSTEM +----+ - ----+- - +

UDDER l l TEST +-+. +-+ l l

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1 ANAtoG IN. s.C.x. I

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l ADC & A.I. GATE l I/O CONTROLLER

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}

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l ANALOG INPUT.

l TEST COMPUTER

, VOLTAGE SENSING ANALOG INPUT GATE VALIDATION FIGURE 9

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l 1

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CONTROL PANET. 42 -

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070-0044

lI/O CABLE l i

+-+314-5046 +-+

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ANALOG INPUT TEST COMPUTER VOLTAGE SENSING ANALOG INPUT COMMON MODE REJECTION VALIDATION FIGURE 1CL

1 l

l

, i l

I r i

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l l VOLTAGE STANDARII l- l l1 VV - -

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PARALLEL IN TEST

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YOLTAGE SENSING' ANALOG IMPUT ACCURACY VALIDATION FIGURE 11 4 e. *.e ew.mw g e >++ we. wo e w...-. ..- -, , . , , , , _._ - , _ _ r _ . -- ,

l SURGE TRANSIENT GENERATOR l : - - -

V l

^

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./ --:

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l ANALOG BTSCA l l SURGE GNDl SYSTEN : + ----+---+ +-------+

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l ANAt4G IN. S.C.M. l

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l CONTROL PANEL $2 070-0044 lI/O CABLE l

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4

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1

l .

l l RESISTOR TERMS. l

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RESISTIVE SENSING ANALOG INPUT VALIDATION FIGuns.L3

l L

1 i : :

l

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l 7

l RESISTOR TERMS. l

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l I I M M l

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l ADC & A.I. GATE l l : -

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lI/O CABLE l

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\ -

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l . : : :

l ANALOG I.NPUT

, TEST COMPUTER ^-

RESISTIVE SENSING ANALOG' INPUT SURGE WITHSTAND CAPABILITY VALIDATION FIGERE 14

1 REMOTE I/O HARDWARE ACCEPTANCE TEST PROCEDURE for NUS CORP./

EALTIMORE GAS and ELECTRIC CALVERT CLIFFS DATA ACQUISITION SYSTEM at COMPUTER PAODUCTS, INC (FT. LAUDERDALE) 2/2/84 l l

i l

1 1

l ATTACEMENT' 2 CABINET COilFIGURATION DRAWINGS l

l l

(To se SUPPLIED PRIOR TO TESTING) e 1

i l

l 1

i i

I I

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g I 1F4 C0027 I NES I 075-0053-005PI BTSCA, ANALOG I 1F1 1 17 I q.----------- g --g--- --- ------g --

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date Printed 3/12/04 g====...........................................................=======...........................................................g

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C0147

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__________g____...._____________- --- ==__ ____ ====________________,8 i 1F3 1 7I 1F1 1 14 I C0195 1 g_________g______q_-_______g______s__.__________,I __-____ ____-__ ___---_____-________===040-5455-0128 _____ --,I CABLE, SURGE PROTECTION CARD TO ANALOG INP

_-_______________________q l 1F3 8I IF1 1 15 I I 040 CABLE, SURGE PROTECTION CARD TO ANALOG INPUT CARD CO202 g_________,I______g_________g _____g___________._q_____-5455 _0128 1_____ ___.g_____________--_______.._____________-. .________________________,I I IF3 I ?I IF1 16 i 040-5455-0118 i CABLE, SURLE PROTECTION CARD TO ANALOG INPUT CARD g_--______g______q_________,1_-____,I _____________g_____________-_g------______ _____.______________- -___- = ________ - C0183 ,I ___

I i 1 I I I I g_________g______g_________g______g__________-__g_______-_______g_-_____________ -__.==_- __..____________________________________,I I IF1 I 4I i 1 7411/60-000 g _ _ _ _ _ _ _ _ _ g _ _ _ _ _ _ g _ _ _ _ _ _ _ _. g _ _ _ _ _ _ g _ _ _ _ __ __ _ _g__________________

1 021 0004 ____ _ _ _ g _ _ _ _ _ _ _ _ _ _-0 0 0E I R ES IS T O R T E R r ~t 4 T OR- -C- AR _ - D- C0035 ----- ,1 I I I I I I I g_________g._____g_________g______g_____________g________-_____-g_______.- __--__________________- ------- -- __________________,I I I I I I I I I g_________g______g.________g______g________--___g_______________g_____________________ - -===- __ _ .

__g I I I I I I

,I_________g _____g_________g______g ____________g_______________g_________________________________ ___________----- - - - _ _ ,I 1 I I I I I I I g_________g______g_________g______g___ ---------t---------- --l----------------- ---------- -- =----- -

t i I I I I I I g.._______g______g_________g._____g_____________g_______________g________________________________- - _______ --_- ______________,I I I I I I I I I g...______g.___._g_________g______g____.________g _____.____.___g_.____________.__________________________________________. ______g I I I I I I i g_________g______g_________g______g_____________g_______________; - - _____ -- _-- __________,i I I I I I I I g_________g_. .__g_________g______g_____________g-_-_-______.___g_________________________________--- ____________-- -

--_ ,I j i i I I I I I I i

________-s_-____g_________s______g_-____.______t_-__-__________s__________--___________ =,- =____ ______________--_- --

==q I I I I I l* I g_________g______g_________g______g________.____g____________--g________________________- =--- - ____

- _ ,I I I I I I I I I I..=......g......g.........g......g.............g...=...........g.=.f================== ====t==========f==========================f I I RELEASED I DATE I COMPUTER FRODUCTS I i

I I ENG : I I FORT LAUDERCALE, FLORIDA

g_______________________g__________g_____________._.__________,I

1 RELEASED I DATE I TITLE ! 1 I I MFG 1 1 1 I I l-----------------------l---- 1 SYSTEM I/O CABLE I

,I_____g-_____________________________-----l------t------l-----------I COTES : 1 D9AWM I F. LEMKA I DATE I i i 11/11/83 i CONFIGURATION I I REV I DESCRIPTION I CHKD I APPD I DATE l-----------------------4----------t I g_____g___________________________________g. ____g______q.__________t CHECKED : I DATE 1 UNIT 2 I I B I i 1 I 11/19/83 I I I g_____g___________________________________g._____g______g___________g__.. -

=--__________g_________ ,I 3 I C I I I i 12/20/83 1 ENGINEER : 1 DATE t--------------------l-----t g_____g__________________________.________g______g______g___._____--I 1 1 DRAWING NUMBER I REY I

' I I I I i 01/02/84 1-----------------------t----------t AB 283350 i E I l__D___{___________________..______________{______g______g.----------t APPROVED : I DATE i----------- -

---l-----i i E I I I I 01/13/84 I I I SHEET 1 0F 100 SHEETS I g.... g..........=........................g......g......g2..........g.......................g..........g..........................g

l DALCAL C.ard TEST PROGRAM for B. G. E. ACCEPTANCE - Vorcion 10-JAN-84 $g eg74,p7

,Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63) ( 48) 1 !

Entor the slot address of the A/D card. < 0, 15> ( 0) : 1 t3.ge,,)

oEntor the Bit Resolution of the A/D card. < 13, 14> ( 13) : 14 Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) : O d['" M"l

' Enter the slot iddress of the first card. < 0, 15> ( 0) : 0 33g7 g ,3 Entor the number of cards to be scanned. < 1, 15> ( 1) :

F SCAN Types - (0) = OFFSET eg 3 (1) = PLUS POLARITY

]

(0) = MINUS POLARITY IE - \Y I (3) = SYSTEM MONITOR Soloct SCAN TYPE. < 0, 3> ( 0) : O s),q-q lEntor the sain code for the desired system gain. < 0, 3> ( 1) : O r 3Entor the desired number of scans. ~ 1, 32767> ( 100) :

1i Roturn the RTP Control Panel to the COMP mode. RETURN to continue ?

i q

CARD CHANNEL NEAN P-P J

0 0 150.000 uV 1.050 mV iS11oct (1) = RETEST. (2) = NEWTEST. <0, 27 ( 1) : 2 Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) : !

Enter the slot address of the A/D card. < 0, 15> ( 1) :

' Enter the Bit Resolution of the A/D card. < 12, 14> ( 14) :

Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

' Enter the slot address of the first card. < 0, 15> ( 0) :

- Enter the number of cards to be scanned. < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET (1) = PLUS POLARITY (2) = MINUS POLARITY (3) = SYSTEh MONITOR

, Select SCAN TYPE. <0, 3> ( 0) : 0 Enter the 9stn code for the desired system gain. < 0, 3> ( 1) : 1

$ Entor the desired number of scans. < 1, 32767> ( 100) :

' CARD CHANNEL MEAN P-P S

0 0 0.000 uV 0.000 uV i

! i Select (1) = RETEST, (2) = NEWTEST. < 0. > ( 3) : 0 ;

j

}is91>

t Enocution Abortad! ,

L DALCAL Card TEST PROGRAM for B. f E. ACCEPTANCE - Verston 10-JAN-94 !

Entor the 1st DEVICS CODE of the I/O Contro11er'. < 48, 63> ( 48) :

, Enter the slot iddress of the A/D card. < 0, 15> ( 1) :

~ Enter the B1t Resolution of the A/D card. < 10, 14> ( 14) * '

'5

. elect tne A/D tvpe. (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

Enter the slot address of the first card. < 0, 15> ( 0) : ;

Cntor the number of cards to be scanned. < 1, 15> ( 1) : ,

SCAN Types - (0) = OFFSET ,

(1) = PLUS POLARITY l (2) = MINUS POLARITY (3) = SYSTEM h0NITOR Select SCAN TYPE. < 0. 3) ( 0) : 0 Entor tne 9ain code for the desired system gaan. < 0, 3> < 1) : 0

))_ . f Att3,p.I

Entor tho d3cirod number of sc.ans. < 1, 32767> ( 100) 3 l CARD CHANNEL MEAN P-P L

0 0 -143.750 uV 312.500 uV I

(1) = RETEST. (2) = NEWTEST. <0, 3> ( 0) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) :

]Soloct 1Entor the slot address of the A/D card. < 0, 15> ( 1) : -

Entor the Bit Resolution of the A/D card. < 13, 14> ( 14) :

Soloct the t 'D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

1 Entor the slot address of the first card. < 0, 15> ( 0) :

Enter the number of cards to be scanned. < 1, 15> ( 1) :

bSCANTypes- (0) = OF 03ET 1 (1) = PLUS POLARITY L (2) = MINUS POLARITY (3) = SYSTEM MONITOR l "Soloct SCAN TYPE. < 0, 3> ( 0) : 0 i Entor the gaan code for the desired system gain. < 0, J> ( 1) : 3 !

Entor the desired number of scans. < 1, 32767> ( 100) :

l CARD CHANNEL MEAN P-P 0 0 -156.250 uV 0.000 uV i

j Soloct (1) = RETEST, (3) = NEWTEST. <0, 3> ( 2) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) : )

6Entor the slot address of the A/D card. < 0, 15> ( 1) :

' Entor the Bit Resolution of the A/D card. < 13, 14> ( 14) :

Solect the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <C, 1> ( 0) :

3 Entor the slot address of the first card. < 0, 15> ( 0) :

Enter the number of cards to be s c .a nn e d . < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET (1) = PLUS PO!ARITY 9 (0) = MINUS POLARITY

' (3) = SYSTEM MONITOR Soloct SCAN TYPE. <0, 3> ( 0) : 1 WSoloct (0) = FULLSCALE, (1) = HALFSCALE. < 0, 1> ( 0) :

h' Enter the tiin code for the desired system gain. <0, 3> ( 1) :

Enter the desired number of scins. < 1. 32767> ( 100) :

kCARDCHANNEL MEAN P-P

. 0 0 5.001 V 0.000 uV h

'j Soloct (1) = RETEST. (0) = NEWTEST. <0, 3> ( 2) :

Entor the 1st DEVICE CODE of the I/O Controller . < 48, 63> ( 48) :

g Entor the slot address of the A/D card. < 0, 15> ( 1) :

nEntor the Bit Resolution of the A/D card. < 13, 14> ( 14) :

lSelect the A/D type, (0)= BIPOLAR, (1) =UN IPOL AR . < 0, 1> ( 0) :

Enter the slot address of the first card. < 0, 15> ( 0) :

Entor the number of cards to be scanned. <

]SCANTypes- 1, 15> ( 1) :

i (0) = OFFSET (1) = PLUS POLARITY q (2) = MINUS POLARITY (3) = SYSTEM MONITOR Soloct SCAN TYPE. < 0. 3> <0) : 1 Soloct (0) = FULLSCALE, (1) = HALFSCALE. < 0, 1> ( 0) :

Entor the gain code for the desired system gain. <0, 3> ( 1) : 0 Enter the desired number of scans. < 1. 32767> ( 100) :

?

2D/

l AW. f P. R

l

\

CARD CNANNEL MEAN P-P 0 0 10.001 V 0.000 uV

[ Soloet (1) = RITEST, (2) = NEWTIST. < 0, 2> ( 2) : 2 4

Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63) ( 48) :

Intor the slot address of the A/D card. < 0, 15> ( 1) :

Entor the Bit Resolution of the A/D card. < 12, 14> ( 14) :

Solcet the A/D type, (0)=tIPOLAR, (1 ) =UN !P OL A R. <0, 1) ( 0) :

l Entor the slot address of the first card. < 0, 15> ( 0) :

Y Enter the number of cards to be scanned. < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET

( (1) = PLUS POLARITY L (2) = MINUS POLARITY (3) = SYSTEN MONITOR Soloct SCAN TYPE. < 0. 3> ( 0) : 1 Soloct (0) = FULLSCALE, (1) = HALFSCALE. < 0, 1> ( 0) :

Enter the gain code for the desired systee gain. <0, 3> ( 1) : 2 jEntor the desired nueber of scans. < 1, 32767> ( 100) :

L CARD CHANNEL MEAN P-P l 0 0 2.500 V 312.500 uV Soloct (1) = RETEST. (2) = NEWTEST. < 0, 2> ( 0) : 2 Enter the 1st DEVICE CODE of the I/O Controller . < 48, 63> ' * :

Entor the slot . address of the A/D card. < 0, 15> ( 1) :

Entor the Bit Resolutton of the A/D card. < 12, 14> ( 14) :

Soloct the A/D type, (0)=3! POLAR, (1)= UNIPOLAR. < 0, 1> ( 0) :

Entor the slot . address of the first car d. < 0, 15> ( 0) :

Enter the number of eards to be scanned. < 1, 15) ( 1) :

jSCAN Types - (0) = OFFSET (1) = PLUS POLARITY (2) = MINUS POLARITY (3) = SYSTEM MONITOR Solect SCAN TYPE. <0, 3> ( 0) : 1 Soloct (0) = FULLSCALE, (1) = HALFSCALE. <0, 1> ( 0) :

Entor the gain code for the desired system gaan. <0, 3> ( 1) : 3 Entor the destred number of scans. < 1, 32767> ( 100) :

CARD CHANNEL MEAN P-P 1 0 0 1.250 V 312.500 uV (1) = RETEST. (2) = NEWTEST. < 0, 2> ( 2) : 2

}>Soloct Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) :

' Enter the slot address of the A/D card. < 0. 15> < 1) :

Enter the Bit Resolution of the A/D card. < 12, 14) ( 14) :

Select the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

'Entor the slot adcress of the first card. < 0, 15) ( 0) :

Entor the nueber of cards to be scanned. < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET (1) = PLUS POLARITY

.2) = MINUS POLARITY g (3) = SYSTEM MONITOR

[Solect SCAN TYPE. <0, 3% ( 0) : 2 Select (0) = FULLSCALE. (1) = HALFSCALE. <0, 1> ( 0) :

, Enter the gain coce for the desired systen gain. <0, 3> ( 1) : O pEnter the costred nueber of scans. < 1. 32767> ( 100) :

CARD CHANNEL MEAN P-P g7,j L

4#.4f.

m . _ _ . . _ _ _

0 0 -10.000 V 0.000 uV Soloct (1) = RETEST, (2) = NEWTEST. < 0, 2> ( 2) : 2

'Entor the 1st DEVICE CODE of the I/O Controller. < 48, G3> ( 48) :

< 0, 15> ( 1) :

('EntortheslotaddressoftheA/Dcard.

Entor the Bit Resolution of the A/D card. < 12, 14> ( 14) :

Soloct the A/D type, (0)= BIPOLAR, (1) = UNIPOLAR. < 0, 1> ( 0) :

Entor the slot address of the first card. < 0, 15> ( 0) :

Entor the number of cards to be scanned. < , 1, 15> ( 1) :

SCAN Types - (0) = OFFSET (1) = PLUS POLARITY -

(2) = MINUS POLARITY (3) = SYSTEM MONITOR Goloct SCAN TYPE. < 0, 3> ( 0) : 2 Soloct (0) = FULLSCALE, (1) = HALFSCALE. < 0, 1> ( 0) :

Entor the gain code for the desired system Tain. < 0, 3> ( 1) : 1 Entor the desired number of scans. < 1, 32767> ( 100) :

MEAN P-P

{tARDCHANNEL 0 0 -5.001 V 625.000 uV Soloct (1) = RETEST, (2) = NEWTEST. < 0, 2> ( 2) : 2 Entor the 1st DEVICE CODE of the I/O Controller. < 4 8, 63> ( 48) :

Entor the slot address of the A/D card. < 0, 15> ( 1) :

Enter the Bit Resolution of the A/D card. < 12, 14> ( 14) :

Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0,1>( 0) :

Entor the slot address of the first card. < 0, 15> ( 0) :

Enter the number of cards to be scanned. < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET -

(1) = PLUS POLARITY (2) = MINUS POLARITY (3) = CYSTEM MONITOR Select SCAN TYPE. < 0, 3> ( 0) : 2 Soloct (0) = FULLSCALE, (1) = HALFSCALE. < 0, 1> ( 03 :

Entor the gain code for the desired system gain. <0, 3> ( 1) : 2 Entor the desired number of scans. < 1, 32767> ( 100) :

CARD CHANNEL MEAN P-P 0 0 -2.500 V 312.500 uV Solect (1) = RETEET, (2) = NEWTEST. < 0, 2> ( 2) : 2 Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63) ( 48) :

Entor the slot address of the A/P card. < 0, 15> ( 1) :

Enter the Bit Resolution of the A/D card. < 12, 14> ( 14) :

the A/D type, (0)= BIPOLAR, (1 ) =UN IPOLA R. <0, 1> ( 0) :

lSolect Enter the slot address of the first card. < 0, 15> ( 0) :

Entor the number of cards to be scanned. < 1, 15> ( 1) :

SCAN Types - (0) = OFFSET (1) = PLUS POLARITY (2) = MINUS POLARITY (3) = SYSTEM MONITOR Soloct SCAN TYPE. <0, 3> ( 0) : 2 Soloct (0) = FULLSCALE, (1) = HALFSCALE. <0, 1> ( 0) :

Entor the 9iin code for the desired system Sain. <0, 3> ( 1) : 3

, Enter the desired number of scans. < 1, 32767> ( 100) :

CARD CHANNEL MEAN P-P

)

JE- /

A tt, 3, P Y

l o o -1.:so v 106.250 uv -

I Solcet (1) e RETEST, (3) o NEWTEST. <0, > ( 2) I a

f}

l h

t o

O a

6 N

t 11- 1 l A W. 3i p.

i 2

Entcr th0 1st DEVICE CODE ct tho I/O Centro 11cr. < 48, 63) ( 40)

Enter tho slet -addross of tho A/D card. < 0. 15> ( 1) 8 TekEUE^ l~

Entor the Bit Resolution of the A/D card. < 12, 14> ( 14) : g), ,,

Soloct the A/D type, (0)= BIPOLAR, (1 ) =UN IP OL A R. <0, 1> ( 0) :

Entor the slot address of the first card. < 0, 15> ( 0) : T#E" Entor the number of cards to be scanned. < 1, 15> ( 1) : Jg .19r l SCAN Types - (0) = OFFSET 3,9. g o (1) = PLUS POLARITY (2) = MINUS POLARITY 09/ CD (3) = SYSTEM MONITOR 317 ll Soloct SCAN TYPE. <0, 3> ( 0) : 3 Entor the desired number of scans. < 1, 32767> ( 100) :

CARD CHANNEL MEAN P-P FUNCTION HOMINAL 0 0 1.006 V 625.000 uV +15 volts +1 volt 3 0 1 -1.007 V 0.000 uV -15 volts -1 volt j 0 2 996.844 nV 1.250 mV +5 volts 61 volt j

0 3 418.606 eV 625.000 uV +12 volts +1 volt n 0 4 -625.000 uV 0.000 uV 40/125 volts +1 volt 1 0 5 -625.000 uV 0.000 uV 48/125 volts +1 volt 0 6 23.973 C 0.063 C TEMP A 0 7 -273.212 C 0.000 C TEMP B l

jSoloct (1) = RETEST, (2) = NEWTEST. <0, 2> ( 2) :

9 m

)

l t

17. I Att. 3, fJ

Son'nos W U.A.I.C.S. TEST PROGRAM for B. G. E. ACCEPTANCE - Voroicn 12-JAN-84 {

l yOfW M e n far l

Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) : _It. qrg Entor the slot address of the A/D card. < 0, 15> ( 0) : 1 Entor the Bit Resolution of the A/D card. < 12, 14> ( 12) : 14 E b5P I 7' Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

DEntor the desired system sample rate in hert=. < 1, 200> ( 100) : 50 l lEntor the slot address of the first gate card. < 0, 511> ( 0) : 7 Entor the number of channels per card. <4, 8) ( 8) :

Entor the number of cards to be scanned. < 1, 15> ( 1) :

Entor the gain code for the desired system gain. < 0, 11> ( 0) :

Entor the desired number of scans. < 1, 32767> ( 1) : 100 Soloct (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 1) :

hvorage DEAN = 109J.330 Bits, 1.254 V i Mexicum PEAK to PEAK = 1 Bits, 1.250 mV on Card 7, Channel 0.

Ch.innol - Channel 0FFSET = 8134.090 Bits, 10.168 V '

)

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

7 0 4010.020 Bits 1 Bits 5.013 V 1.250 mV 0.140 1 7 1 3999.580 Bits 1 Bits 4.999 V 1.250 mV 0.494 L 7 2 4059.180 Bits 1 Bits 5.074 V 1.250 mV 0.384 7 3 -4050.020 Bits 1 Bits -5.063 V 1.250 mV 0.414 7 4068.000 Bits 0 Bits

]

a* 7 4

5 -4066.090 Bits 1 Bits 5.005

-5.083 V

V 0.000 uV 1.250 mV 0.000 0.286 7 6 38.170 Bits 1 Bits 47.712 mV 1.250 mV 0.376 7 7 -32.000 Bits 0 Bits -40.000 mV 0.000 uV 0.000

' Avorige ME AN = 1003.330 Bits, 1.254 V Msxicum PEAK to PEAK = 1 Bits, 1.250 mV on Card 7, Channel 0.

Ch annel - Channel 0FFSET = 8134.090 Bits, 10.168 V .

r i Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 0 lAvor.39e NEAN = 499.794 Bits, 624.742 mV Naxicum PEAK to PEAK = 1 Bits, 1.250 mV on Card 7, Channel 1.

Chennol -

Channel 0FFSET = 8139.850 Bits. 10.175 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1

] CARD CHANNEL MEAN P-P MEAN P-P STD. DEV. j 7 0 3.000 Bits 0 Bits 3.750 mV 0.000 uV 0.000

. 7 1 4000.060 Bite 1 Bits 5.000 V 1.250 mV 0.237 7 3 4059.000 Bits 1 Bits 5.074 V 1.250 av 0.414 7 3 -4071.890 Bits 1 Bits -5.090 V 1.250 mV 0.313 i 7 4 4067.960 Bits 1 Bits 5.085 V 1.250 mV 0.196 1 7 5 -4066.160 Bits 1 Bits -5.083 V 1.250 mV 0.367 7 6 38.160 Bits 1 Bits 47.700 mV 1.250 mV 0.367 7 7 -32.000 Bits 0 Bits -40.000 mV 0.000 uV 0.000 Avorise MEAN = 499.794 Bits, 624.743 mV niatoum PEAK to PEAK = 1 Bits. 1.250 mV on Card 7, Channel 1.

. Channel - Channel 0FFSET = 8139.850 Bits, 10.175 V Entor (1)= PRINT 007. (2)=RESCAN. (3)= RESTART. <0, 3> ( 1) : 0 g.I A H. 3, p. 7

_ _ _ ~ . . . _ . _ _ _ . . _ . .. _ _ . _ . .

Avor ago MEAN o 500.960 Bits. 626.200 oV Max.cuo PEAK to PEAK e 1 Bits, 1.200 CV on Ccrd 7, Chennol 0.

Chainol - Channol 0FFSET o 8140.230 Bits, 10.175 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

7 0 4008.990 Bits 1 Bits 5.011 V 1.250 nV 0.099 7 1 3.500 Bits 1 Bits 4.375 eV 1.250 eV 0.500 7 2 4059.460 Bits 1 Bits 5.074 V 1.250 mV 0.498

[ 7 3 -4072.230 Bits 1 Bits -5.090 V 1.250 mV 0.421 7 4 4058.000 Bits 0 Bits 5.085 V 0.000 uV 0.000 7 5 -4066.170 Sits 1 Bits -5.083 V 1.250 nV 0.376

) 7 6 38.130 Bits 1 Bits 47.662 nV 1.250 nV 0.336 3

7 7 -32.000 Bits 0 Sits -40.000 eV 0.000 uV 0.000 1

)Avor.ase MEAN a 500.960 Bits, 626.200 mV iMaximum PEAK to PEAK = 1 Sits. 1.250 eV on Card 7, Channel 0.

fChennol - Chinnel 0FFSET = 8140.230 Bits, 10.175 V

' Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 2 Avorage MEAN = 1004.669 Bits. 1.056 V Mnxicum PEAK to PEAK = 98 Bits, 122.500 mV on Card 7, Ch.annel 2.

iCh.annel - Channel 0FFSET = 8133.180 Bits. 10.166 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

7 0 4009.300 Bits 1 Bits 5.012 V 1.250 nV 0.458 7 1 4000.020 Bits 1 Bits 5.000 V 1.250 nV 0.140 7 3 474.550 Bits 98 Bits 593.187 mV 122.500 nV 28.492 7 3 -453.650 Bits 93 Bits -567.062 mV 116.250 nV 27.315 7 4 4067.130 Bits 1 Bits 5.084 V 1.250 mV 0.336 7 5 -4066.050 Bits 1 Bits -5.083 V 1.250 mV 0.218 7 6 38.050 Bits 1 Bits 47.562 mV 1.250 eV 0.218 l 7 7 -32.000 Bits O Bits -40.000 mV 0.000 uV 0.000 Avorage MEAN = 1004.669 Bits, 1.256 V fManscum PEAK to PEAR = 98 Bits. 122.500 mV on Card 7 Channel 2.

Channel -

Channel 0FFSET = 8133.180 Bits, 10.166 V IEntor (1)= PRINTOUT. (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 2 Avorage MEAN = 990.750 Bits. 1.238 V

[Mixicum PEAK to PEAR = 49 Bits, 61.250 mV on Card 7, Channel 5.

l Channel - Channel 0FFSET = 8130.610 Bits. 10.163 V l

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1

. CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

i

) 7 0 4009.990 Bits 1 Bits 5.012 V 1.250 mV 0.099 7 1 4000.010 Bits 1 Bits 5.000 V 1.250 nV 0.099 i 7 2 4058.560 Bits 1 Bits 5.073 V 1.250 mV 0.496 7 3 -4072.050 Bits 1 Bits -5.090 V 1.250 nV 0.018 7 4 219.810 Bits 37 Bits 274.762 eV 46.250 mV 10.952 7 5 -296.430 Bits 49 Bits -370.537 mV 61.250 nV 14.372 i 7 6 38.110 Bits 1 Bits 47.638 mV 1.250 nV 0.313 Z-/

ht..sp.t

7 7 -32.000 Bits O Bits -40.000 cV 0.000 uV 0.000 Avoriso MEAN = 990.700 Bits, 1.238 V Monicus PEAK to PEAK = 49 Bits. 61.250 mV on Card 7, Channel 5.

[ Channol - Channel 0FESET = 8130.610 Bits, 10.163 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 2 Avorage MEAN = 1000.525 Bits, 1.251 V Mixtoum PEAK to PEAR = 1 Bits, 1.250 mV on Card 7, Channel 0.

Channel - Channel 0FFSET = 8138.100 Bits, 10.173 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

7 0 4009.990 Bits 1 Bits 5.012 V 1.250 mV 0.099

) 7 1 4000.000 Bitt O Bits 5.000 V 0.000 uV 0.000 3

7 2 4059.000 Bits 0 Bits 5.074 V 0.000 uV 0.000 7 3 -40/2.030 Bits 1 Bits -5.090 V 1.250 mV 0.171 7 4 4066.070 Bits 1 Bits 5.083 V 1.250 nV 0.255 7 5 -4065.000 Bits 0 Bits -5.081 V 0.000 uV 0.000 7 6 38.130 Bits 1 Bits 47.662 mV 1.250 mV 0.336 7 7 -31.960 Bits 1 Bits -39.950 mV 1.250 av 0.196 Avorige MEAN = 1000.525 Bits, 1.251 V Maximum PEAK to PEAK = 1 Bits, 1.250 mV on Card 7, Channel 0.

Channel - Channel 0FFSET = 8138.100 Bits, 10.173 V Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1)

2 3

j i

m 2T-/

i Mt. 3, p 9 L ..__ _ . . _ _ . _ _ _ . _ _ , . _ _ . . _ _ _ , _ _ - .

I jEntor (1)oPRINTOUI, (2)eRESCAN, (3)oRESTART. <0, 3> ( 1) 8 0 l b l 0

4 I

. 1 4

) -

4 i

l a

) ,

%s 1

4

\,

f i

f.

2/

, 4 2 3,f A L_.._ _ -

c._ _ _ _ - .

3 0 4095.300 Bite 2 Bits 39.996 cV 19.031 uV 0.589 3 1 3502.010 Bito 1 Bits 34.981 cV 9.766 uV 0.099 3 3 3071.180 Bits 1 Bits 29.992 mV 9.766 uV 0.384 2

3 3 2563.030 Bits 1 Bits 25.030 mV 9.766 uV 0.171 3 4 2051.840 Bits 1 Bits 20.038 av 9.766 uV 0.357 3 5 1536.110 Bits 2 Bits 15.001 mV 19.531 uV 0.343 3 6 1028.000 Bits 2 Bits 10.040 mV 19.531 uV 0.337 3 7 516.940 Bits 1 Bits 5.048 mV 9.766 uV 0.237 Avorige MEAN = 1155.369 Bits, 11.283 mV fMixiousPEAKtoPEAK= 2 Bits, 19.531 uV on Card 3, Channel 0. ;

Channol - Chinnel 0FESET = 4091.580 Bits, 39.957 mV '

l hEntor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 3 JEnter the 1st DEVICE CODE of the I/O Controller . < 48, 63> ( 40) :

Entor the slot address of the A/D card. < 0, 15> ( 1) :

@Entor the Bit kesolution of the A/D card. < 13, 14> ( 14) :

'jSoloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1> ( 0) :

i Entor the desired system sample rate in hert . < 1, 200> ( 50) :

' Enter the slot address of the first gate card. < 0, 511> ( 2) : 4 Enter the number of channels per card. <4, 8> ( 8) :

Entor the number of cards to be scanned. < 1, 15> ( 3) : j Entor the 9ain code for the desired system gain. < 0, 11> ( 8) :

Entor the desired number of scans. < 1, 32767> ( 100) :

'iSoloct (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1. 2> ( 1) :

Avorige MEAN = 1144.526 Bits, 11.177 mV

Mixicum i PEAK to PEAK = 2 Bits, 19.531 UV on Card 4, Chinnel 5.

'Channol - Channel 0FFSET = 4096.630 Bits, 40.006 mV

) Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3) ( 3) : 1

[1

[ CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

o 4 0 4082.970 Bits 1 Bits 39.873 LV 9.766 uV 0.171 4 1 3578.000 Bits 0 Bits 34.942 mV 0.000 uV 0.000 4 2 3067.043 Bits 1 Bits 29.952 mV 9.766 uV 0.196 4 3 2549.300 Bits 1 Bits 24.896 mV 9.766 uV 0.485 4 4 2043.590 Bits 1 Bit: 19.957 mV 9.766 uV 0.492 4 5 1528.000 Bits 2 Bits 14.923 mV 19.531 uV 0.141

) 4 6 7

1023.000 Bits 0 Bits 9.990 mV 0.000 uV 0.000 i 4 507.090 Bits 1 Bits 4.952 mV 9.766 uV 0.386

$ 0 -13.660 Bits

]

3 3 1 -7.160 Bits 1

1 Bits Bits

-133.399

-69.922 uV uV 9.766 uV 9.766 uV 0.474 0.367 5 2 -7.400 Bits 1 Bits f -72.266 uV 9.766 uV 0.490 h 5 3 -11.070 Bits 1 Bits -108.106 uV 9.766 uV 0.255

l. 5 4 -5.260 Bits 1 Bits -51.367 uV 9.766 uV 0.439 L 3 5 -6.990 Bits 2 Bits -68.263 uV 19.531 uV 0.264

( 5 6 -9.060 Bits 1 Bits -88. 47 7 uv 9.766 uV 0.237 7 -6.060 Bits

]

S 1 Bits -59.180 uV 9.706 uV 0.237 I Avorage MEAN = 1144.526 Bits, 11.177 mV kMax1 cum PEAK to PEAK = 2 Bits. 19.531 uV on Card 4, Channel 5.

l Channol - Chinnel 0FFSET = 4096.630 Bits, 40.006 mV

)

Entor (1)= PRINTOUT. (2)=RESCAN. (3)= RESTART. <0, 3> ( 1) : 2 Avoriae NEAN = 1147.159 Bits. 11.203 mV minimum PEAK to PEAK = 2 Bits, 19.531 uV on Card 4, Channel 5.

JI/

A g,3, f Il L

3 Enter tho ist DEVICE CODE of tho t/0 Centro 11er . < 48, 63> ( 48) I g e,7 gen, lo(

Entor t50 slot address of tho A/D card. < 0, 15> ( 1) t

,Entor the Bit Resolution of the A/D card. < 13, 14) ( 14) : g;_ l 4r l Solcet the A/D type, (0)= BIPOLAR, (1 ) =UN IF O L A R . < 0, 1> ( 0) :

7 Entor the desired system sample rite in hert=. < 1, 200> ( 50) : T Wis Enter the slot address of the first gate card. <

fEntor the number of channels per card. < 4, 8> ( 8) :

0, 511> ( 7) : 2 IT -- I4 j Er, tor the number of cards to be scanned. < 1, 15> ( 1) : 2

, Entor the gain code for the desired system 9ain. < 0, 11> ( 0) : 8 Entor the desired number of scans. < 1, 32767> ( 100) :

Solcet (1)= NORMAL SCAN, (2)= COMMON NODE SCAN. < 1, 2) ( 1) :

L Avorige MEAN = 1155.403 Bits, 11.283 mV Maxitus PEAK to PEAK = 2 Bits, 19.531 uV on Card 3, Channel 0.

g Ch.annol -

Channel 0FFSET = 4096.660 Bits, 40.007 mV

$Entor (1)=FRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 3) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

2 0 4097.650 Bits 1 Bits 40.016 mV 9.766 uV 0.477 2 1 3585.000 Bits o Bits 35.010 mV 0.000 uV 0.000 2 2 3074.530 Bits 1 Bits 30.025 eV 9.766 uV 0.499 2 3 2564.100 Bits 1 Bits ?5.040 mV 9.766 uV 0.300 2 4 2052.350 Bits 1 Bits 20.043 mV 9.766 uV 0.477 2 5 1540.740 Bits 1 Bits 15.046 mV 9.766 uV 0.439 2 6 1028.950 Bits 1 Bits 10.048 mV 9.766 uV 0.21e 2 7 517.170 Bits 1 Bits 5.051 mV 9.766 uV 0.376 3 0 3.990 Bits 2 Bits 38.965 uV 19.531 uV 0.173 3 1 0.990 Bits 2 Bits 9.668 uV 19.531 uV 0.173 3 2 3.840 Bits 1 Bits 37.500 uV 9.766 uV 0.367 3 3 2.900 Bits 1 Bits 28.320 uV 9.766 uV 0.300 3 4 4.000 Bits O Bits 39.063 uV 0.000 uV 0.000 3 5 2.230 Bits 1 Bits 21.777 uV 9.766 uV 0.421 3 6 4.000 Bits 2 Bits 39.063 uV 19.531 uV 0.283 l' 3 7 4.010 Bits 1 Bits 39.160 uV 9.766 uV 0.099 1

Avornme MEAN = 1155.403 Bits. 11.283 eV ;

Mintoun PEAK to PEAK = 2 Bits, 19.531 uV on Card 3, Channel 0. '

Channol - Channel 0FFSET = 4096.660 Bits. 40.007 mV 6

! Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 2 D

]Avorige MEAN = 1155.369 Bits, 11.083 mV nixtcum PEAR to PEAK = 2 Bits, 19.531 uV on C.a.'d 3, Channel 0, oChannol - Channel 0FFSET = 4091.580 Bits, 39.957 mV l

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1

[CARDCHANNEL MEAN P-P MEAN P-P STD. DEV.

{ 2 0 5.750 Bits 1 Bits 56.153 uV 9.766 uV 0.433 I

) 2 1 3.970 Bits 1 Bits 38.770 uV 9.766 uV 0.171 2 2 5.750 Bits 1 Bits 56.153 uV 9.766 uV 0.433

[

2 3 5.470 Bits 1 Bits 53.418 uV 9.766 uV 0.499 2 4 4.380 Bits 1 Bits 42.774 uV 9.766 uV 0.485 2 5 5.640 Bits 1 Bits 55.078 uV 9.766 uV 0.480 2 6 4.940 Bits 1 Bits 48.242 uV 9.766 uV 0.237 2 7 5.260 Bits 1 Bits 51.367 vV 9.766 uV 0.439 2I-/

L _ . .. . _ _ . _ _ _ . _ _ _ . . . . _ .

Att f p.Il

Channol - Channol 0FFSET o 4087.270 Bits, 39.915 OV F Entor (1)oPRINTOUT, (2)oRESCAN, (3)oRESTART. <0, 3> ( 2) I 1 L

CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

f

( 4 0 -5.290 Bits 1 Bits -51.660 uV 9.766 uV 0.454 4 1 -1.000 Bits 1 Bits -10.547 uV 9.766 uV 0.271

! 4 2 -1.020 Bits 1 Bits -9.961 uV 9.766 uV 0.140

[ 4 3 -5.250 Bits 1 Bits -51.270 uV 9.766 uV 0.433 4 4 -2.130 Bits 1 Bits -20.601 uV 9.766 uV 0.336

) 4 5 -4.040 Bits 2 Bits -39.453 uV 19.531 uV 0.242 4 6 -0.230 Bits 1 Bits -2.246 uV 9.766 uV 0.421 4 7 -2.340 Bits 1 Bits -22.853 uV 9.766 uV 0.474 0 0 4081.900 Bits 1 Bits 39.863 mV 5.766 uV 0.140 5 1 3576.050 Bits 1 Bits 34.922 mV 9.766 uV 0.218 3] 3 2 3063.810 Bits 1 Bits 29.920 nV 9.766 uV 0.392 3 5 3 2553.000 Bits 0 Bits 24.932 mV 0.000 uV 0.000 S 4 2044.050 Bits 1 Bits 19.961 nV 9.766 uV 0.218 5 5 1530.990 Bits 1 Bits 14.951 mV 9.766 uV. 0.099 0 6 1017.170 Bits 1 Bits 9.933 mV 9.766 uV 0.376 5 7 508.870 Bits 1 Bits 4.969 mV 9.766 uV 0.336 Avorage MEAN = 1147.159 Bits, 11.203 mV naxtcum PEAK to PEAR = 2 Bits, 19.531 uV on Card 4, Channel 5.

Channol - Channel 0FFSET = 4087.270 Bits, 39.915 mV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 40) :

Entor the slot address of the A/D card. < 0, 15> ( 1) :

Entor the Bit Resolution of the A/D card. < 12, 14> ( 14) :

Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. <0, 1> ( 0) :

Entor the desired system sample r ate in hert=. < 1, 200> ( 50) :

the slot address of the first gate card. < 0, 511> ( 4) : 6 fEntor Entor the number of channels per card. < 4, 8> ( 8) :

Entor the number of c.ards to be scanned. < 1, 15> ( 2) : 1 lEntor the gain code for the desired system gain. < 0, 11> ( 8) :

Sntor the desired number of scans. <

1, 32767> ( 100) :

Sa;oct (1)= NORMAL SCAN, ( 2) = COMMON MODE SCAN. < 1, 2> ( 1) :

!Avor:9e MEAN = 2301.099 Bits. 22.474 nV Mixtoum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 5.

Channol - Channel 0FFSET = 3576.920 Bits, 34.931 nV 0

'Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 3) : 1 iCARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 4089.600 Bits 1 Bits 39.938 mV 9.766 uV 0.490 6 1 3575.080 Bits 1 Bits 34.913 mV 9.766 uV 0.271 6 2 3069.000 Bits 0 Bits 29.971 nV 0.000 uV 0.000 6 3 2556.960 Bits 1 Bits 24.970 mV 9.766 uV 0.196 6 4 2049.090 Bits 1 Bits 20.011 mV 9.766 uV 0.286 6 5 1532.990 Bits 2 Bits 14.971 mV 19.531 uV 0.173 6 6 1024.990 Bits 1 Bits 10.010 mV 9.766 uV 0.099 6 7 512.680 Bits 1 Bits 5.007 mV 9.766 uV 0.466 Avor ige ME AN = 2301.299 Bits, 22.174 mV Manicum PEAK to PEAK = 2 Bits, 19.531 uV on Card G. Channel 5.

jChannol - Channel 0FFSET = 3576.920 Bits, 34.931 mV 1

IE-/

Ad. f p.,

_ _ _ . ~ . . _ _ _ , . .

W

L .

3 I Enter the 1st DEVICE CODE of tho I/O Centro 11or. < 48, 63> ( 48)

' Intor tho slot addroso of the A/D cards < 0, 15) ( 1) 50e=Y shA **

Inter the Bit Resolution of the A/D card. < 12, 14> ( li) :

Soloct the A/D type, (0)= BIPOLAR, ( 1 ) =UN IP O L A R . < 0, 1> ( 0) : UC- I %' 5 "

Entor the desired system sample rate in herts. < 1, 200> ( 501 : jp,,pl4 Entor the slot address of the first gate card. < 0, 511> ( 6) :

T Enter the number at channels per card. <4, 8> ( 8) : C7h5 ct e, c, j Entor the number of cards to be scanned. < 1, 15> ( 1) : '

Entor'the gain code for the desired system gain. < 0, 11> ( 8) : '"T*'

Entor the desired number of scans. < 1, 32767> ( 100) : C;>s cN ccL qSoloct j

(1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 2) : 1 Avorage MEAN = 0.160 Bits, 1.563 uV kMaxicumPEAKtoPEAK= 2 Bits, 19.532 uV on Card 6, Channel 1. I J Channel - Channel 0FFSET = 1.690 Bits, 16.504 uV a Entor (1)=PkINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 3) : 1

~ CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -0.340 Bits 1 Bits -3.320 uV 9.766 uV 0.474 3 6 1 -0.900 Bits 2 Bits -8.789 uV 19.531 uV 0.332 6 2 0.490 Bits 2 Bits 4.785 uV 19.531 uV 0.520 6 3 -0.010 Bits 2 Bits -0.098 uV 19.531 uV 0.332 6 4 0.780 Bits 1 Bits 7.611 uV 9.766 uV 0.414

), 6 5 0.410 Bits 2 Bits 4.004 uV 19.531 uV 0.512 6 6 0.790 Bits 1 Bits 7.715 uV 9.766 uV 0.407

, 6 7 0.060 Bits 2 Bits 0.586 uV 19.531 uV 0.420 l'

..,Avorage MEAN = 0.160 Sits, 1.563 uV

, Maxicum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 1.

LdChannel - Channel 0FFSET = 1.690 Bits, 16.504 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 2 Avorage MEAN = 7165.735 Bits. 69.978 mV naxicum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 0.

Ch.innol - Chianel 0FFSET = 1.0F0 Bits, 10.257 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 CARD CHANNEL MEAN P-P HEAN P-P STD. DEV.

6 0 7166.000 Bits 2 Bits 69.981 mV 19.531 uV 0.245

) 6 1 7165.030 Bits 2 Bits 69.971 mV 19.531 uV 0.263 6 3 7166.050 Bits 2 Bits 69.981 mV 19.531 uV 0.296 L 6 3 7165.200 Bits 1 Bits 69.973 mV 9.766 uV 0.400 l 6 4. 7166.050 Bits 2 Bits 69.981 mV 19.531 uV 0.260 6 5 7165.470 Bits 1 Bits 69.975 mV 9.766 uV, 0.499 6 6 7166.080 Bits 2 Bits 69.981 mV 19.531 uV 0.306 6 7 7166.000 Bits 2 Bits 69.981 mV 19.531 uV 0.316 Avorige MEAN = 7165.735 Bits, 69.978 mV d

jMixtcum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 0.

1 Channel - Channel 0FFSET = 1.050 Bits, 10.257 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 2 Avor39e MEAN = -7165.779 Bits, ~69.979 mV nanicum PEAK to PEAR = 3 Bits, 29.297 uV on Card 6, Channel 0.

JI-/

Att.Jp.if L .- - _ _ ._ __- _ _ _ . . _ . _ . _ _ _.. - . . . . ._

-e --n ,,_e. - , -

Channel - Channal 0FFGET e *2.240 Bits, 21.873 uV Enter (1)ePRINT0UT, (2)oRESCAN, (3)oRESTART. < 0, 3> ( 2) 8 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -7167.130 Bits 3 Bits -69.992 mV 29.297 uV 0.523 0 6 1 -7167.000 Bits 3 Bits -69.990 mV 29.297 uV 0.600 l 8 6 2 -?165.330 Bits 2 Bits -69.974 nV 19.531 uV 0.549 6 3 -7165.610 Bits 2 Bits -69.977 nV 19.531 uV 0.581 1 6 4 -7165.160 Bits 2 Bits -69.972 mV 19.531 uV 0.418 j 6 6

5 -7164.960 Bits 3 Bits -69.971 eV 29.297 uV 0.546 6 -7164.890 Bits 2 Bits -69.970 eV 19.531 uV 0.508 6 7 -7166.150 Bits 3 Bits -69.982 nV 29.297 uV 0.433 Avorige MEAN = -7165.779 Bits, -69.979 mV Maxieum PEAK to PEAK = 3 Bits, 29.297 uV on Card 6, Channel 0.

Channal - Channel OFFSET = 2.240 Bits, 21.873 uV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 3

'Entor the 1st DEVICE CODE of the I/O Contro11ei. < 48, 63) ( 48) :

[ Enter the slot address of the A/D card. < 0, 15> ( 1) :

F Enter the Bit Resolution of the A/D eird. < 12 # 14> ( 14) :

' Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1> ( 0) :

kntor the aestred system sample r ate in hert=. < 1, 200> ( 50) :

Entor the slot address of the first gate card. < 0, 511> ( 6) :

! Entor the number of channels per card. <4, 8> ( 8) :

Entor the number of cards to be scanned. < 1, 15> ( 1) :

'Entor the gain code for the desired system gain. < 0, 11> ( 8) : 4 Enter the desired number of se.ans. < 1, 32767> ( 100) :

Soloct (1)= NORMAL SCAN, (2)=COMNON MODE SCAN. < 1, 2> ( 1) :

Averige MEAN = 0.161 Bits, 12.598 uV Maximum PEAK to PEAR = 1 Bits, 78.125 uV on Card 6, Channel 0.

, Channel - Channel 0FFSET = 0.510 Bits, 39.844 uV g

I Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 3) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 0.020 bits 1 Bits 1.562 uV 78.125 uV 0.140 6 1 0.010 Bits 1 Bits 0.781 uV 78.125 uV 0.099 L 6 2 0.050 Bits 1 Bits 3.906 uV 78.125 uV 0.218

! 6 3 0.130 Bits 1 Bits 10.156 uV 78.125 uV 0.336 1

6 4 0.310 Bits 1 Bits 24.219 uV 78.125 uV 0.462 6 5 0.170 Bits 1 Bits 13.281 uV 78.125 uV 0.376 6 6 0.520 Bits 1 Sits 40.625 uV 78.125 uV 0.500 6 7 0.000 Bits 1 Bits 6.250 uV 78.125 uV 0.271 Avorage MEAN = 0.161 Bits, 12.598 uV (Ncxacum PEAK to PEAR = 1 Bits, 78.125 uV on Card 6, Channel 0.

C h.a nno l - Chinnel 0FFSET = 0.510 Bits, 39.844 uV Entor (1)= PRINTOUT, (2)=RESCAN. (3)= RESTART. <0, 3> ( 1) : 2 l Avori9e MEAN = 7165.710 Btts, 559.001 mV nv:tous PEAK to PEAK = 2 Bits, 156.250 uV on Card 6, Channel 1.

. Channel - Channel 0FFSET = 0.950 Bats, 74.196 uV i Enter (1)= PRINTOUT, (0)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1

)

E-l

, M. y.s

. CARD CHANNEL NEAN P-P MEAN P-P STD. DEV.

i 6 0 7166.090 Sits 1 Bits 559.851 cV 78.125 uV 0.286 I L 6 1 7165.990 Bits 2 Bits 559.843 eV 156.250 uV 0.264 i

( 6 2 7166.040 Sits 1 Bits 559.847 nV 78.125 uV 0.196 l

$ 6 3 7165.170 Bits 1 Sits 559.779 nV 78.125 uV 0.376 L 6 4 7165.630 Bits 2 Bits 559.815 eV 156.250 uV 0.523 6 5 7165.140 Bits 1 Sits 559.777 mV 78.125 uV 0.347 I 6 6 7165.550 Bits 2 Bits 559.809 nV 156.250 uV 0.536 L

[ 6 7 7166.070 Sits 1 Bits 559.849 mV 78.125 uV 0.255 l

l Avorage MEAN = 7165.710 Bits, 559.821 aV i

[Mixicum PEAK to PEAK = 2 Bits, 156.250 uV on Card 6, Channel 1.

t Channol - Channel 0FFSET e 0.950 tits, 74.196 uV j r Enter (1)= PRINTOUT, (2)=RISCAN, (3)= RESTART. < 0, 3> ( 1) : 2 l !

Avors9e MEAN = -7164.448 Bits, -559.722 mV t Muxicum PEAK to PEAR = 2 Bits, 156.250 uV on Card 6, Channel 1. !

1.090 Bits, 85.182 uV

{Chennol-Channel 0FFSET= [

Entor (1)= PRINE 00T, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 l

CARD CHANNEL MEAN P-P MEAN P-P STD. DEV. t 6 0 -7165.120 Bits 1 Bits -559.775 mV 78.125 uV 0.325 l 6 1 -7164.880 Bits 2 311s -559.756 mV 156.250 uV 0.407 6 2 -7164.290 Sits 2 Bits -559.710 aV 156.250 uV 0.475 ,

6 3 -7164.100 Sits 1 Sits -559.695 cV 78.125 uV 0.300 '

6 4 -7164.130 Bits 1 Bits -559.698 nV 78.125 uV 0.336 >

6 5 -7164.030 Sits 2 Bits -559.690 mV 156.250 uV 0.263 6 6 -7164.100 Sits 1 Bits -559.695 nV 78.125 uV 0.300 ,

6 7 -7164.930 Bits 2 Bits -559.760 mV 156.250 uV 0.381 Avorise MEAN = ~7164.448 Bits, -559.723 mV Maxtoum PEAK to PEAK = 2 31ts, 156.250 uV on Card 6, Channel 1.

Channol - Chinnel 0FFSET = 1.090 Bit 2, 85.182 uV Enter (1)= PRINTOUT, (2)=RESCAN. (3)= RESTART. < 0, 3> ( 1) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) :

Entor the slot address of the A/D card. < 0 15> ( 1) :

lEntor the bit kesolution of the A/D card. < 12, 14> ( 14) :

Solcet the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1> ( 0) :

Entor the tesxted systen sample rate in hert=. < 1, 200> ( 50) :

'Entor the slot address of the first gate card. < 0, 511> ( 6) :

Entor the naaber of channels per card. < 4, 8> ( 8) :

Enter the n aaber of cards to be scanned. < 1, 15> ( 1) :

Entor the 9 sin code for the desired system 9ain. < 0, 11) ( 4) : 0

)Entor the desired number of scans. < 1, 32767> ( 100) :

Soloct (1)sNORMAL SCAN. (2)= COMMON MODE SCAN. < 1, 2> ( 1) :

AvoraSe MEAN = 0.264 Bits, 329.687 uV lMaxious PEAK to PEAR = 1 Sits, 1.250 nV on Card 6, Channel 0.

Channol - Channel 0FFSET = 0.270 Bits, 337.500 uV

' Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 3) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

1 6 0 0.210 Bits 1 Sits 262.500 uV 1.250 eV 0.407 6 1 0.260 Bits 1 Bits 325.000 uV 1.250 nV 0.439 ll-l Att. 3, fA

[

13 6

0 2

3 0.430 0.160 Bits Bits 1

1 Bits Bits 037.000 uV 200.000 uV 1.200 CV 1.250 sV 0.495 0.367 6 4 0.350 Bits 1 Bits 437.500 uV 1.250 CV 0.477 6 5 0.190 Dits 1 Sits 225.000 uV 1.250 mV 0.384 6 6 0.360 Bits 1 Bits 450.000 uV 1.250 nV 0.480 6 7 0.160 Bits 1 Bits 200.000 uV 1.250 nV 0.367 hAvora3eMEAN = 0.264 Bits, 329.687 uV ONcxitum PEAK to PEAK = 1 Bits, 1.250 mV on Card 6, Channel 0. ,

I Channel - Channel 0FFSET = 0.270 Bits, 337.500 uV I Enter (1)= PRINTOUT, (2)=RESCAN, (3)aRESTART. <0, 3) ( 1) : 2 hOvortge MEAN = 7167.740 Bits, 8.960 V iMnxicum PEAK to PEAK = 2 Bits, 2.500 nV on Card 6, Channel 0.

1 Chtnnol - Channel 0FFSET = 1.510 Bits, 1.887 eV 1

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 l

[CCRDCHANNEL MEAN P-P MEAN P-P STD. DEV.

f 6 0 7168.510 Bits 2 Bits 8.961 V 2.500 mV 0.520 6 1 7168.070 Bits 1 Bits 8.960 V 1.250 nV 0.255 6 3 7167.000 Bits 0 Bits 8.959 V 0.000 uV 0.000 6 3 7167.950 Bits 1 Bits 8.960 V 1.250 nV 0.218 6 4 7168.130 Bits 1 Bits 8.960 V 1.250 av o.336 6 5 7167.050 Bits 1 Bits 8.959 V 1.250 nV 0.218 6 L 7167.040 Bits 1 Bits 8.959 V 1.250 eV 0.196 6 7 7168.170 Bits 1 Bits R.960 V 1.250 mV 0.376 a Avorige MEAN = 7167.740 Bits, 8.960 V lMixtoum P!AK to PEAK = 2 Bits, 2.500 mV on Card 6, Channel 0.

Chinnol - Chinnel 0FFSET = 1.510 Bits, 1.887 mV hEntor ( 1 ) = P R INT OUT , (2)=RESCAN, (3)= RESTART. < 0, 3) ( 1) : 2 Avorige MEAN = -7167.612 Bits, -8.960 V Mixicum PEAK to PEAK = 2 Bits, 2.500 mV on Card 6, Channel 2.

Channel -

Channel 0FFSET = 2.900 Bits, 3.625 nV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 il I CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -7168.200 Bits 1 Bits -8.960 V 1.250 aV 0.449 4

6 1 -7168.300 Bits 1 Bits -8.960 V 1.250 nV 0.458 6 2 -7167.660 Bits 2 Bits -0.960 V 2.500 mV 0.620 6 3 -7166.100 Bits 1 Bits -0.958 V 1.250 mV 0.300 6 4 -7166.400 Bits 1 Bits -0.958 V 1.250 mV 0.490 6 5 -7168.150 Bits 1 Bats -0.960 V 1.250 nV 0.357 i 6 6 -7167.010 T4ts 2 Bits -8.959 V 2.500 nV 0.173 6 7 -7169.000 Bits 0 Bits -0.961 V 0.000 uV 0.000 Avorise MEAN = -7167.612 Bats, -0.960 V n-s x t ou s PEAK to PEAK r 2 Bats, 2.500 mV on Card 6, Ch.a n n e l 2.

Channol - Channel 0FFSET = 2.900 Bats, 3.625 mV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 48 63> ( 48) :

Entor the slot address of the A/D card. < 0. 15> ( 1) :

Entor the Bit Resolution of the A/l. card. < 12. 14> ( 14) :

3E-/

Att. f p.17 u_ ._ _ . . . . - . _ . . _ . . . . . . .

1 Salcet the A/D typo, (0)oBIPOLAR, (1)oVNIPOLAR. < 0, 1> ( 0) :

jEnter tho d3citod system samplo rete in hor t= . < 1, 200> ( 50) :

l Enter tho slot addroso of tho Entor the number of channels per card. < 4, 8) ( 8) :

first gote card. < 0, 511) ( 6) : ,

h Entor the number of cards to be scanned. < 1, 15> ( 0, 1) :

'l Entor the gain code for the desired system gain. < 11> ( 0) : 8 Entor the desired number of scans. < 1, 32767) ( 100) :

S Coloct (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2) ( 1) : 2 ll Intor the applied common mode voltage (P-P). < 1, 1700> < 1697) :

Avornge MEAN = -7.525 Bits. -73.487 uV s lMaxicum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 1. !

Chinnol - Channel 0FFSET = 4.680 Bits, 45.703 uV Minicum Common Mode Rejection = 158.78d4 on Card 6, Channel 1. i IIEntor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 3) : 1

{

CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -0.330 Bits 1 Bits -81.348 uV 9 766 uV 0.470 6 1 -8.570 Bits 2 Bits -83.692 uV 19.531 uV 0.534 6 2 -6.720 Bits 2 Bits -65.625 uV 19.531 uV 0.511 6 3 -8.480 Bits 1 Bits -82.913 uV 9.766 uV 0.500 6 4 -6.230 Bits 1 Bits -60.840 uV 9.766 uV 0.421 i g 6 5 -10.030 Bits 2 Bits -97.950 uV 19.531 uV 0.298 i i 6 6 -5.350 Bits 1 Bits -52.246 uV 9.766 uV 0.477 ;

6 7 -6.490 Bits 1 Bits -63.379 uV 9.766 uV 0.500

Avorage MEAN = -7.525 Bits, -73.487 uV Mixious PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 1. ;

a Channel - Channel 0FFSET = 4.680 Bits, 45.703 uV l

Minious Common Mode Rejection = 158.78dB on Card 6, Channel 1. ;

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 2 l h Avorige MEAN = -5.749 Bits, -56.140 uV r

Mixtous PEAK to PEAK = 5 Bits, 48.828 uV on Card 6, Channel 0.

Channol - Channel 0FFSET = 4.910 Bits. 47.949 uV

!Jntnious Common Mode Rejection = 150.82dB on Card 6, Channel 0.

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 1

CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -5.940 Btts 5 Bits -58.000 uV 48.828 uV 1.'271 I

] 6 1 -7.020 Bits 4 Bits -68.555 uV 39.063 vV 1.131 [

6 2 -4.750 Bits 5 Bits -46.387 uV 48.828 uV 1.268

. 6 3 -6.600 Bits 4 Bits -64.453 uV 39.063 uV 1.208 ,

! 4 4 -4.440 Bits 5 Bits -43.360 uV 48.808 uV 1.169 t 6 5 -0.420 Bits 5 Bits -82.227 uV 48.828 uV 1.218 6 6 -3.510 Bits 4 Bits -34.277 uV 39.063 uV 1.153 1

6 7 -5.310 Bits 4 Bits -51.856 uV 39.063 uV 1.206 L

Avorage MEAN = -5.749 Bits. -56.140 uV :

4 Miximum PEAR to PEAK = 5 Bats, 48.828 uV on Card 6, Channel 0. '

!Chinnel - Channel 0FFSET = 4.910 Bits. 47.949 uV Mintcum Common Mode Rejection = 150.82dB on Card 6, Channel 0. l Entor (1)= PRINTOUT, (2)=RESCAN. (3)= RESTART. <0, 3> ( 1) : 3 l Entor the 1st DEV!CE CODE of the I/O Controller. < 48, 63> ( 48) :

Enter the slot address of the A/D c1rd. < 0, 15) ( 1) : ,

1E-I Ad.y ts

Enter tho Dit Rosolution of tho A/D card. < 12, 14) ( 14) :

JSolecttheA/Dtypo, (0)oBIPOLAR, (1)oVNIPOLAR. < 0, 1> ( 0) :

Entor the desir0d systeo scop 10 rate in horts. < 1, 200> ( 50) I a Entor the slot address of the first gate card. < 0, 511) ( 6) :

3Entor the number of channels per card. <4, 8> ( 8) :

J Entor the number of cards to be scanned. < 1, 15> ( 1) :

Enter the gain code for the desired system Sain. < 0, 11> ( 8) :

3 of scans. < 1, 32767> ( 100) :

) Entor Solectthe desired (1)= number NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 2) : 1 9 Roturn the RTP Control Panel to the COMP mode. RETURN to continue ?

1 Avorage MEAN = -1.121 Bits, -10.950 uV McMicus PEAK to PEAK = 1 Bits, 9.766 uV on Card 6, Channel 0.

Channol - Ch.nnnel 0FFSET = 1.520 Sits, 14.844 uV ,

3 Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 3) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

Ii 6 0 -1.610 Sits 1 Bits -15.723 uV 9.766 uV 0.488 6 1 -1.780 Bits 1 Bits -17.383 uV 9.766 uV- 0.414 :

. 6 2 -0.960 Bits 1 Sits -9.375 uV 1.766 uV 0.196 ;

6 3 -1.130 Bits 1 Bits -11.035 uV 9.766 uV 0.336 6 4 -0.550 Bits 1 Bits -5.371 uV 9.766 uV 0.497

( 6 5 -1.690 Bits 1 Bits -16.504 uV 9.766 uV 0.462 l

' 6 6 -0.260 Bits 1 Bits -2.539 uV 9.766 uV 0.439 '

6 7 -0.990 Bits 1 Bits -9.668 uV 9 766 uV 0.099

= -1.121 Bits, -10.950 uV

]AverageMEAN i s Mixicum PEAK to PEAK = 1 Bits, 9.766 uV on Card 6, Channel 0. ;

Chinnol - Chinnel 0FFSET = 1.520 Bits, 14.844 uV

]Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0,3> ( 1) : 2 Avorige MEAN = -0.916 Bits, -8.948 uV Mixioum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Chanril 1.

Channel - Channel 0FFSET = 1.370 Bits, 13.379 uV Entor (1)= PRINTOUT. (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) : 1 i !

CARD CHANNEL MEAN P-P HEAN P-P STD. DEV.

6 0 -1.360 Bits 1 Bits -12.305 uV 9.766 uV 0.439 l 6 1 -1.480 Bits 1 Bits -14.453 uV 9.766 uV 0.500 ,

6 2 -0.820 Bits 1 Bits -8.000 uV ?.766 uV 0.384 6 3 -1.090 Bits 1 Bits -10.645 uV 9.766 uV 0.386 6 4 -0.330 Bits 1 Bits -3.333 uV 9.766 uV C.470 6 5 -1.290 Bats 1 Bits -12.598 uV 9.766 uV 0.454 6 6 -0.110 Sits 2 Bits -1.074 uV 19.531 uV 0.371 l 6 7 -0.950 Bits 1 Bits -9.277 uV 9.766 uV 0.218 Avorige MEAN = -0.916 Bits. -0.948 uV Nixtous PEAK to PEAR = 2 Bits. 19.531 uV on Card 6. Channel 6.

Channel - Channel 0FFSET = 1.370 Bits, 13.379 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0. 3> ( 1) : 2 Averige MEAN = 7165.809 Bits, 69.979 mV Manicum PEAK to PEAK o 3 Bits, 19.531 uV on Card 6, Channel 1.

IT /

Y. <k f. b

Channol - Channol 0FFSET o 1.580 Sits. 15.430 uV Entor (1)aPRINTOUT, (2)oRESCAN, (3)oRESTART. < 0, 3> ( 2) 1

{

CARL CHANNEL MEAN P-P MEAN P-P STD. DEV. )

6 0 7165.850 hits 1 tits 69.979 mV 9.766 uV 0.357 Y

6 1 7165.230 Sits 2 Sits 69.973 mV 19.531 uV 0.444 6 2 7166.200 Dits 2 Bits 69.983 mV 19.531 uV 0.424 6 3 7165.100 Bits 1 Sits 69.972 eV 9.766 uV 0.300 6 4 7166.520 tits 1 Bits 69.986 nV 9.766 uV 0.500 6 5 7164.940 Sits 1 Sits 69.970 mV 9.766 uV 0.237 6 6 7166.480 Bits 1 Bits 69.985 nV 9.766 uV 0.500 6 7 7166.150 Sits 1 Bits 69.982 eV 9.766 uV 0.357 I Avor.ase MEAN = 7165.809 Sits, 69.979 nV Moxicum PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 1. !

lChannol - Channel 0FFSET = 1.580 Bits, 15.430 uV i

Entor ( 1 ) = P R INT 0UT , (2)=RESCAN, (3)= RESTART. < V, 3) ( 1) : 2 Avora9e NEAN = -7166.447 Sits. -69.985 eV ,

Maxioun PEAK to PEAK = 3 Sits, 29.297 uV on Card 6, Channel 2. -

Channol - Ch.annel 0FFSET = 3.500 Sits, 25.196 uV Entor (1)= PRINTOUT. (2)=RESCAN, (3)= RESTART. <0, 3> ( 2) Invalid escape seque

/ 49 ,

] 0 I !

jCARD CHANNEL MEAN P-P MEAN P-P STD. DEV. !

6 0 '167.730 Bits 2 Bits -69.998 eV 19.531 uV 0.691 '

6 1 -7167.47G Bits 2 Bits -69.995 mV 19.531 uV 0.640 6 2 -7166.120 Bits 3 Bits -69.982 av 29.297 uV 0.431 l 6 3 -7166.350 Bits 2 Bits -69.984 eV 19.531 uV 0.517 6 4 -7165.310 Bits 2 Bits -69.974 mV 19.531 uV 0.484 t 6 5 -7166.810 Bits 2 Bits -69.989 mV 19.531 uV 0.560 4 6 -7165.150 Sits 1 Bits -69.972 nV 9.766 uV 0.357 !

6 7 -7166.640 Sits 2 Sits -69.957 mV 19.531 uV 0.520 !

Avor39e MEAN e ~7166.447 tits, -69.985 eV ,

Maxacum PEAK to PEAK = 3 Bits. 29.297 uV on Card 6, Channel 2. I Channel - Channel 0FFSET = 2.580 tits, 25.196 uV [

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0 3> ( 1) : 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV. (

6 0 -7167.730 Bits 2 Bits -69.998 mV 19.531 uV 0.691 ;

6 1 -7167. 47 0 Bit s 2 Btts -69.995 mV 19.531 uV 0.640 '

! 6 2 -7166.120 Bits 3 Bits -69.982 mV 29.297 uV 0.431 '

6 3 -7166.350 Bits 2 Bits -69.984 nV 19.531 uV 0.517 6 4 -7165.310 Pits 2 Bits -69.974 eV 19.531 uV 0.484 i 6 5 ~7166.810 Bits 2 Bits -69.999 mV 19.531 uV 0.560 l 6 6 -7165.150 Bits 1 Bits -69.972 mV 9.766 uV 0.357 !

6 7 -7166.640 Bits 2 Bits -69.937 mV 19.531 uV 0.520 f J !

Avorage MEAN = -7166.447 Bits, ~69.905 eV j i Mixious PEAK to PEAR = 3 Bits, 29.297 uV on Card 6 Channel 2. <

2.580 Bits, 25,196 uV !

l ChannoA - Channel 0FFSET =

\ JT-l l j 415p.1 l

jIntor (1)oPRINTOUT, (2)oRESCAN, (3)cRESTART. < 0, 3) ( 1) t3 Intor tho ist DEVICE CODE of the I/O Controller. < 48, 63) ( 48)

Entor the slot address of the A/D card. < 0, 15> s 11.;

Intor the Bit Resolution of the A/D card. < 12, 14) ( 14) i Soloct the A/D type, (0)= PIP 0LAR, (1)sUNIPOLAR. <0, 1> ( 0) !

Entor the desired system sample rate in herts. < 1, 200> ( 50)

] Entor the slot address of the first gate card. < 0, 511> ( 6)

J Enter the number of channels per card. < 4, 8> ( 8) i Entor the number of cards to be scanned. < 1, 15> ( 1) :

9 Entor the gain code for the desired system gain. < 0, 11> ( 8) ! 4 j Entor the desired number of scans. < 1, 32767> ( 100)

Soloct (1)= NORMAL SCAN, (2)=CONMON MODE SCAN. < 1, 2> ( 1) :

Average MEAN = 0.105 Sits, 8.203 uV Maxtcum PEAK to PIAK = 1 tits, 78.125 uV on Card 6, Channel 1.

Channol - Channel 0FFSET = 0.320 Sits, ~5.000 uV 7

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 3) 1

- CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 0.000 Bits 0 Sits 0.000 uV 0.000 uV 0.000 6 1 0.030 Sits 1 Sits 2.344 uV 70.125 uV 0.171 6 2 0.120 Bits 1 Bits 9.375 uV 78.125 uV 0.325 6 3 0.030 Sits 1 Sits 2.344 uV 78.125 uV 0.171 L 6 4 0.260 Sits i sits 20.312 uv 78.125 uV 0.439 1 6 5 0.000 Sits 0 tits 0.000 uV 0.000 uV 0.000 j 6 6 0.320 eits 1 Sits 25.000 uV 78.125 uV 0.466 6 7 0.080 tits 1 Sits 6.250 uV 78.125 uV 0.271 l Avorage MEAN = 0.105 Bats, 8.203 uV JMixious PEAK to PEAK = 1 tits, 78.125 uV on Card 6, Channel 1.

Chtnnel - Channel 0FFSET = 0.320 Sits. 25.000 uV 1aIntor (1)= PRINTOUT, ( 2 )= RESC AN , (3)= RESTART. < 0, 3) ( 1) i2 gAvor 9e MEAN = 7165.550 bits, 559.009 mV jMaximum PEAK to PEAR = 2 tits, 156.250 uV on Card 6. Channel 1.

Channol -

Channel 0FFSET = 0.930 Bits, 72.670 uV

~

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) I 1

_ CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

w 6 0 7166.020 Bits 1 Bits 559.845 mV 78.125 uV 0.140 6 1 7165.620 Bats 2 Bits 559.814 mV 156.250 uV 0.525 5 6 2 7165.980 Bits 2 Bits 559.842 nV 156.250 uV 0.244 6 3 7165.120 Bits 1 Sits 559.775 mV 78.125 uV 0.325 2

6 4 7165.310 Bits 1 tits 559.790 nV 78.125 uV 0.462 6 5 7165.090 Bits 1 Dits 559.773 mV 78.125 uV 0.286 7165.250 Stts 1 lits 559.785 mV 78.125 uV 0.433

} .

6 6

6 7 7166.010 Bats 2 Bits 559.844 mV 156.250 uV 0.264 1Avors9e MEAN = 7165.550 Bits, 559.809 nV Nixsous PEAK to PEAK = 2 Bits, 156.250 uV on Card 6, Channel 1.

,Or.anns1 - Channel 0FFSET = 0.930 Bats, 72 670 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : 2 Avorige MEAN = -7164.586 Bits. -559.733 mV ,

e Att..\ p.;

nixtcuo PEAK to PEAK a 2 Bits, 106,300 uV on Card 6, Ch annol 1. l lChannol - Channol 0FFSET o 0.990 Bits, 77.334 uV l a Enter (1)aPRINT007, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 l

0 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

3 6 0 -7165.110 Bits 1 Bits -559.774 mV 78.125 uV 0.313 1 j 0 1 -7165.010 Bits Bits -559.766 mV 156.250 uV 0.264 1 6 2 -7164.800 Bits 2 Bits -559.756 mV 156.250 uV 0.407 9 0 3 -7164.120 Sgts 1 Bits -559.697 mV 78.125 uV 0.325

,j 6 4 -7164.220 Bits 1 Bits -559.705 mV 78.125 uV 0.414 6 -7164.180 Bits -559.702 mV 5 1 Bits 78.125 uV 0.384 6 6 -7164.140 Bits 1 Bits -559.698 mV 78.125 uV 0.347 6 7 -7165.030 Bits 2 Bits -559.768 mV 156.250 uV 0.222 Avorsse MEAN = -7164.506 Bits, -559.733 mV Ncxitum PEAK to PEAK = 2 Bits, 156.250 uV on Card 6, Channel 1.

I Channol - Ch.annel 0FFSET = 0.990 Bits, 77.324 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 3 Entor the 1st DEVICE CODE of the I/O Controller. < 40, 63> ( 40) :

Entor the slot address of the A/D card. < 0, 15) ( 1) :

Intor the Btt kesolution of the A/D card. < 12, 14> ( 14) :

lSoloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1> ( 0) :

Entor the desired system simple rate in herto. < 1, 200> ( 50)

Enter the slot address of the first gate card. < 0, 511> ( 6) :

9Entor the number of channels per card. <4, 8> ( 8) :

Entor the number of cards to be scanned. < 1, 15> ( 1) :

Entor the gain code for the desired system gain. < 0, ~1> ( 4) : 0 Entor the destred number of scans. < 1, 32767> ( .io) :

)Soloct (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 1) :

4 Avorage MEAN = 0.053 Bits, 65.625 uV Mixtcum PEAK to PEAK = 1 Bits, 1.250 mV on C.ard 6, Channel 0.

Channel - Channel 0FFSET = 0.060 Bits, 75.000 uV Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 3) : 1

' CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

) 6 0 0.050 Bits 1 Bits 62.500 uV 1.250 mV 0.218 J 6 1 0.070 Bits 1 Bits 87.500 uV 1.250 mV 0.255 6 2 0.060 Bits 1 Bits 75.000 uV 1.250 mV 0.237 6 3 0.080 Bits 1 Bits 100.000 uV 1.250 mV 0.271 6 4 0.020 Bits 1 Bits 25.000 uV 1.250 mV 0.140 6 5 0.040 Bits 1 Bits 50.000 uV 1.250 mV 0.196 6 6 0.040 Bits 1 Bits 50.000 uV 1.250 mV 0.196 6 7 0.060 Bits 1 Bits 75.000 uV 1.250 mV 0.237 4

cvorige MEAN = 0.053 Bits, 65.625 uV (n3xtcum I

PEAK to PEAK = 1 Bits, 1.250 mV on Card 6, Channel 0.

. Channel -

Channel 0FFSET = 0.060 Bats, 75.000 uV 1Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> < 1) : 2

,'Avori9e MEAN r 7168.886 Bits, 8.961 V

,nintous PEAK to PEAK = 2 bits, 2.500 nV on C.ard 6, Channel 0.

Channol - Channel 0FFSET = 1.300 Bits, 1.625 mV Entor (1)=Pk!NTOUT, (2)=RESCAN, ( 3 ) = R F.S T A R T . <0, 3> ( 2) : 1 21-I Att 3,p.=2.

CARD CHANNEL M2AN P-P MEAN PP STD. DEV.

6 0 7169.330 Sits 2 Bits 8.962 V 2.500 eV 0.491 6 1 7169.180 lits 1 Bits 8.961 V 1.250 eV 0.384

?

6 2 7168.130 Sits 1 tits 8.960 V 1.250 mV 0.336

( 6 3 7169.130 Bits 1 Bits 8.961 V 1.250 nV 0.336 i' 6 4 7169.170 tits 1 lits 8.961 V 1.250 nV 0.376 6 5 7168.030 Bits 1 Bits 8.960 V 1.250 eV 0.171 6 6 7169.030 Sits 1 tits 8.961 V 1.250 mV 0.171 6 7 7169.080 Bits 1 Bits 8.961 V 1.250 nV 0.271 Avorige MEAN = 7168.886 Bits, 8.961 V Msxicum PEAK to PEAK = 2 tits, 2.500 eV on Card 6, Channel 0. **

Channel - Channel 0FFEET = 1.300 lits, 1.625 nV .

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) 2 Avor49e MEAN = 7168.328 Bits. -0.960 V Maxicus PEAK to PEAK = 2 Bits, 2.500 nV on Card 6, Channel 3.

Channol - Channel 0FFSET = 1.790 Bits, 2.238 eV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) t 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -7169.000 Sits 0 8tts -8.961 V 0.000 uV 0.000 6 1 -7169.000 Bits 0 Sits -8.961 V 0.000 uV 0.000 6 2 -7168.870 Sits 1 tits -8.961 V 1.250 mV 0.336 6 3 -7167.210 Bits 2 Bits -8.959 V 2.500 eV 0.475 6 4 -7167.360 Sits 2 Bits -8.959 V 2.500 nV 0.575 6 5 -7168.440 Bits 1 Bits -8.961 V 1.250 mV 0.496 6 6 -7167.740 Sits 2 Bits -8.960 V 2.500 nV 0.559 6 7 -7169.000 Sits 0 Bits -8.961 V 0.000 uV 0.000 Avorage MEAN = -7168.328 Bits, -8.960 V flaxicum PEAK to PEAR = 2 Bits, 2.500 eV on Card 6. Channel 3.

Channol - Chinnel 0FTSET = 1.790 tits, 2.238 nV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) t 0

! 3I. /

M. 3, p.,

. 3 lEntor tho slot addroso of tho A/D card. <Entor tho 1st DEVICE 2Aeg7pL3 Ec !

0, 15>CODE

( 1)of:tho I/O Centro 11or. < 48, 63> ( 4 Entor the Bt t Resolution of the A/D card. < 12, 14> ( 14) : E**Ifd Soloct the A/D type, (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1> ( 0) appp gg Entor the desired tysten sample rate in hert=. < 1, 200> ( 50) t Entor the slot iddress of the first gate card. < 0, 511) ( 6) t C =aruus iEnter the numbtr of channels per card. <4, 8> ( 8) 3 'e.eL

. 4,,

} Enter the number of cards to be scinned. < 1, 15> ( 1) :

Entor the gain code for the desired systen 9ain. < 0, 11) ( 8) :

Enter the desired number of scans. < 1, 32767> ( 100) t Solect (1)= NORMAL SCAN. (2)= COMMON MODE SCAN. < 1, 2) ( 1) : 2 Entor the applied common mode volta 9e (P-P). < 1, 1700> ( 1) i 1697 Asorage MEAN = -0.076 Bits, -0.745 uV Mexicus PEAK to PEAK = 2 Bits, 19.534 uV on card 6, Channel 1.

Channol - Channel 0FFSET = 4.730 Bits, 46.192 uV Minious Common Mode Rejection = 158.78dB on Card 6, Channel 1.

Entor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3) ( 3) : 1 i CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

6 0 -0.990 Sits 1 Bits -9.668 uV 9.766 uV 0.099 p 6 1 -3.000 Bits 2 Bits -29.297 uV 19.531 uV 0.245 '

! 6 2 0.460 Bits 2 Bits 4.492 uV 19.531 uV 0.537 6 3 -0.470 Bits 1 Sits -4.590 uV 9.766 uV 0.499 3

6 4 1.730 Bits 1 Bits 16.095 uV 9.766 uV 0.444 6 5 -0.650 Bits 1 Bits -6.348 uV 9.766 uV 0.477 6- 6 1.400 Bits 1 Bits 13.672 uV 9.766 uV 0.490 3 6 7 0.910 Bits 1 Bits 8.887 uV 9.766 uV 0.286 Average MEAN = -0.076 Bits. -0.745 uV [

Maxicus PEAK to PEAK = 2 Dits, 19.531 uV on Card 6, Channel 1.

3 Channel -

Channel 0FFSET = 4.730 Bits. 46.192 uV Mintmum Common Mode Rejection = 158.78dB on Card 6, Channel 1.

>Entor (1)= PRINTOUT, (2)=R2 SCAN. (3)= RESTART. <0, 3> ( 1)

2 l

Avorige MEAN = 0.040 Bits. 0 391 uV

,nixtcus PEAK to PEAK = 2 Bits, 19.531 uV on Card 6, Channel 1.

Channol - Channel 0FFSET = 4.070 Bats, 29.7(6 uV ;

.Mintcus Conson Mode Rejection = 158.78u3 on Card 6, Chinnwl 1. ,

VEntor (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0 3) ( 2) 1 CAFD CHANNEL P-P !

MEAN MEAN P-P STD. DEV.

6 0 -0.910 Bhts 1 Bits -8.887 uV 9.766.uV 0.286 6 1 -2.450 Stts 2 Bits -23.926 uV 19.531 uV 0.536 4 6 2 0.630 Bits 2 84ts 6.152 uV 19.531 uV 0.523 l I 6 3 -0.350 Bats 1 Sits -3.418 uV 9.766 uV 0.477 l

6 4 1.620 Bits 1 Stts 15.820 uV 9.766 uV 0.485 l 6 5 -0.490 Bits 1 Bits -4.785 uV 9.766 uV 0.500 6 6 1.390 Bits 1 Sits 13.574 uV 9.766 uV 0.488 6 7 0.880 Bits 1 Bits 8.594 uV 9.766 uV 0.325 Avors9e MEAN = 0.040 Bats. 0.391 uV nsxtcum PIAK to PEAK = 2 Bits, 19.531 uV on Card 6. Channel 1.

Channol - Chsnnel 0FFSET = 4.070 Stts6 39.746 uV Mantoun Connon Mode Rejection = 158.78dB on Ciro 6, Cninnel 1.

1-/

AtAp.=W

._~n i

Entor (1)oPRINf0VT, (2)eRESCAN, (3)oRESTART. < 0, 3) ( 1) 82 !

I 3 Avorage MEAN = 0.076 bits, 0.745 uV l Mixicum PEAK to PEAK = 2 tits, 19.531 uV on Card 6, Channel 6. ;

Channol - Channel 0FFSET = 3.610 tits, 35.254 uV l

,Minicum Common Mode Rejection = 159.78dB on Card 6, Channel 6. !

l Entor (1)= PRINTOUT, (2)=RESCAN, (3)=RISTART. < 0, 3> ( 2) 1 CARD CHANNEL MEAN P-P MEAN P-P STD. DEV. f l

6 0 -0.770 Dats 1 tits -7.520 uV 9.766 uV 0.421 :

6 1 -2.170 tits 1 tits -21.191 uV 9.766 uV 0.376 I 6 2 0.620 Dats 1 tits 6.055 uV 9.766 uV 0.485 6 3 -0.310 tits 1 tits -3.027 uV 9.766 uV 0.462 6 4 1.440 Dats 1 Bits 14.063 uV 9.7C6 uV 0.496 4

6 5 -0.380 tits 1 tits -2.734 uV 9.766 uV 0.449 6 6 1.250 Dats 2 Bits 12.207 uV 19.531 uV 0.456 6 7 0.830 tits 1 tits 3.105 uv 9.766 uV 0.376 Avorage MEAN = 0.076 Bits, 0.745 uV Msutoum PEAK to PEAK = 2 bits, 19.531 uV on Ctrd 6 Channel 6.

Channol - Channel 0FFSET = 3.610 Dits. 35.254 uV

!Mantoun Common Mo1e Rejection = 158.7848 on Card 6, Channel 6.

Enter (1)= PRINT 097 (2)=WESCAN, ( 3)= RES TA RT. < 0, 3> ( 1) i2 Avorage MEAN = 0.104 bits, 1.013 uV Msxtoum PEAR to PEAK = 5 tits, 48.828 uV on Card 6, Channel 6.

Channol - Channel 0FFSET = 3.600 Bits, 35.156 uV Minteum Common Mode Rejection = 150.9249 on Card 6, Channel 6.

Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3) ( 2) i 1

. CARD CHANNEL MEAN P-P MEAN P-P STD. DEV.

> 6 0 0.000 Bits 4 B i t.s 0.000 uV 39.063 uV 1.158 6 1 -2.100 tits 3 tits -20.500 uV 29.297 uV 1.054 6 2 0.580 Bits 4 bits 5.664 uV 39.063 uV 1.201 3 6 3 -0.130 tits 4 tits -1.270 uV 39.063 uV 1.074 6 4 1.140 Bits 4 bits 11.133 uV 39.063 uV 1.200 6 5 -0.480 Dats 3 tats -4.608 uV 29.297 uV 0.995 6 6 1.500 Dats 5 tits 14.648 uV 48.528 uV 1.187 6 7 0.320 Dits 3 tits 3.125 uV 29.297 uV 1.232 .

Avori9e MEAN = 0.104 Bats. 1.013 uV ntninum PEAK to PEAR = 5 Bits, 49.829 uV on Card 6. Channel 6.

Channol - Channel 0FFSET = 3.600 Dats, 35.156 uV nintnum Common Nodo Rejection = 150.924) on Card 6 Channel 6.

'Entor (1)= PRINTOUT. (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) i H~l M.3,p..u

934W

~

!.jU.A.I.C.S. TEST PROGRAF for B. G. E. ACCEPTANCE - Version 12-JAN-84 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 40) : U.A.I.C.S. TE

]Enterthe 84 ,

Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) :

1 Enter the slot .a dd r e s s of the A/D card. < 0, 15> ( 0) : 1 94ev 1* l jEnter the Bit Resolution of the A/D card. < 12, 14> ( 12) : 14 Select the A/D type, (0)= BIPOLAR, (1 ) = UN IPO L AR . < 0, 1> ( 0) : 0 g 1 Enter the desired systaa rample rate in hert=. < 1, 200> ( 100) : 50 ;g"j d

, Enter the slot address of the first gate card. < 0, 511> ( 0) : 6 7p( G Enter the number of channels per card. <4, 8> ( 8) : TI Enter tne number of cards to be scanned. < 1, 15> ( 1) :

q; Enter tne gain code for the desired system gain. < 0, 11> ( 0) : 11

Enter the desired number of scans. < 1, 32767> ( 1): 100 Select (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 1) :

1 11Averace MEAN = -1.678 Bits. -2.048 uV

)~ Maximum PEAR to PEAK = 10 Bits. 12.207 uV on Card 6, Channel 2.

hChannel -

Channel 0FFSET = 4.900 Bits, 5.981 uV l

d Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 1

. CARD CHANNEL hEAN P-P MEAN 4, t P-P STD. DEV.

, trl 6 0 -3.540 Bits 9 Bits -4.321 uV 9.766 uV 1.545 6 1 -2.310 Bits 8 Bits -2.820 uV 9.766 uV 1.598 6 0 -1.230 Bits 10 Bits -1.501 uV 12.207 uV 1.624 6 3 -2.260 Bits 6 Bits -2.759 uV 7.324 uV 1.301 6 1 -0.820 Bits 8 Bits -1.001 uV 9.766 uV 1.465 0 5 1.000 Bits 9 Bits 1.045 uV 10.986 uV 1.643 6 6 -0.400 Bits 6 Bits -0.488 uV 7.324 uV 1.334 6 7 -3.880 Bits 8 Bits -4.736 uV 9.766 uV 1.423

,Averige MEAN = -1.678 Bits. -2.048 uV

' M v: 1 m u m PEAK to PEAK = 10 Bits, 12.207 uV on Card 6, Ch.annel 2.

%. Channel Chtnnel 0FFSET = 4.900 91ts. 5.981 uV b

Enter (1)= PRINTOUT, (2)=hESCAN, (3)=RESTAkT. <0, 3> ( 1) :

,,DsLCAL Card TEST PROGRAM for B. G. E. ACCEPTANCE - Version 10-JAN-84 E :er the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) :

E r. t e r the slot scdress of the A/D card. < 0, 15> ( 0) : 1

' Enter the Bit Rosolution of the A/D card. < 12, 14> ( 12) : 14 3 elect the A/D type, (0)=B1 POLAR, ( 1 ) =UN IPO L AR . <0, 1; ( 0) :

Enter the slot address of the first c ar d. + 0, 15:- ( 0) :

Unter tne number of cards to be scanned. < 1, 15; ( 1) :

SCAN Types -

0) = OFFSET

1) = PLUS POLARITY (2) = MINUS POL ARITY (3) = SYSTEM MONITOR 3 elect SCAN TYPE. < 0, 3? ( 0) : 3 Enter tne desired number of .: ins. < '

. 32767: ( 100) :

CARD CHANNEL MEAN P-P FUNCTION NOMINAL 0 0 1.006 V 605.000 uV +15 volts +1 volt '

O 1 -1.009 V 625.000 uV -15 volts -1 volt 0 2 996.794 mV 1.250 mV +5 volts +1 volt 0 3 418.444 mV 625.000 uV +12 volts +1 volt 2N A#. 4 p.M

0 4 -637.500 uV 625.000 uV 48/125 volts +1 volt j 0 5 -637.500 uV 625.000 uV 48/125 volts +1 volt C.105 C q

0 0

6 7

W .414- c

-273.210 C 0.000 C lEMP TEMP B O *l 3 Select (1) = RETEST. (2) = NEWTEST. < 0, 2) ( 1) :

?

]

.d l

)

l 9

tg

>~

rA QQ-

~.-

i l

l 1

1-1 A#. 3 p.a

~ '

sec.T i 62.J 7_ f ~

U.A.I.C.S. TEST PROGRAM for B. G. E. ACCEPTANCE - Version 12-JAN-84 U"d ' A'Y " U Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 40) : ' I# I Enter the slot address of the A / D c .a r d . < 0, 15> ( 0) : 1 s 67-1 4 Enter the Bit Resolution of the A/D card . < 12, 14> ( 12) : 14 Select the A/D type, (0)= BIPOLAR, (1 ) =UN IPO L A R . <0, 1>( 0) :

Enter the desired system sample r ate in hert=. < 1, 200> ( 100) : 50

' Enter the s1ct . address of the first gate card. < 0, 511> ( 0) : 6 Enter the number of channels per card. < 4, 8> ( 8) :

Enter the number of cards to be scanned. < 1, 15> ( 1) :

Enter the gain code for the desired system gain. < 0, 11> ( 0) : 11 Enter the desired number of scans. < 1, 32767> ( l .) : 100 Select (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, 2> ( 1) :

1 Average MEAN = -2.340 Bits, -0.856 uV lMaxamum PEAK to PEAK = 9 Bits, 10.986 uV on Card 6, Channel 0.

, Channel -

Channel 0FFSET = 6.740 Bits, 8.228 uV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1 : 1 CARD CHANNEL MEAN P-P MEAN " '

P-P STU. DEV.

6 0 -4.600 Bits 9 Bits -5.615 uV 10.986 uV 1.503 6 1 -2.460 Bits 9 Bits -3.003 uV 10.986 uV 1.565 6 2 -2.000 Bits 8 Bits -0.539 uV 9.766 uV 1.707 6 3 -2.740 Bits 8 Bits -3.345 uV 9.766 uV 1.671 I

6 4 -1.580 Bits 8 Bits -1.929 uV 9.766 uV 1.600 6 5 1.440 Bits 9 Bits 1.758 uV 10.986 uV 1.657 6 6 -1.400 Bits 7 Bits -1.709 uV 8.545 uV 1.685 6 7 -5.300 Bi t s 7 Bits -6.470 u 8.545 uV 1.338 Average MEAN = -2.340 Bits. -2.856 uV Maximum PEAK to PEAK = 9 Bits, 10.986 uV on Card 6 ':hannel 0.

Channel -

Channel 0FFSET = 6.740 Bits, 8.228 uV l Enter (1)=PRINIOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) :

DALCAL Card TEST PROGRAM for B. G. E. ACCEPTANCE - Version 10-JAN-84 E r +.e r the 1st DEVICE CODE of the I/O Controller . , 48, 63) ( 48) :

' Enter the slot address of the A/D card. < 0. 15 ( 0) : 1

! Enter the Bit Resolbtion of the A/D card. < 12, 14) ( 12) : 14 Select the A/D tvpe. (0)= BIPOLAR, (1)= UNIPOLAR. < 0, 1; < 0) :

Enter the slot address of the first card..< 0, 15> ( 0) :

Enter t ie number of cards to be scanned. < 1. 15 ( 1) :

lGCAN Tvpes (0) = OFFSET l (1) = PLUS POLARITY (2) = MINUS POLARITY l

l (3) = SYSTEN MONITOR

' Select SCAN TYPE. <0 3: ( 0) : 3 Enter the desired number of seins. s 1, 32767> ( 100) :

f CARD CHANNEL NEAN P-P FUNCTION NOM IN A L 0 0 1.006 V 625.000 uV +15 volts +1 volt 0 1 -1.009 V 625.000 uV -15 volts -1 volt o 3 996.862 mV 1.250 mV +5 volts +1 volt 0 3 418.G87 mV 625.000 uV +12 volts +1 volt

[ 0 4 -1.231 mV 625.000 uV 40/125 volts +1 volt 0 5 -1. 231 mV ~?t onn_w' a9/125 volts +1 volt 0 6 Q .981 C 0.125 C TEhF s 'E 7 0 -2 7 3. .ut i v.Gv0- Y IE HP" /

                                                                                                                                   . Y f f. h

Enter the .' s t DEVICE CODE of the I/O Controller. < 8, 63> ( 48) : liecTEa 13 l Enter the slot address of the A/D card. < 0, 15> ( 1) : Enter the Bit Resolution of the A/D card. < 12, 14> ( 14) : g ue ,,p y m. L Select the A/D type. (0)= BIPOLAR. (1)= UNIPOLAR. <0, 1> ( 0) : Ul-\ V 1 Enter the desired system sample rate in hert . < 1, 200> ( 50) : ampe Enter the slot address of the first gate card. < 0, 511> ( 4) : 6 43 =T I 4-Enter the number of channels per card. <4, 8> ( 8) : Enter the number of cards to be scanned. < 1. 15> ( 1) : Enter the gain code for the desired system 9ain. < 0, 11> ( 11) : Enter the desired number of scans. < 1, 32767> ( 100) : Select (1)= NORMAL SCAN, (2)= COMMON MODE SCAN. < 1, ?> ( 1) : Average MEAN = -2.716 Bits, -3. 316 uV Maximum PEAK to PEAK = 10 Bits, 12.207 uV on Card 6, Channel 5. Channel - Channel 0FFSET = 6.540 Bits, 7.983 uV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3> ( 2) : 1 CARD CHANNEL MEAN P-P MEAN ,) P-P SID. DEV. 6 0 -4.990 Bits 8 Bits -6.079 u 9.766 uV 1.f49 6 1 - 2 . 'P) 0 Bits 8 Bits -3.113 uV 9.766 uV 1.621 6 2 -0.210 Bits 8 Bits -2.698 uV 9.766 uV 1.796 6 3 -3.510 Pits 9 Bits -4.285 uV 10.986 uV 1.775 6 4 -2,100 Bits 7 Bits -2.563 uV 8.545 uV 1.658 6 5 0.900 Bits 10 Bits 1.099 uV I 12.207 uV 1.900 6 6 -1.640 Bits 7 Bits -2.0e?, uV 8.545 uV 1.786 6 7 -5.640 Bits 8 Bits -6.885 uV 9.766 uV 1.507 Average MEAN = -0.716 Bits, -3.316 uV Maximum PEAK to PEAK = - 10 Bits, 12.207 uV on Card 6 Channel 5. C h:enne l - Channel 0FFSET = 6.540 Bits, 7.983 uV Enter (1)=PRINTOLT. (2)=RESCAN, (3)= RESTART. < 0, 3> ( 1) : DALCAL Card TEST PROGRAM for B. G. E. ACCEPTANCE - Version 10-JAN-84 Enter the 1st DEVICE CODE of the I/O Controller . < 48, 63> ( 48) : Enter the slot address of the A/D card. < 0. 15> ( 0) 1 Enter the Bit Resolution of the A/D card. < 12, 14> ( 12)

14 Select the A/D type, (0)= BIPOLAR, (1 ) =UN IPOLAR . < 0, 1>( 0) :

Enter the slot address of the first card. < 0, 15) ( 0) : 2nter the number of cards to be scanned. < 1, 15> ( 1) : SCAN Types - (0) = OFFSET (1) = PLUS POLARITY (2) = MINUS POLARITY (3) = SYSTEM MONITOR Select SCAN TYPE. O. 3; ( 0) : 3 Inter the desired number of scans. ( 1, 32767? ( 100) : CARD CHANNEL MEAN P-P FUNCTION NOM IN AL 0 0 1.006 V 1.250 mV +15 volts +1 volt 0 1 -1.009 V 625.000 uV -15 volts -1 volt 0 2 996.444 mV 625.000 uV +S volts +1 volt 0 3 418.381 mV 625.000 uV +12 volts +1 volt 0 4 -1.250 mV 0.000 uV 48/125 volts +1 volt 0 5 ' _ : ". 5 ./- _ " ^^^ ;' ae/$S5 volts +1 volt 0 df' 6 27.277 C 0.125 C T ]EMP A d' D 0 7 -;<3.;56 L u.gos 6 IN B JI-/

                                                                                                                                              /bf. g p,,ay

6 3 -2.690 Bits 8 Bits -3.284 uV 9.766 uV 1.566 l! 6 4 -1.470 Bits 7 Bits -1.794 uV 8.545 uV 1.539 6 5 1.550 Bits 9 Bits 1.892 uV 10.986 uV 1.774 6 6 -1.190 Bits 9 Bits -1.453 uV 10.986 uV 1.604 6 7 -5.160 Bits 8 Bits -6.299 uV 9.766 uV 1.515 itL Average MEAN = -2.216 Bits, -2.705 uV T M a :< i m u m PEAK to PEAK = 10 Bits, 12.207 uV on Card 6, Channel 0. Channel - Channel 0FFSET = 6.710 Bits, ' 191 uV - Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. < 0, 3) ( 1) : 1 L t e a W m Jf- / A11.5,p.31

2 ' Enter the 1st DEVICE CODE of the I/O Controller. < 48, 63> ( 48) : Enter the slot iddress of the A/D card. < 0, 15> ( 1) : S C *T N^ Enter the Bit Resolution of the A/D card. < 12. 14> ( 14) : 'E/-lf4 Select the A/D type, (0)= BIPOLAR, (1 ) =UN IPOL AR . <0, 1> ( 0) : 3; ,gy gg Jg Enter the slot address of the first car d. < 0, 15> ( 0) : Enter the number of cards to be scanned. < 1. 15> ( 1) : h*M #O T SCAN Types - (0) = OFFSET , (1) = PLUS POLARITY (2) = MINUS POLARITY (3) = SYSTEM MONITOR Select SCAN TYPE. <0, 3> ( 0) : 3 l Enter the desired number of scans. < 1, 22767> ( 100) : }CARDCHANNEL MEAN P-P FUNCTION NOMINAL 0 0 1.006 V 625.000 uV +15 volts +1 volt 0 1 -1.009 V 625.000 uV -15 volts -1 volt 0 2 996.500 mV 625.000 uV +5 volts +1 volt 0 3 418.406 mV 625.000 uV +12 volts +1 volt 3 0 4 -1.231 mV 625.000.uV 48/125 volts +1 volt 0 M -1.225 z '.' ~27 nno uV 49/125 volts +1 volt

 ,       0              -

a$5 .o a Select (1> = RETEST. (2) = NEWTEST. <0, 2> ( 2) : U.A.I.C.S. TEST PROGRAM for B. G. E. ACCEPTANCE - Version 12-JAN-84 Enter the 1st DEVICE CODE of the I/O Controller. < 48. 63> ( 48) : Enter the slot address of tne A/D card. < 0, 15> ( 0) : 1 $ Enter the Bit Resolution of the A/D card. < 12, 14> ( 12) : 14 Select the A/D type, (0)= BIPOLAR. (1) =UN IPOL AR . < 0, 12 ( 0) : Enter the desired system sample rate in hert . < 1, 200> ( 100) : 50 Enter tne slot address of tne first gate card. < 0, 511> ( 0) : 6 Enter the number of enannels per card. <4, 81 ( 8) : Enter the number of cards to be scanned. < l. 15> ( 1) : Enter the gain code for the desired system gaan. ( 0, 11> ( 0) : 11 (Enter tne desired number of scans. < 1. 32767> ( 1) : 100

Select (1)= NORMAL SCAN. (2)= COMMON MODE SCAN. < 1, 2> ( 1)

[ Average MEAN = -2.161 Bits. -0.638 uV ni::1 mum PEAK to PEAK = 11 Bits, 13.428 uV on Card 6. Channel 4. Channel - Channel 0FFSET = 6.740 Bits. 8.228 uV Enter (1)= PRINTOUT, (2)=RESCAN, (3)= RESTART. <0, 3> ( 1) : 1 CARD CHANNEL MEAN P-P MEAN NE E P-P STD. DEV. F l 6 0 -4.660 Bits 10 Bits -5.688 uV 12.207 uV 1.485 6 1 -2.370 Bits 8 Bits -0.893 uV 9.766 uV 1.695 6 2 -1.810 Bits 9 Bits -2.209 uV 10.986 uV 1.953 f 6 3 -2.500 Bits 8 Bits -3.149 uV 9.766 uV 1.686 l 6 4 -1.410 Bits 11 Bits -1.721 uV 13.428 uV 1.770 6 5 1.770 Bits 9 Bits 3.161 uV 10.986 uV 1.886 [ 6 6 -1.260 Bits 8 Bits -1.538 uV 9.766 uV 1.759 6 7 -4.970 Bits 9 Bits -6.067 uV 10.986 uV 1.634 Y Aver 39e MEsN = 2.161 Bits. -0.638 uv n i::I m u m PEAK to PEAK = 11 Bits. 13.428 uV on Cird 6. Chinnel 4. Chinnel - Channel 0FFSET = 6.740 Bits. 8.228 uV [ II- / Att. 3, p.3-1 - _ _ _ _ _

DRAWING CHANGE NOTICE 5 % 1,,-2x 5e. 2 0, s BALTIMORE GAS & ELECTRIC COMPANY NUCLEAR ENGINEERING SERVICES DEPARTMENT 6"J DWN m W CHK 05GN e CHK

                                                                              ,e , f DE f3 No A P'O      DATE
                                                      '"^"     '

CALVERT CLIFFS UNIT 14 7 witH FcR N . 8%-lO29 RE ASON FOR CHANGE USE WITH D*0' "O I"O ~ 1'I 7 ' E ' 8 V- 'l IM%TLM OF PL/sM'T COMPUTETR. BECHTf L NO, M - \co O' 4 m 6n \ IO 99 g hh5 q" f (e E m 6 m /w m a d N o 5 (n E 8 5n M fo - hE y f0 @o 5 b 5 &

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ML20155H216

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