ML20067B027
ML20067B027 | |
Person / Time | |
---|---|
Site: | 05200003 |
Issue date: | 02/01/1994 |
From: | WESTINGHOUSE ELECTRIC COMPANY, DIV OF CBS CORP. |
To: | |
Shared Package | |
ML19303F884 | List: |
References | |
WCAP-8898-ADD, WCAP-8898-ADD-02, WCAP-8898-ADD-2, NUDOCS 9402220258 | |
Download: ML20067B027 (14) | |
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WESTINGHOUSE CLASS 3 (Non-Proprietary) 'n [y { ? y;;l 'f s 5 1 r + 4 n th r a
WESTINGIIOUSE NON-PROPRIETARY CLASS 3 WCAP 8898 Addendum 2 Westinghouse Class 2 Version Esists as WCAP-8897 Addendum 2 ( l l BYPASS LOGIC FOR Tile WESTINGilOUSE INTEGRNTED PROTECTION SYSTEM AP600 Bypass 1 opic Impleme* tation DescriNion (C) WESTINGilOUSE ELECTRIC CORPORATION 1994 A license is reserved to the U.S. Government ander contract DE-ACO3-90SF1849 Wr~MGHOUSE NON PP.OPRIETARY CLASS : l Westinghouse Electric Corporation Energy System Business Unit Advanced Technology Business Arca P. O. Box 355 Pittsburgh Pennsylvania 15230 01994 Westingbouse Electric Corporation All Rights Reserved l l 1 J
4 s WESTINGIIOUSE NON. PROPRIETARY CLASS 3 AP600 Bypass Logic Implementation Description i Table of Contents 1 1 1.0 Introduction I 2.0 Summary of Clarifications 1 3.0 Reactor Trip Bypass Description 2 2 ] 3.1 Reactor Trip Logic Operation. 3.2 - Reactor Trip Path Uk)ck Diagram 2 3.3 - Typical Sensor Channel Reactor Trip - Trip Path Logic l 3.4 - Global Bypass - Bypass Path Logic 4 3.5 - Logic Performed by a Typical Trip Path DLU Circuit.. 4 3.6 - Logic Performed by Specialized DLU Circuits 5 t 12 4.0 ESF Bypass implementation 5.0 References. 12 -j i b List of Figures Figure 3.1-Reactor Trip Logic Operation. 6 l 7 .l Figure 3.2 - Reactor Trip Path Block Diagram Figure 3.3 - Typical Sensor Channel Reactor Trip - Trip Path lx)gic...... 8 Figure 3.4 - Global Bypass - Bypass Path Logi 9 10 Figure 3.5 - Logic Performed by a Typical Tr.; % DLU Circuit.. Figure 3.6 - Logic Performed by Specialized D1 ' f.rcuits.... I1 i 4 ? t i Revision: O GW-J1R-006 Febmary 1,1994 i f -m - -. - ~
i + WESTINGIIOUSE NON-PROPRIETARY CLASS 3 AP600 Bypass Logic Implementation Description 1.0 Introduction This report is an addendum to WCAP-8897, " Bypass Logic for the Westinghouse Integrated Protection System." WCAP-8897 functionally describes the bypass logic used in Westinghouse advanced instrumentation and control systems. This report describes the specific implementation of the reactor trip logic system that incorporates the bypasses of the reactor trip functions for the Westinghouse AP600 protection and safety monitoring system. This addendum does not alter the concepts presented in WCAP-8897, rather it expands upon those concepts by providing additional details of the system design. 'Ihe hardware used to implement the functions described in WCAP-8897 f or the AP600 is described in WCAP-13382, "AP600 Instrumentation and Control Hardware Descriptiort." References will be made to specific sections of WCAP-13382 throughout this report. Other information about the design of the AP600 reactor trip logic and engineered safety features (ESF) actuation logic can be found in WCAP-13594," Advanced Passive Plant Protection System Failure Modes and Effects Analysis," and WCAP-13633, "AP600 Instrumentation and Control Defense-in-Depth and Diversity Report." f Note: Addendum 1 to WCAP-8897 described the implementation of the functions described in WCAP-8897 for the RESAR 414 reference plant. 2.0 Summary of Clarifications The RES AR 414 reference plant, that was addressed by WCAP-8897, used different technologies in its design than the AP600. This section identifies differences in the implementation that resulted from improvements in the implementation technology. I The functions of the trip bus and the reactor trip breaker bypass device described in t WCAP-8897 have been implemented by the dynamic trip bus and reactor trip breaker arrangement. The AP600 bypass path and power converter together are equivalent to the reactor trip breaker bypass device described in WCAP-8897. The AP600 reactor trip subsystems are equivalent to the trip logic computers desenbed in WCAP-8897. In addition, two changes have been made in the.AP600 functional design. In the AP600 trip logic design, logic has been added to remove the global bypass permissive (and thereby generate a trip demand if a global bypass request is present) when two of the remaming cabinet sets have a trip demand. Revision: O GW.J1R-006 February 1,1994 1 1 I 1 J
S i i WESTINGIIOUSE NON-PROPRIETARY CLASS 3 t AP600 Bypass Logic Implementation Description The AP600 protection logic cabinets implementation uses 2-out-of-3 logic for the LISF power 4 interface. as described in WCAP-13382. 1 3.0 Reactor Trip Bypass Description 3.1 Reactor Trip Logic Operation Figure 3.1 illustrates Ibe functional behavior of the reactor trip logic in three tables. The top two tables describe the logic performed in the four cabinet sets to trip the reactor trip breakers in one division. The bottom 12.ble describes how the four sets of reactor trip breakers combine to trip the plant. The topmost table provides the trip logic associated with individual sensor channels in a cabinet set that are combined into the ' rip path. The cabinet set combines partial trip and bypass status from its own associated channel sets with partial trip and bypass status from the sensor channels associated with other cabinet sets. TRIP DEMAND means that conditions are met for the logic to send signals to the division's reactor trip breakers to trip. The numbers indicate the logic condition required for a trip to occur from the remaining channels. y The middle table shows the trip logic associated with the bypass path. The bypass path is enabled and i the trip path disabled when a global bypass request is made for a cabinet set. This table describes the logic that is performed by the er. binet set when this global bypass sequest is made. If no other cabinet set is already in a global bypass state, and one or less cabinet sets have a trip demand, then the global [ bypass request is successful and the trip path is bypassed, as indicated by GLOBAL BYPASS in the tab:e. Otherwise, the global bypass request fails and a trip demand is issued to that division's reactor trip breakers. This logic prevents the plant from being placed in i.n unsafe state by having more than one cabinet set bypassed at one time. The bottom table describes how the reactor trip breaker sets produce a plant trip when tripped by the trip demand signals.' 3.2 - Reactor Trip Path Block Diagram Figure 3.2 is taken directly from WCAP-13382 (figure 4.1-5) and shows the overall architecture of the dynamic trip bus' in a single integrated protection cabinet. [ 'See figure 5.1-1 in WCAP-13382 for the breaker arrangement. 2Section 4.1.6 of WCAP-13382 'Section 3.7.2 of WCAP-13382 Revision: O GW-J1R.-006 February 1,1994 2
'l WESTINGIIOUSE NON-PROPRIETARY CLASS 3 AP600 Bypass Isogic Implementation Description f i ).4 F Figures 3.3 and 3.4 present the logic implemented by these subsystems foi the trip and bypass paths. 3.3 - Typical Sensor Channel Reactor Trip - Trip Path Logic Figure 3.3 shows the 2-out-of-4 logic that implements a single sensor channel reactor trip function, such as pressurizer level, in one cabinet set of the integrated protection cabinets. [ 'Section 3.7.3 of WCAP-13382 'Section 4.1.2 of WCAP-13382
- Section 4.1.5 of WCAP-13382
[ 'Section 4.1.4 of WCAP-13382 j Revision: O GW-J1 R-006 February 1,1994 3
9 WESTINGIIOUSE NON-PROPRIETARY CLASS 3 AP600 Bypass Logic Implementation Description 3 p 7 i e,r 3.4 - Global Bypass - Bypass Path Logic Figure 3.4 shows the logic for the global bypass path. [ ju 3.5 - Logic Performed by a Typical Trip Path DLU Circuit l Figure 3.5 shows the logic implemented by a standard trip path DLU' in greater detail. [ I l. 'Section 3.7.3 of WCAP-13382 Revision: O GW-J1R-006 February _1,1994 4 i i r ,,v-- __m,.
t WESTINGilOUSE NON PROPRIETARY CLASS 3 AP600 Bypass Logic Implementation Description j.x j 3.6 - Logic Performed by Specialized DLU Circuits Figure 3.6 shows the, logic implemented by a DLU circuit board that implements the four specialized DLU functions shown in the preceding figures. [ j i t r i i { i Revision: O GW-J1R-006 ' February 1,1994 3
WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) AP600 Bypass Logic Implementation Description l SENSOR CHANNELS (PARTIAL) TRIPPED h 0 1 2 3 4 n. TRIP TRIP TRIP 0 2/4 1/3 DEMAND DEMAND DEMAND m TRIP TRIP d 1 1/2 DEMAND DEMAND zZ TRIP TRIP y 2 1/2 DEMAND DEMAND o tr TRIP TF11P 3 DEMAND DEMAND TRIP PATH LOGIC g b TRIP M 4 DEMAND CABINET SETS WITH TRIP DEM AND 0 1 2 3 GLOBAL GLOBAL TRIP TRIP l BYPASS BYPASS DEMAND DEMAND i TRIP TRIP TRIP ? ca 2 DEMAND DEMAND DEMAND m a bm TRIP TRIP 3 DEMAND DEMAND gO Oh TRIP H i 4 DEMAND BYPASS PATH LOGIC STATE OF CABINET AFTER GLOBAL BYPASS REOUEST CABINET LEVEL LOGIC OTHER CABINET SETS REACTOR TRIP BREAKER SETS TRIPPED - ALL DIVISIONS 0 1 2 3 4 2/4 1/3 TRIPPED TRIPPED TRIPPED l REACTOR TRIP BREAKER LOGIC Figure 3.1 - REACTOR TRIP LOGIC OPERATION Revision 0 006 ) 6 Feburary 1,1994
i.. i-l WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) 7 AP600 Bypass Logic implementation Description ,,c l l l -I i i FIGURE 3.2 IS PROPRIETARY ' i Figure 3.2 - REACTOR TR!P PATH BLOCK DIAGRAM 4 (Figure 4.1-5 of WCAP-13382) Revision 0 ' GW-J1 R-006 t 7 Feburary 1,1994 1-we,-,----., e-- .w ,ee-, ,o -o--.- ---~+rv ~ < - r v- -ww- -*m'. -e ---,--u a*,~ w s
WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) AP600 Bypass Logic Implementation Description -{ I t l J l 1 ? ~ FIGURE 3.3 IS PROPRIETARY 4 1 a 4 Figure 3.3 - TYPICAL SENSOR CHANNEL REACTOR TRIP - TRIP PATH LOGIC Revision 0 GW41 R-006 8 Feburary 1,1994
WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) AP600 Bypass Lcgic imp!ementation Description FIGURE 3.4 IS PROPRIETARY l l Figure 3.4 - GLOBAL BYPASS - BYPASS PATH LOGIC l, Revision 0 GW-J1 R-006 g Feburary 1,1994
WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) AP600 Bypass Logic implementation Description r 4 t 1 i 3 b FIGURE 3.5 IS PROPRIETARY i t Figure 3.5 - LOGIC PERFORMED BY A TYPICAL TRIP PATH DLU CIRCUIT GW-J1 R-006 Revision 0 10 Feburary 1,1994 P m m e -...~. + ..-c.-
4 WESTINGHOUSE CLASS 3 (NON-PROPRIETARY) AP600 Bypass Logic Implementation Description t t v FIGURE 3.6 IS PROPRIETARY i i l t t i Figure 3.6 - LOGIC PERFORMED BY SPECIALIZED DLU CIRCUlTS Rev..rsion 0 GW-J1 R-006 33 Feburary 1,1994 _..}}