ML20039C674
| ML20039C674 | |
| Person / Time | |
|---|---|
| Site: | Clinton  |
| Issue date: | 12/14/1981 |
| From: | Geier J ILLINOIS POWER CO. |
| To: | John Miller Office of Nuclear Reactor Regulation |
| References | |
| U-0365, U-365, NUDOCS 8112300030 | |
| Download: ML20039C674 (3) | |
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ILLINO/S POWER OOMPANY y
3 (3,_3gy_g 500 SOUTH 271H STREET, DECATUR, ILLINOIS 62525 December 14, 1981 s
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Mr. James R. Miller, Chief S
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kCg0 Standardization & Special Projects Branch
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79g7g 7 Division of Licensing
'l %$l9(p'N4 Office of Nuclear Reactor Regulation
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U. S. Nuclear' Regulatory Commission Washington, D. C.
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Dear Mr. Miller:
Clinton Power Station Unit 1 Docket No. 50-461 The attached material'is being provided as we agreed on December 11, 1981 with Rick Kendall. -This response was found to be satisfactory and closes this item which had been identified as confirmatory from previous NRC review of CPS FSAR Chapter 7.
Sincerely,
}. D. Geier Manager Nuclear Station Engineering JP0/1t Attachments cc:
J. H. Williams, NRC Clinton Proj ect Manager H. H. Livermore, NRC Resident Inspector R. Kendall, NRC ICSB oI 9oi
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. The basic elements of the decision making logic of the NSPS are standard MIL grade CMOS logic elements, in dual in-line epoxy packages, mounted on multilayer printed circuit cards.
CMOS logic was chosen for the NSPS application because of its high noise f
imunity compared to other types of solid state devices. With the CMOS devices powered by 12 vde, it takes an input greater than approximately 4 volts to switch the output'on a low to high transition, and less than approximately c
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l 8 volts to switch on a high to' low transition. ' Thus, noise spikes of consider-1able magnitude can be tolerated on the input lines without causing erroneous logic states. As a comparison, TTL logic which must be operated at +5V has a low to high minimum threshold of approximately.7 volt.
't Numerous design techniques have been utilized to reduce the possibility of any significant electrical noise being coupled into the logic circuitry.
l All inputs and outputs that l_ eave the NSPS cabinets are buffered and. isolated, and internal wiring is routed to prevent " crosstalk" or radiated electromagnetic interference.
I Specifically, prevention _of electromagnetic conducted interference is accomplished in the following ways.
Power Lines: Conduction of EMI via power lines to the logic elements f
is prevented by the use of switching power supplies which are speci-fied by the manufacturer to have a maximum noise spike of 62 mv.
In addition, each logic card has single pole filters on the power input to remove any remaining high frequency noise.
Input signal lines:
Inputs from other separation divisions, and from nondivisional. sources are processed through optical isolators which are also filtered on the input side.
Inputs from same-division sources such as the control room panels or field sources are processed through Digital Signal Conditioners (DSC's) which are filtered and 1
i optically coupled.
Inputs to trip units are current loops and thare-fore not vulnerable to EMI.
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Output signal lines: Outputs to actuated devices pass through load drivers which have pulse transformer coupling between input and output stages.
Outputs to other logic elements in other divisions
. pass through optical isolators.
Internal wiring:
Interconnections between logic cards is on a backplane
~ f wire wrapped tenninals.
The connections are made point to point so o
that groups of wires do not run in parallel for long distances. Power wiring is routed as far from signal wiring as possible. The high current wiring of the drives to the pilot valve solenoids is run in conduit, as is the wiring for utility services (lighting).
Card layout: All signal inputs at the card level are buffered by a 100 K ohn resistor. The use of ground planes over large areas of the boards also insures electrically quiet circuitry.
All standards of good practice were applied during the design and con-struction of the solid state safety system to prevent any pitblem with EMI.
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